diff options
| author | Thiemo Seufer <ths@networkno.de> | 2006-05-04 10:47:05 +0000 |
|---|---|---|
| committer | Thiemo Seufer <ths@networkno.de> | 2006-05-04 10:47:05 +0000 |
| commit | 39a7806daee10b8020ce7be18e54cab69c9e699f (patch) | |
| tree | e0e709f3dc36ebd5135bd8a533c7f16a44ec5a3c /gas | |
| parent | 9578239d3edd0341cca6686bdf89ba9f5a1cd9f7 (diff) | |
| download | fsf-binutils-gdb-39a7806daee10b8020ce7be18e54cab69c9e699f.zip fsf-binutils-gdb-39a7806daee10b8020ce7be18e54cab69c9e699f.tar.gz fsf-binutils-gdb-39a7806daee10b8020ce7be18e54cab69c9e699f.tar.bz2 | |
[ gas/testsuite/ChangeLog ]
2006-05-04 Thiemo Seufer <ths@mips.com>
Nigel Stephens <nigel@mips.com>
* gas/mips/mips.exp: Run mips32-dsp tests only for mips32r2.
* gas/mips/set-arch.d: Adjust according to opcode table changes.
[ include/opcode/ChangeLog ]
2006-05-04 Thiemo Seufer <ths@mips.com>
Nigel Stephens <nigel@mips.com>
David Ung <davidu@mips.com>
* mips.h: Add INSN_SMARTMIPS define.
[ opcodes/ChangeLog ]
2006-05-04 Thiemo Seufer <ths@mips.com>
Nigel Stephens <nigel@mips.com>
David Ung <davidu@mips.com>
* mips-dis.c (mips_arch_choices): Add smartmips instruction
decoding to MIPS32 and MIPS32R2. Limit DSP decoding to release
2 ISAs. Add MIPS3D decoding to MIPS32R2. Add MT decoding to
MIPS64R2.
* mips-opc.c: fix random typos in comments.
(INSN_SMARTMIPS): New defines.
(mips_builtin_opcodes): Add paired single support for MIPS32R2.
Move bc3f, bc3fl, bc3t, bc3tl downwards. Move flushi, flushd,
flushid, wb upwards. Move cfc3, ctc3 downwards. Rework the
FP_S and FP_D flags to denote single and double register
accesses separately. Move dmfc3, dmtc3, mfc3, mtc3 downwards.
Allow jr.hb and jalr.hb for release 1 ISAs. Allow luxc1, suxc1
for MIPS32R2. Add SmartMIPS instructions. Add two-argument
variants of bc2f, bc2fl, bc2t, bc2tl. Add mfhc2, mthc2 to
release 2 ISAs.
* mips16-opc.c (mips16_opcodes): Add sdbbp instruction.
Diffstat (limited to 'gas')
| -rw-r--r-- | gas/testsuite/ChangeLog | 6 | ||||
| -rw-r--r-- | gas/testsuite/gas/mips/mips.exp | 2 | ||||
| -rw-r--r-- | gas/testsuite/gas/mips/set-arch.d | 8 |
3 files changed, 11 insertions, 5 deletions
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index a2d7628..4a377b4 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,9 @@ +2006-05-04 Thiemo Seufer <ths@mips.com> + Nigel Stephens <nigel@mips.com> + + * gas/mips/mips.exp: Run mips32-dsp tests only for mips32r2. + * gas/mips/set-arch.d: Adjust according to opcode table changes. + 2006-05-03 Thiemo Seufer <ths@mips.com> * gas/mips/mips32-mt.d: Fix mftr argument order. diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp index 7843f2a..382ff95 100644 --- a/gas/testsuite/gas/mips/mips.exp +++ b/gas/testsuite/gas/mips/mips.exp @@ -766,7 +766,7 @@ if { [istarget mips*-*-vxworks*] } { run_list_test "noat-6" "" run_list_test "noat-7" "" - run_dump_test_arches "mips32-dsp" [mips_arch_list_matching mips32 !sb1] + run_dump_test_arches "mips32-dsp" [mips_arch_list_matching mips32r2] run_dump_test_arches "mips32-mt" [mips_arch_list_matching mips32r2 !gpr64] if { $elf && !$no_mips16 } { diff --git a/gas/testsuite/gas/mips/set-arch.d b/gas/testsuite/gas/mips/set-arch.d index 66e5265..7639adb 100644 --- a/gas/testsuite/gas/mips/set-arch.d +++ b/gas/testsuite/gas/mips/set-arch.d @@ -168,9 +168,9 @@ Disassembly of section \.text: 00000280 <[^>]*> 000000c0 sll zero,zero,0x3 00000284 <[^>]*> 7ca43980 0x7ca43980 00000288 <[^>]*> 7ca46984 0x7ca46984 -0000028c <[^>]*> 0100fc09 0x100fc09 -00000290 <[^>]*> 0120a409 0x120a409 -00000294 <[^>]*> 01000408 0x1000408 +0000028c <[^>]*> 0100fc09 jalr.hb t0 +00000290 <[^>]*> 0120a409 jalr.hb s4,t1 +00000294 <[^>]*> 01000408 jr.hb t0 00000298 <[^>]*> 7c0a003b 0x7c0a003b 0000029c <[^>]*> 7c0b083b 0x7c0b083b 000002a0 <[^>]*> 7c0c103b 0x7c0c103b @@ -334,7 +334,7 @@ Disassembly of section \.text: 00000518 <[^>]*> 48a41018 0x48a41018 0000051c <[^>]*> 4984101f 0x4984101f 00000520 <[^>]*> 49c4101f 0x49c4101f -00000524 <[^>]*> 4904101f 0x4904101f +00000524 <[^>]*> 4904101f bc2f \$cc1,000045a4 <[^>]*> 00000528 <[^>]*> 4944101f 0x4944101f 0000052c <[^>]*> 48c62090 0x48c62090 00000530 <[^>]*> 4bce3110 c2 0x1ce3110 |