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author | Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> | 2021-11-17 19:56:09 +0000 |
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committer | Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> | 2021-11-17 19:56:42 +0000 |
commit | 1cad938de57a1577e5fe4b4afcabe889a8b9b9d7 (patch) | |
tree | 0a83cfe3b99989bb705595bb9bf0855553e25e15 /gas | |
parent | 7bb5f07c8aa5168009f1e7b6857a30f0ee5ad16a (diff) | |
download | fsf-binutils-gdb-1cad938de57a1577e5fe4b4afcabe889a8b9b9d7.zip fsf-binutils-gdb-1cad938de57a1577e5fe4b4afcabe889a8b9b9d7.tar.gz fsf-binutils-gdb-1cad938de57a1577e5fe4b4afcabe889a8b9b9d7.tar.bz2 |
aarch64: [SME] Add ZERO instruction
This patch is adding ZERO (a list of 64-bit element ZA tiles)
instruction.
gas/ChangeLog:
* config/tc-aarch64.c (parse_sme_list_of_64bit_tiles):
New parser.
(parse_operands): Handle OPND_SME_list_of_64bit_tiles.
* testsuite/gas/aarch64/sme-4-illegal.d: New test.
* testsuite/gas/aarch64/sme-4-illegal.l: New test.
* testsuite/gas/aarch64/sme-4-illegal.s: New test.
* testsuite/gas/aarch64/sme-4.d: New test.
* testsuite/gas/aarch64/sme-4.s: New test.
include/ChangeLog:
* opcode/aarch64.h (enum aarch64_opnd): New operand
AARCH64_OPND_SME_list_of_64bit_tiles.
opcodes/ChangeLog:
* aarch64-opc.c (print_sme_za_list): New printing function.
(aarch64_print_operand): Handle OPND_SME_list_of_64bit_tiles.
* aarch64-opc.h (enum aarch64_field_kind): New bitfield
FLD_SME_zero_mask.
* aarch64-tbl.h (struct aarch64_opcode): New ZERO instruction.
aarch64-asm-2.c: Regenerate.
aarch64-dis-2.c: Regenerate.
aarch64-opc-2.c: Regenerate.
Diffstat (limited to 'gas')
-rw-r--r-- | gas/config/tc-aarch64.c | 104 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/sme-4-illegal.d | 3 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/sme-4-illegal.l | 29 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/sme-4-illegal.s | 32 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/sme-4.d | 71 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/sme-4.s | 95 |
6 files changed, 334 insertions, 0 deletions
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c index ce76128..15bfe8e 100644 --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c @@ -4460,6 +4460,103 @@ parse_sme_za_hv_tiles_operand (char **str, return regno; } +/* Parse list of up to eight 64-bit element tile names separated by commas in + SME's ZERO instruction: + + ZERO { <mask> } + + Function returns <mask>: + + an 8-bit list of 64-bit element tiles named ZA0.D to ZA7.D. +*/ +static int +parse_sme_zero_mask(char **str) +{ + char *q; + int mask; + aarch64_opnd_qualifier_t qualifier; + + mask = 0x00; + q = *str; + do + { + const reg_entry *reg = parse_reg_with_qual (&q, REG_TYPE_ZA, &qualifier); + if (reg) + { + int regno = reg->number; + if (qualifier == AARCH64_OPND_QLF_S_B && regno == 0) + { + /* { ZA0.B } is assembled as all-ones immediate. */ + mask = 0xff; + } + else if (qualifier == AARCH64_OPND_QLF_S_H && regno < 2) + mask |= 0x55 << regno; + else if (qualifier == AARCH64_OPND_QLF_S_S && regno < 4) + mask |= 0x11 << regno; + else if (qualifier == AARCH64_OPND_QLF_S_D && regno < 8) + mask |= 0x01 << regno; + else + { + set_syntax_error (_("wrong ZA tile element format")); + return PARSE_FAIL; + } + continue; + } + else if (strncasecmp (q, "za", 2) == 0 + && !ISALNUM (q[2])) + { + /* { ZA } is assembled as all-ones immediate. */ + mask = 0xff; + q += 2; + continue; + } + else + { + set_syntax_error (_("wrong ZA tile element format")); + return PARSE_FAIL; + } + } + while (skip_past_char (&q, ',')); + + *str = q; + return mask; +} + +/* Wraps in curly braces <mask> operand ZERO instruction: + + ZERO { <mask> } + + Function returns value of <mask> bit-field. +*/ +static int +parse_sme_list_of_64bit_tiles (char **str) +{ + int regno; + + if (!skip_past_char (str, '{')) + { + set_syntax_error (_("expected '{'")); + return PARSE_FAIL; + } + + /* Empty <mask> list is an all-zeros immediate. */ + if (!skip_past_char (str, '}')) + { + regno = parse_sme_zero_mask (str); + if (regno == PARSE_FAIL) + return PARSE_FAIL; + + if (!skip_past_char (str, '}')) + { + set_syntax_error (_("expected '}'")); + return PARSE_FAIL; + } + } + else + regno = 0x00; + + return regno; +} /* Parse a system register or a PSTATE field name for an MSR/MRS instruction. Returns the encoding for the option, or PARSE_FAIL. @@ -7194,6 +7291,13 @@ parse_operands (char *str, const aarch64_opcode *opcode) break; } + case AARCH64_OPND_SME_list_of_64bit_tiles: + val = parse_sme_list_of_64bit_tiles (&str); + if (val == PARSE_FAIL) + goto failure; + info->imm.value = val; + break; + default: as_fatal (_("unhandled operand code %d"), operands[i]); } diff --git a/gas/testsuite/gas/aarch64/sme-4-illegal.d b/gas/testsuite/gas/aarch64/sme-4-illegal.d new file mode 100644 index 0000000..b5d0543 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme-4-illegal.d @@ -0,0 +1,3 @@ +#as: -march=armv8-a+sme +#source: sme-4-illegal.s +#error_output: sme-4-illegal.l diff --git a/gas/testsuite/gas/aarch64/sme-4-illegal.l b/gas/testsuite/gas/aarch64/sme-4-illegal.l new file mode 100644 index 0000000..ae7d654 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme-4-illegal.l @@ -0,0 +1,29 @@ +[^:]*: Assembler messages: +[^:]*:[0-9]+: Error: expected '{' at operand 1 -- `zero za' +[^:]*:[0-9]+: Error: wrong ZA tile element format at operand 1 -- `zero {za8\.d}' +[^:]*:[0-9]+: Error: wrong ZA tile element format at operand 1 -- `zero {za0\.d,za8.d}' +[^:]*:[0-9]+: Error: wrong ZA tile element format at operand 1 -- `zero {za2\.h}' +[^:]*:[0-9]+: Error: wrong ZA tile element format at operand 1 -- `zero {za4\.s}' +[^:]*:[0-9]+: Error: wrong ZA tile element format at operand 1 -- `zero {za1\.s,za4.s}' +[^:]*:[0-9]+: Error: wrong ZA tile element format at operand 1 -- `zero {za0\.d,za3.s,za2.h}' +[^:]*:[0-9]+: Error: wrong ZA tile element format at operand 1 -- `zero {za1.b}' +[^:]*:[0-9]+: Error: unexpected comma after the mnemonic name `zero' -- `zero ,' +[^:]*:[0-9]+: Error: wrong ZA tile element format at operand 1 -- `zero {' +[^:]*:[0-9]+: Error: wrong ZA tile element format at operand 1 -- `zero {,' +[^:]*:[0-9]+: Error: expected '{' at operand 1 -- `zero }' +[^:]*:[0-9]+: Error: wrong ZA tile element format at operand 1 -- `zero {,}' +[^:]*:[0-9]+: Error: wrong ZA tile element format at operand 1 -- `zero {,,}' +[^:]*:[0-9]+: Error: wrong ZA tile element format at operand 1 -- `zero {za0}' +[^:]*:[0-9]+: Error: wrong ZA tile element format at operand 1 -- `zero {,za0.d}' +[^:]*:[0-9]+: Error: wrong ZA tile element format at operand 1 -- `zero {za0.d,}' +[^:]*:[0-9]+: Error: wrong ZA tile element format at operand 1 -- `zero {za0.d,za1.d,}' +[^:]*:[0-9]+: Error: wrong ZA tile element format at operand 1 -- `zero {za,}' +[^:]*:[0-9]+: Error: expected '}' at operand 1 -- `zero {za.}' +[^:]*:[0-9]+: Error: expected '}' at operand 1 -- `zero {za-}' +[^:]*:[0-9]+: Error: expected '}' at operand 1 -- `zero {za_}' +[^:]*:[0-9]+: Error: expected '}' at operand 1 -- `zero {za#}' +[^:]*:[0-9]+: Error: wrong ZA tile element format at operand 1 -- `zero {zaX}' +[^:]*:[0-9]+: Error: wrong ZA tile element format at operand 1 -- `zero {za0}' +[^:]*:[0-9]+: Error: wrong ZA tile element format at operand 1 -- `zero {zax}' +[^:]*:[0-9]+: Error: expected '}' at operand 1 -- `zero {za{}' +[^:]*:[0-9]+: Error: unexpected characters following instruction at operand 1 -- `zero {za}}' diff --git a/gas/testsuite/gas/aarch64/sme-4-illegal.s b/gas/testsuite/gas/aarch64/sme-4-illegal.s new file mode 100644 index 0000000..db0fbf6 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme-4-illegal.s @@ -0,0 +1,32 @@ +/* Scalable Matrix Extension (SME). */ + +zero za +zero { za8.d } +zero { za0.d, za8.d } +zero { za2.h } +zero { za4.s } +zero { za1.s, za4.s } +zero { za0.d, za3.s, za2.h } +zero { za1.b } + +/* Parser checks. */ +zero , +zero { +zero { , +zero } +zero { , } +zero { , , } +zero { za0 } +zero { , za0.d } +zero { za0.d , } +zero { za0.d , za1.d , } +zero { za, } +zero { za. } +zero { za- } +zero { za_ } +zero { za# } +zero { zaX } +zero { za0 } +zero { zax } +zero { za{ } +zero { za} } diff --git a/gas/testsuite/gas/aarch64/sme-4.d b/gas/testsuite/gas/aarch64/sme-4.d new file mode 100644 index 0000000..7e498e7 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme-4.d @@ -0,0 +1,71 @@ +#name: SME extension (ZERO) +#as: -march=armv8-a+sme +#objdump: -dr + +.*: file format .* + +Disassembly of section \.text: + +0+ <.*>: + 0: c0080000 zero {} + 4: c00800ff zero {za} + 8: c00800ff zero {za} + c: c00800ff zero {za} + 10: c00800ff zero {za} + 14: c00800ff zero {za} + 18: c0080001 zero {za0\.d} + 1c: c0080002 zero {za1\.d} + 20: c0080004 zero {za2\.d} + 24: c0080008 zero {za3\.d} + 28: c0080010 zero {za4\.d} + 2c: c0080020 zero {za5\.d} + 30: c0080040 zero {za6\.d} + 34: c0080080 zero {za7\.d} + 38: c0080001 zero {za0\.d} + 3c: c0080003 zero {za0\.d, za1\.d} + 40: c0080007 zero {za0\.d, za1\.d, za2\.d} + 44: c008000f zero {za0\.d, za1\.d, za2\.d, za3\.d} + 48: c008001f zero {za0\.s, za1\.d, za2\.d, za3\.d} + 4c: c008003f zero {za0\.s, za1\.s, za2\.d, za3\.d} + 50: c008007f zero {za0\.h, za1\.s, za3\.d} + 54: c00800ff zero {za} + 58: c0080080 zero {za7\.d} + 5c: c00800c0 zero {za6\.d, za7\.d} + 60: c00800e0 zero {za5\.d, za6\.d, za7\.d} + 64: c00800f0 zero {za4\.d, za5\.d, za6\.d, za7\.d} + 68: c00800f8 zero {za3\.s, za4\.d, za5\.d, za6\.d} + 6c: c00800fc zero {za2\.s, za3\.s, za4\.d, za5\.d} + 70: c00800fe zero {za1\.h, za2\.s, za4\.d} + 74: c00800ff zero {za} + 78: c00800fe zero {za1\.h, za2\.s, za4\.d} + 7c: c00800fd zero {za0\.h, za3\.s, za5\.d} + 80: c00800fb zero {za1\.h, za0\.s, za6\.d} + 84: c00800f7 zero {za0\.h, za1\.s, za7\.d} + 88: c00800ef zero {za1\.h, za2\.s, za0\.d} + 8c: c00800df zero {za0\.h, za3\.s, za1\.d} + 90: c00800bf zero {za1\.h, za0\.s, za2\.d} + 94: c008007f zero {za0\.h, za1\.s, za3\.d} + 98: c0080055 zero {za0\.h} + 9c: c00800aa zero {za1\.h} + a0: c0080011 zero {za0\.s} + a4: c0080022 zero {za1\.s} + a8: c0080044 zero {za2\.s} + ac: c0080088 zero {za3\.s} + b0: c0080055 zero {za0\.h} + b4: c0080055 zero {za0\.h} + b8: c0080055 zero {za0\.h} + bc: c00800aa zero {za1\.h} + c0: c00800aa zero {za1\.h} + c4: c00800aa zero {za1\.h} + c8: c0080011 zero {za0\.s} + cc: c0080022 zero {za1\.s} + d0: c0080044 zero {za2\.s} + d4: c0080088 zero {za3\.s} + d8: c00800d5 zero {za0.h, za7.d} + dc: c00800ab zero {za1.h, za0.d} + e0: c0080015 zero {za0.s, za2.d} + e4: c008002a zero {za1.s, za3.d} + e8: c0080054 zero {za2.s, za4.d} + ec: c00800a8 zero {za3.s, za5.d} + f0: c00800d5 zero {za0.h, za7.d} + f4: c0080015 zero {za0.s, za2.d} diff --git a/gas/testsuite/gas/aarch64/sme-4.s b/gas/testsuite/gas/aarch64/sme-4.s new file mode 100644 index 0000000..1fcd378 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme-4.s @@ -0,0 +1,95 @@ +/* SME Extension (ZERO). */ + +/* An all-zeros immediate is disassembled as an empty list { }. */ +zero { } + +/* An all-ones immediate is disassembled as {ZA}. */ +zero { za } +zero { za0.b } +zero { za0.h, za1.h } +zero { za0.d, za1.d, za2.d, za3.d, za4.d, za5.d, za6.d, za7.d } +zero { za7.d, za6.d, za5.d, za4.d, za3.d, za2.d, za1.d, za0.d } + +/* Set each bit individually. */ +zero { za0.d } +zero { za1.d } +zero { za2.d } +zero { za3.d } +zero { za4.d } +zero { za5.d } +zero { za6.d } +zero { za7.d } + +/* Random bits. */ +zero { za0.d } +zero { za0.d, za1.d } +zero { za0.d, za1.d, za2.d } +zero { za0.d, za1.d, za2.d, za3.d } +zero { za0.d, za1.d, za2.d, za3.d, za4.d } +zero { za0.d, za1.d, za2.d, za3.d, za4.d, za5.d } +zero { za0.d, za1.d, za2.d, za3.d, za4.d, za5.d, za6.d } +zero { za0.d, za1.d, za2.d, za3.d, za4.d, za5.d, za6.d, za7.d } + +zero { za7.d } +zero { za7.d, za6.d } +zero { za7.d, za6.d, za5.d } +zero { za7.d, za6.d, za5.d, za4.d } +zero { za7.d, za6.d, za5.d, za4.d, za3.d } +zero { za7.d, za6.d, za5.d, za4.d, za3.d, za2.d } +zero { za7.d, za6.d, za5.d, za4.d, za3.d, za2.d, za1.d } +zero { za7.d, za6.d, za5.d, za4.d, za3.d, za2.d, za1.d, za0.d } + +zero { za1.d, za2.d, za3.d, za4.d, za5.d, za6.d, za7.d } +zero { za0.d, za2.d, za3.d, za4.d, za5.d, za6.d, za7.d } +zero { za0.d, za1.d, za3.d, za4.d, za5.d, za6.d, za7.d } +zero { za0.d, za1.d, za2.d, za4.d, za5.d, za6.d, za7.d } +zero { za0.d, za1.d, za2.d, za3.d, za5.d, za6.d, za7.d } +zero { za0.d, za1.d, za2.d, za3.d, za4.d, za6.d, za7.d } +zero { za0.d, za1.d, za2.d, za3.d, za4.d, za5.d, za7.d } +zero { za0.d, za1.d, za2.d, za3.d, za4.d, za5.d, za6.d } + +/* For programmer convenience an assembler must also accept the names of + 32-bit, 16-bit and 8-bit element tiles. +*/ +zero { za0.h } +zero { za1.h } +zero { za0.s } +zero { za1.s } +zero { za2.s } +zero { za3.s } + +/* The preferred disassembly of this instruction uses the shortest list of tile + names that represent the encoded immediate mask. +*/ + +/* To za0.h */ +zero { za0.d, za2.d, za4.d, za6.d } +zero { za0.s, za2.s } +zero { za0.h } + +/* To za1.h */ +zero { za1.d, za3.d, za5.d, za7.d } +zero { za1.s, za3.s } +zero { za1.h } + +/* To za[0-3].s */ +zero { za0.d, za4.d } +zero { za1.d, za5.d } +zero { za2.d, za6.d } +zero { za3.d, za7.d } + +/* Mix of suffixed. */ +zero { za0.h, za7.d } +zero { za1.h, za0.d } +zero { za0.s, za2.d } +zero { za1.s, za3.d } +zero { za2.s, za4.d } +zero { za3.s, za5.d } + +/* Register aliases. */ +foo .req za0 +bar .req za2 +baz .req za7 + +zero { foo.h, baz.d } +zero { za0.s, bar.d } |