[ opcodes/ChangeLog ]

2002-05-31  Chris G. Demetriou  <cgd@broadcom.com>
            Ed Satterthwaite  <ehs@broadcom.com>

        * mips-opc.c: Add support for SB-1 MDMX subset and extensions.

[ gas/testsuite/ChangeLog ]
2002-05-31  Chris G. Demetriou  <cgd@broadcom.com>

        * gas/mips/sb1-ext-mdmx.s: New file.
        * gas/mips/sb1-ext-mdmx.d: Likewise.
        * gas/mips/mips.exp: Run new "sb1-ext-mdmx" test.

4 files changed, 291 insertions, 0 deletions

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 77d0820..cfc1eb5 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,5 +1,11 @@
 2002-05-31  Chris G. Demetriou  <cgd@broadcom.com>
 
+	* gas/mips/sb1-ext-mdmx.s: New file.
+	* gas/mips/sb1-ext-mdmx.d: Likewise.
+	* gas/mips/mips.exp: Run new "sb1-ext-mdmx" test.
+
+2002-05-31  Chris G. Demetriou  <cgd@broadcom.com>
+
 	* gas/mips/mips.exp: Use elf-rel2 and elfel-rel2 for
 	mipsisa64*-*-* targets, rather than e32-rel2 and e32el-rel2.
 
diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp
index 3dbec9c..c016465 100644
--- a/gas/testsuite/gas/mips/mips.exp
+++ b/gas/testsuite/gas/mips/mips.exp
@@ -153,6 +153,7 @@ if { [istarget mips*-*-*] } then {
     run_dump_test "mips64"
     run_dump_test "mips64-mips3d"
     run_dump_test "mips64-mdmx"
+    run_dump_test "sb1-ext-mdmx"
     run_dump_test "sb1-ext-ps"
 
     # It will always fail until someone fixes it.
diff --git a/gas/testsuite/gas/mips/sb1-ext-mdmx.d b/gas/testsuite/gas/mips/sb1-ext-mdmx.d
new file mode 100644
index 0000000..75b89dd
--- /dev/null
+++ b/gas/testsuite/gas/mips/sb1-ext-mdmx.d
@@ -0,0 +1,115 @@
+#objdump: -dr --prefix-addresses --show-raw-insn -mmips:sb1
+#name: SB-1 MDMX subset and extensions
+#as: -march=sb1
+
+# Check SB-1 MDMX subset and extensions assembly and disassembly
+
+.*: +file format .*mips.*
+
+Disassembly of section .text:
+0+0000 <[^>]*> 46b46051 	movf\.l	\$f1,\$f12,\$fcc5
+0+0004 <[^>]*> 46b26053 	movn\.l	\$f1,\$f12,s2
+0+0008 <[^>]*> 46b56051 	movt\.l	\$f1,\$f12,\$fcc5
+0+000c <[^>]*> 46b26052 	movz\.l	\$f1,\$f12,s2
+0+0010 <[^>]*> 7bd2604b 	add\.ob	\$v1,\$v12,0x12
+0+0014 <[^>]*> 7ad2604b 	add\.ob	\$v1,\$v12,\$v18
+0+0018 <[^>]*> 7992604b 	add\.ob	\$v1,\$v12,\$v18\[6\]
+0+001c <[^>]*> 7bd26037 	adda\.ob	\$v12,0x12
+0+0020 <[^>]*> 7ad26037 	adda\.ob	\$v12,\$v18
+0+0024 <[^>]*> 79926037 	adda\.ob	\$v12,\$v18\[6\]
+0+0028 <[^>]*> 7bd26437 	addl\.ob	\$v12,0x12
+0+002c <[^>]*> 7ad26437 	addl\.ob	\$v12,\$v18
+0+0030 <[^>]*> 79926437 	addl\.ob	\$v12,\$v18\[6\]
+0+0034 <[^>]*> 78d26058 	alni\.ob	\$v1,\$v12,\$v18,6
+0+0038 <[^>]*> 7ab26059 	alnv\.ob	\$v1,\$v12,\$v18,s5
+0+003c <[^>]*> 7bd2604c 	and\.ob	\$v1,\$v12,0x12
+0+0040 <[^>]*> 7ad2604c 	and\.ob	\$v1,\$v12,\$v18
+0+0044 <[^>]*> 7992604c 	and\.ob	\$v1,\$v12,\$v18\[6\]
+0+0048 <[^>]*> 7bd26001 	c\.eq\.ob	\$v12,0x12
+0+004c <[^>]*> 7ad26001 	c\.eq\.ob	\$v12,\$v18
+0+0050 <[^>]*> 79926001 	c\.eq\.ob	\$v12,\$v18\[6\]
+0+0054 <[^>]*> 7bd26005 	c\.le\.ob	\$v12,0x12
+0+0058 <[^>]*> 7ad26005 	c\.le\.ob	\$v12,\$v18
+0+005c <[^>]*> 79926005 	c\.le\.ob	\$v12,\$v18\[6\]
+0+0060 <[^>]*> 7bd26004 	c\.lt\.ob	\$v12,0x12
+0+0064 <[^>]*> 7ad26004 	c\.lt\.ob	\$v12,\$v18
+0+0068 <[^>]*> 79926004 	c\.lt\.ob	\$v12,\$v18\[6\]
+0+006c <[^>]*> 7bd26047 	max\.ob	\$v1,\$v12,0x12
+0+0070 <[^>]*> 7ad26047 	max\.ob	\$v1,\$v12,\$v18
+0+0074 <[^>]*> 79926047 	max\.ob	\$v1,\$v12,\$v18\[6\]
+0+0078 <[^>]*> 7bd26046 	min\.ob	\$v1,\$v12,0x12
+0+007c <[^>]*> 7ad26046 	min\.ob	\$v1,\$v12,\$v18
+0+0080 <[^>]*> 79926046 	min\.ob	\$v1,\$v12,\$v18\[6\]
+0+0084 <[^>]*> 7bd26070 	mul\.ob	\$v1,\$v12,0x12
+0+0088 <[^>]*> 7ad26070 	mul\.ob	\$v1,\$v12,\$v18
+0+008c <[^>]*> 79926070 	mul\.ob	\$v1,\$v12,\$v18\[6\]
+0+0090 <[^>]*> 7bd26033 	mula\.ob	\$v12,0x12
+0+0094 <[^>]*> 7ad26033 	mula\.ob	\$v12,\$v18
+0+0098 <[^>]*> 79926033 	mula\.ob	\$v12,\$v18\[6\]
+0+009c <[^>]*> 7bd26433 	mull\.ob	\$v12,0x12
+0+00a0 <[^>]*> 7ad26433 	mull\.ob	\$v12,\$v18
+0+00a4 <[^>]*> 79926433 	mull\.ob	\$v12,\$v18\[6\]
+0+00a8 <[^>]*> 7bd26032 	muls\.ob	\$v12,0x12
+0+00ac <[^>]*> 7ad26032 	muls\.ob	\$v12,\$v18
+0+00b0 <[^>]*> 79926032 	muls\.ob	\$v12,\$v18\[6\]
+0+00b4 <[^>]*> 7bd26432 	mulsl\.ob	\$v12,0x12
+0+00b8 <[^>]*> 7ad26432 	mulsl\.ob	\$v12,\$v18
+0+00bc <[^>]*> 79926432 	mulsl\.ob	\$v12,\$v18\[6\]
+0+00c0 <[^>]*> 7bd2604f 	nor\.ob	\$v1,\$v12,0x12
+0+00c4 <[^>]*> 7ad2604f 	nor\.ob	\$v1,\$v12,\$v18
+0+00c8 <[^>]*> 7992604f 	nor\.ob	\$v1,\$v12,\$v18\[6\]
+0+00cc <[^>]*> 7bd2604e 	or\.ob	\$v1,\$v12,0x12
+0+00d0 <[^>]*> 7ad2604e 	or\.ob	\$v1,\$v12,\$v18
+0+00d4 <[^>]*> 7992604e 	or\.ob	\$v1,\$v12,\$v18\[6\]
+0+00d8 <[^>]*> 7bd26042 	pickf\.ob	\$v1,\$v12,0x12
+0+00dc <[^>]*> 7ad26042 	pickf\.ob	\$v1,\$v12,\$v18
+0+00e0 <[^>]*> 79926042 	pickf\.ob	\$v1,\$v12,\$v18\[6\]
+0+00e4 <[^>]*> 7bd26043 	pickt\.ob	\$v1,\$v12,0x12
+0+00e8 <[^>]*> 7ad26043 	pickt\.ob	\$v1,\$v12,\$v18
+0+00ec <[^>]*> 79926043 	pickt\.ob	\$v1,\$v12,\$v18\[6\]
+0+00f0 <[^>]*> 7a00007f 	rach\.ob	\$v1
+0+00f4 <[^>]*> 7800007f 	racl\.ob	\$v1
+0+00f8 <[^>]*> 7900007f 	racm\.ob	\$v1
+0+00fc <[^>]*> 7bd20061 	rnau\.ob	\$v1,0x12
+0+0100 <[^>]*> 7ad20061 	rnau\.ob	\$v1,\$v18
+0+0104 <[^>]*> 79920061 	rnau\.ob	\$v1,\$v18\[6\]
+0+0108 <[^>]*> 7bd20062 	rneu\.ob	\$v1,0x12
+0+010c <[^>]*> 7ad20062 	rneu\.ob	\$v1,\$v18
+0+0110 <[^>]*> 79920062 	rneu\.ob	\$v1,\$v18\[6\]
+0+0114 <[^>]*> 7bd20060 	rzu\.ob	\$v1,0x12
+0+0118 <[^>]*> 7ad20060 	rzu\.ob	\$v1,\$v18
+0+011c <[^>]*> 79920060 	rzu\.ob	\$v1,\$v18\[6\]
+0+0120 <[^>]*> 7992605f 	shfl\.mixh\.ob	\$v1,\$v12,\$v18
+0+0124 <[^>]*> 79d2605f 	shfl\.mixl\.ob	\$v1,\$v12,\$v18
+0+0128 <[^>]*> 7912605f 	shfl\.pach\.ob	\$v1,\$v12,\$v18
+0+012c <[^>]*> 78d2605f 	shfl\.upsl\.ob	\$v1,\$v12,\$v18
+0+0130 <[^>]*> 7bd26050 	sll\.ob	\$v1,\$v12,0x12
+0+0134 <[^>]*> 7ad26050 	sll\.ob	\$v1,\$v12,\$v18
+0+0138 <[^>]*> 79926050 	sll\.ob	\$v1,\$v12,\$v18\[6\]
+0+013c <[^>]*> 7bd26052 	srl\.ob	\$v1,\$v12,0x12
+0+0140 <[^>]*> 7ad26052 	srl\.ob	\$v1,\$v12,\$v18
+0+0144 <[^>]*> 79926052 	srl\.ob	\$v1,\$v12,\$v18\[6\]
+0+0148 <[^>]*> 7bd2604a 	sub\.ob	\$v1,\$v12,0x12
+0+014c <[^>]*> 7ad2604a 	sub\.ob	\$v1,\$v12,\$v18
+0+0150 <[^>]*> 7992604a 	sub\.ob	\$v1,\$v12,\$v18\[6\]
+0+0154 <[^>]*> 7bd26036 	suba\.ob	\$v12,0x12
+0+0158 <[^>]*> 7ad26036 	suba\.ob	\$v12,\$v18
+0+015c <[^>]*> 79926036 	suba\.ob	\$v12,\$v18\[6\]
+0+0160 <[^>]*> 7bd26436 	subl\.ob	\$v12,0x12
+0+0164 <[^>]*> 7ad26436 	subl\.ob	\$v12,\$v18
+0+0168 <[^>]*> 79926436 	subl\.ob	\$v12,\$v18\[6\]
+0+016c <[^>]*> 7a00603e 	wach\.ob	\$v12
+0+0170 <[^>]*> 7812603e 	wacl\.ob	\$v12,\$v18
+0+0174 <[^>]*> 7bd2604d 	xor\.ob	\$v1,\$v12,0x12
+0+0178 <[^>]*> 7ad2604d 	xor\.ob	\$v1,\$v12,\$v18
+0+017c <[^>]*> 7992604d 	xor\.ob	\$v1,\$v12,\$v18\[6\]
+0+0180 <[^>]*> 7bd26049 	pabsdiff\.ob	\$v1,\$v12,0x12
+0+0184 <[^>]*> 7ad26049 	pabsdiff\.ob	\$v1,\$v12,\$v18
+0+0188 <[^>]*> 79926049 	pabsdiff\.ob	\$v1,\$v12,\$v18\[6\]
+0+018c <[^>]*> 7bd26035 	pabsdiffc\.ob	\$v12,0x12
+0+0190 <[^>]*> 7ad26035 	pabsdiffc\.ob	\$v12,\$v18
+0+0194 <[^>]*> 79926035 	pabsdiffc\.ob	\$v12,\$v18\[6\]
+0+0198 <[^>]*> 7bd26048 	pavg\.ob	\$v1,\$v12,0x12
+0+019c <[^>]*> 7ad26048 	pavg\.ob	\$v1,\$v12,\$v18
+0+01a0 <[^>]*> 79926048 	pavg\.ob	\$v1,\$v12,\$v18\[6\]
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/sb1-ext-mdmx.s b/gas/testsuite/gas/mips/sb1-ext-mdmx.s
new file mode 100644
index 0000000..0cdf7b0
--- /dev/null
+++ b/gas/testsuite/gas/mips/sb1-ext-mdmx.s
@@ -0,0 +1,169 @@
+# Source file to test assembly of SB-1 MDMX subset instructions and extensions.
+#
+# SB-1 implements only the .ob MDMX instructions, and adds three additional
+# MDMX-ish instructions (pabsdiff, pabsdiffc, pavg).
+
+	.set noreorder
+	.set noat
+
+	.globl text_label .text
+text_label:
+
+	# The normal MDMX instructions:
+
+	movf.l		$v1, $v12, $fcc5
+
+	movn.l		$v1, $v12, $18
+
+	movt.l		$v1, $v12, $fcc5
+
+	movz.l		$v1, $v12, $18
+
+	add.ob		$v1, $v12, 18
+	add.ob		$v1, $v12, $v18
+	add.ob		$v1, $v12, $v18[6]
+
+	adda.ob		$v12, 18
+	adda.ob		$v12, $v18
+	adda.ob		$v12, $v18[6]
+
+	addl.ob		$v12, 18
+	addl.ob		$v12, $v18
+	addl.ob		$v12, $v18[6]
+
+	alni.ob		$v1, $v12, $v18, 6
+
+	alnv.ob		$v1, $v12, $v18, $21
+
+	and.ob		$v1, $v12, 18
+	and.ob		$v1, $v12, $v18
+	and.ob		$v1, $v12, $v18[6]
+
+	c.eq.ob		$v12, 18
+	c.eq.ob		$v12, $v18
+	c.eq.ob		$v12, $v18[6]
+
+	c.le.ob		$v12, 18
+	c.le.ob		$v12, $v18
+	c.le.ob		$v12, $v18[6]
+
+	c.lt.ob		$v12, 18
+	c.lt.ob		$v12, $v18
+	c.lt.ob		$v12, $v18[6]
+
+	max.ob		$v1, $v12, 18
+	max.ob		$v1, $v12, $v18
+	max.ob		$v1, $v12, $v18[6]
+
+	min.ob		$v1, $v12, 18
+	min.ob		$v1, $v12, $v18
+	min.ob		$v1, $v12, $v18[6]
+
+	mul.ob		$v1, $v12, 18
+	mul.ob		$v1, $v12, $v18
+	mul.ob		$v1, $v12, $v18[6]
+
+	mula.ob		$v12, 18
+	mula.ob		$v12, $v18
+	mula.ob		$v12, $v18[6]
+
+	mull.ob		$v12, 18
+	mull.ob		$v12, $v18
+	mull.ob		$v12, $v18[6]
+
+	muls.ob		$v12, 18
+	muls.ob		$v12, $v18
+	muls.ob		$v12, $v18[6]
+
+	mulsl.ob	$v12, 18
+	mulsl.ob	$v12, $v18
+	mulsl.ob	$v12, $v18[6]
+
+	nor.ob		$v1, $v12, 18
+	nor.ob		$v1, $v12, $v18
+	nor.ob		$v1, $v12, $v18[6]
+
+	or.ob		$v1, $v12, 18
+	or.ob		$v1, $v12, $v18
+	or.ob		$v1, $v12, $v18[6]
+
+	pickf.ob	$v1, $v12, 18
+	pickf.ob	$v1, $v12, $v18
+	pickf.ob	$v1, $v12, $v18[6]
+
+	pickt.ob	$v1, $v12, 18
+	pickt.ob	$v1, $v12, $v18
+	pickt.ob	$v1, $v12, $v18[6]
+
+	rach.ob		$v1
+
+	racl.ob		$v1
+
+	racm.ob		$v1
+
+	rnau.ob		$v1, 18
+	rnau.ob		$v1, $v18
+	rnau.ob		$v1, $v18[6]
+
+	rneu.ob		$v1, 18
+	rneu.ob		$v1, $v18
+	rneu.ob		$v1, $v18[6]
+
+	rzu.ob		$v1, 18
+	rzu.ob		$v1, $v18
+	rzu.ob		$v1, $v18[6]
+
+	shfl.mixh.ob	$v1, $v12, $v18
+
+	shfl.mixl.ob	$v1, $v12, $v18
+
+	shfl.pach.ob	$v1, $v12, $v18
+
+	shfl.upsl.ob	$v1, $v12, $v18
+
+	sll.ob		$v1, $v12, 18
+	sll.ob		$v1, $v12, $v18
+	sll.ob		$v1, $v12, $v18[6]
+
+	srl.ob		$v1, $v12, 18
+	srl.ob		$v1, $v12, $v18
+	srl.ob		$v1, $v12, $v18[6]
+
+	sub.ob		$v1, $v12, 18
+	sub.ob		$v1, $v12, $v18
+	sub.ob		$v1, $v12, $v18[6]
+
+	suba.ob		$v12, 18
+	suba.ob		$v12, $v18
+	suba.ob		$v12, $v18[6]
+
+	subl.ob		$v12, 18
+	subl.ob		$v12, $v18
+	subl.ob		$v12, $v18[6]
+
+	wach.ob		$v12
+
+	wacl.ob		$v12, $v18
+
+	xor.ob		$v1, $v12, 18
+	xor.ob		$v1, $v12, $v18
+	xor.ob		$v1, $v12, $v18[6]
+
+
+	# The extensions:
+
+	pabsdiff.ob	$v1, $v12, 18
+	pabsdiff.ob	$v1, $v12, $v18
+	pabsdiff.ob	$v1, $v12, $v18[6]
+
+	pabsdiffc.ob	$v12, 18
+	pabsdiffc.ob	$v12, $v18
+	pabsdiffc.ob	$v12, $v18[6]
+
+	pavg.ob		$v1, $v12, 18
+	pavg.ob		$v1, $v12, $v18
+	pavg.ob		$v1, $v12, $v18[6]
+
+
+# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ...
+      .space  8