diff options
| author | Richard Sandiford <richard.sandiford@arm.com> | 2016-09-21 16:57:43 +0100 |
|---|---|---|
| committer | Richard Sandiford <richard.sandiford@arm.com> | 2016-09-21 16:57:43 +0100 |
| commit | 047cd301d40288d13e44f3322541ac28ebe06078 (patch) | |
| tree | 4aa6ac53c8f70e677ea23c6627d94c8e914de3aa /gas | |
| parent | 165d4950855493dd904a7996e7fcf58880d54219 (diff) | |
| download | fsf-binutils-gdb-047cd301d40288d13e44f3322541ac28ebe06078.zip fsf-binutils-gdb-047cd301d40288d13e44f3322541ac28ebe06078.tar.gz fsf-binutils-gdb-047cd301d40288d13e44f3322541ac28ebe06078.tar.bz2 | |
[AArch64][SVE 29/32] Add new SVE core & FP register operands
SVE uses some new fields to store W, X and scalar FP registers.
This patch adds corresponding operands.
include/
* opcode/aarch64.h (AARCH64_OPND_SVE_Rm): New aarch64_opnd.
(AARCH64_OPND_SVE_Rn_SP, AARCH64_OPND_SVE_VZn, AARCH64_OPND_SVE_Vd)
(AARCH64_OPND_SVE_Vm, AARCH64_OPND_SVE_Vn): Likewise.
opcodes/
* aarch64-tbl.h (AARCH64_OPERANDS): Add entries for the new SVE core
and FP register operands.
* aarch64-opc.h (FLD_SVE_Rm, FLD_SVE_Rn, FLD_SVE_Vd, FLD_SVE_Vm)
(FLD_SVE_Vn): New aarch64_field_kinds.
* aarch64-opc.c (fields): Add corresponding entries.
(aarch64_print_operand): Handle the new SVE core and FP register
operands.
* aarch64-opc-2.c: Regenerate.
* aarch64-asm-2.c: Likewise.
* aarch64-dis-2.c: Likewise.
gas/
* config/tc-aarch64.c (parse_operands): Handle the new SVE core
and FP register operands.
Diffstat (limited to 'gas')
| -rw-r--r-- | gas/ChangeLog | 5 | ||||
| -rw-r--r-- | gas/config/tc-aarch64.c | 6 |
2 files changed, 11 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 53faa4e..7f5f484 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,10 @@ 2016-09-21 Richard Sandiford <richard.sandiford@arm.com> + * config/tc-aarch64.c (parse_operands): Handle the new SVE core + and FP register operands. + +2016-09-21 Richard Sandiford <richard.sandiford@arm.com> + * config/tc-aarch64.c (double_precision_operand_p): New function. (parse_operands): Use it to calculate the dp_p input to parse_aarch64_imm_float. Handle the new SVE FP immediate operands. diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c index 01c8000..b9a988b 100644 --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c @@ -5292,11 +5292,13 @@ parse_operands (char *str, const aarch64_opcode *opcode) case AARCH64_OPND_Ra: case AARCH64_OPND_Rt_SYS: case AARCH64_OPND_PAIRREG: + case AARCH64_OPND_SVE_Rm: po_int_reg_or_fail (REG_TYPE_R_Z); break; case AARCH64_OPND_Rd_SP: case AARCH64_OPND_Rn_SP: + case AARCH64_OPND_SVE_Rn_SP: po_int_reg_or_fail (REG_TYPE_R_SP); break; @@ -5328,6 +5330,10 @@ parse_operands (char *str, const aarch64_opcode *opcode) case AARCH64_OPND_Sd: case AARCH64_OPND_Sn: case AARCH64_OPND_Sm: + case AARCH64_OPND_SVE_VZn: + case AARCH64_OPND_SVE_Vd: + case AARCH64_OPND_SVE_Vm: + case AARCH64_OPND_SVE_Vn: val = aarch64_reg_parse (&str, REG_TYPE_BHSDQ, &rtype, NULL); if (val == PARSE_FAIL) { |