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authorKong Lingling <lingling.kong@intel.com>2022-11-08 09:51:07 +0800
committerCui,Lili <lili.cui@intel.com>2022-11-08 10:24:59 +0800
commitb06311adb4bfd964b788c9c406815f1daabc1eb9 (patch)
treec7d73175ea4f5e720e7ecc0c967156cfd30386bb /gas
parent70f1d4d4848b26882711c3409ee19fd122fbb175 (diff)
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Support Intel RAO-INT
gas/ChangeLog: * NEWS: Support Intel RAO-INT. * config/tc-i386.c: Add raoint. * doc/c-i386.texi: Document .raoint. * testsuite/gas/i386/i386.exp: Run RAO_INT tests. * testsuite/gas/i386/raoint-intel.d: New test. * testsuite/gas/i386/raoint.d: Ditto. * testsuite/gas/i386/raoint.s: Ditto. * testsuite/gas/i386/x86-64-raoint-intel.d: Ditto. * testsuite/gas/i386/x86-64-raoint.d: Ditto. * testsuite/gas/i386/x86-64-raoint.s: Ditto. opcodes/ChangeLog: * i386-dis.c (PREFIX_0F38FC): New. (prefix_table): Add PREFIX_0F38FC. * i386-gen.c: (cpu_flag_init): Add CPU_RAO_INT_FLAGS and CPU_ANY_RAO_INT_FLAGS. * i386-init.h: Regenerated. * i386-opc.h: (CpuRAO_INT): New. (i386_cpu_flags): Add cpuraoint. * i386-opc.tbl: Add RAO_INT instructions. * i386-tbl.h: Regenerated.
Diffstat (limited to 'gas')
-rw-r--r--gas/NEWS2
-rw-r--r--gas/config/tc-i386.c1
-rw-r--r--gas/doc/c-i386.texi3
-rw-r--r--gas/testsuite/gas/i386/i386.exp4
-rw-r--r--gas/testsuite/gas/i386/raoint-intel.d19
-rw-r--r--gas/testsuite/gas/i386/raoint.d19
-rw-r--r--gas/testsuite/gas/i386/raoint.s15
-rw-r--r--gas/testsuite/gas/i386/x86-64-raoint-intel.d19
-rw-r--r--gas/testsuite/gas/i386/x86-64-raoint.d19
-rw-r--r--gas/testsuite/gas/i386/x86-64-raoint.s15
10 files changed, 115 insertions, 1 deletions
diff --git a/gas/NEWS b/gas/NEWS
index f35e8a9..8673134 100644
--- a/gas/NEWS
+++ b/gas/NEWS
@@ -1,5 +1,7 @@
-*- text -*-
+* Add support for Intel RAO-INT instructions.
+
* Add support for Intel AVX-NE-CONVERT instructions.
* Add support for Intel MSRLIST instructions.
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index a846b9e..6dcf114 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -1102,6 +1102,7 @@ static const arch_entry cpu_arch[] =
SUBARCH (wrmsrns, WRMSRNS, ANY_WRMSRNS, false),
SUBARCH (msrlist, MSRLIST, ANY_MSRLIST, false),
SUBARCH (avx_ne_convert, AVX_NE_CONVERT, ANY_AVX_NE_CONVERT, false),
+ SUBARCH (rao_int, RAO_INT, ANY_RAO_INT, false),
};
#undef SUBARCH
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
index 0ef1cec..6fa1199 100644
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -201,6 +201,7 @@ accept various extension mnemonics. For example,
@code{wrmsrns},
@code{msrlist},
@code{avx_ne_convert},
+@code{rao_int},
@code{amx_int8},
@code{amx_bf16},
@code{amx_fp16},
@@ -1496,7 +1497,7 @@ supported on the CPU specified. The choices for @var{cpu_type} are:
@item @samp{.clwb} @tab @samp{.rdpid} @tab @samp{.ptwrite} @tab @samp{.ibt}
@item @samp{.prefetchi} @tab @samp{.avx_ifma} @tab @samp{.avx_vnni_int8}
@item @samp{.cmpccxadd} @tab @samp{.wrmsrns} @tab @samp{.msrlist}
-@item @samp{.avx_ne_convert}
+@item @samp{.avx_ne_convert} @tab @samp{.rao_int}
@item @samp{.wbnoinvd} @tab @samp{.pconfig} @tab @samp{.waitpkg} @tab @samp{.cldemote}
@item @samp{.shstk} @tab @samp{.gfni} @tab @samp{.vaes} @tab @samp{.vpclmulqdq}
@item @samp{.movdiri} @tab @samp{.movdir64b} @tab @samp{.enqcmd} @tab @samp{.tsxldtrk}
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index 9ddf2b4..5b20ac7 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -485,6 +485,8 @@ if [gas_32_check] then {
run_list_test "msrlist-inval"
run_dump_test "avx-ne-convert"
run_dump_test "avx-ne-convert-intel"
+ run_dump_test "raoint"
+ run_dump_test "raoint-intel"
run_list_test "sg"
run_dump_test "clzero"
run_dump_test "invlpgb"
@@ -1166,6 +1168,8 @@ if [gas_64_check] then {
run_dump_test "x86-64-msrlist-intel"
run_dump_test "x86-64-avx-ne-convert"
run_dump_test "x86-64-avx-ne-convert-intel"
+ run_dump_test "x86-64-raoint"
+ run_dump_test "x86-64-raoint-intel"
run_dump_test "x86-64-clzero"
run_dump_test "x86-64-mwaitx-bdver4"
run_list_test "x86-64-mwaitx-reg"
diff --git a/gas/testsuite/gas/i386/raoint-intel.d b/gas/testsuite/gas/i386/raoint-intel.d
new file mode 100644
index 0000000..3eca899
--- /dev/null
+++ b/gas/testsuite/gas/i386/raoint-intel.d
@@ -0,0 +1,19 @@
+#as:
+#objdump: -dw -Mintel
+#name: i386 RAO_INT insns (Intel disassembly)
+#source: raoint.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*0f 38 fc 10\s+aadd DWORD PTR \[eax\],edx
+\s*[a-f0-9]+:\s*66 0f 38 fc 10\s+aand DWORD PTR \[eax\],edx
+\s*[a-f0-9]+:\s*f2 0f 38 fc 10\s+aor DWORD PTR \[eax\],edx
+\s*[a-f0-9]+:\s*f3 0f 38 fc 10\s+axor DWORD PTR \[eax\],edx
+\s*[a-f0-9]+:\s*0f 38 fc 10\s+aadd DWORD PTR \[eax\],edx
+\s*[a-f0-9]+:\s*66 0f 38 fc 10\s+aand DWORD PTR \[eax\],edx
+\s*[a-f0-9]+:\s*f2 0f 38 fc 10\s+aor DWORD PTR \[eax\],edx
+\s*[a-f0-9]+:\s*f3 0f 38 fc 10\s+axor DWORD PTR \[eax\],edx
+#pass
diff --git a/gas/testsuite/gas/i386/raoint.d b/gas/testsuite/gas/i386/raoint.d
new file mode 100644
index 0000000..4fa9f78
--- /dev/null
+++ b/gas/testsuite/gas/i386/raoint.d
@@ -0,0 +1,19 @@
+#as:
+#objdump: -dw
+#name: i386 RAO_INT insns
+#source: raoint.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*0f 38 fc 10\s+aadd %edx,\(%eax\)
+\s*[a-f0-9]+:\s*66 0f 38 fc 10\s+aand %edx,\(%eax\)
+\s*[a-f0-9]+:\s*f2 0f 38 fc 10\s+aor %edx,\(%eax\)
+\s*[a-f0-9]+:\s*f3 0f 38 fc 10\s+axor %edx,\(%eax\)
+\s*[a-f0-9]+:\s*0f 38 fc 10\s+aadd %edx,\(%eax\)
+\s*[a-f0-9]+:\s*66 0f 38 fc 10\s+aand %edx,\(%eax\)
+\s*[a-f0-9]+:\s*f2 0f 38 fc 10\s+aor %edx,\(%eax\)
+\s*[a-f0-9]+:\s*f3 0f 38 fc 10\s+axor %edx,\(%eax\)
+#pass
diff --git a/gas/testsuite/gas/i386/raoint.s b/gas/testsuite/gas/i386/raoint.s
new file mode 100644
index 0000000..04a13dd
--- /dev/null
+++ b/gas/testsuite/gas/i386/raoint.s
@@ -0,0 +1,15 @@
+# Check 32bit RAO-INT instructions
+
+ .allow_index_reg
+ .text
+_start:
+ aadd %edx, (%eax) #RAO-INT
+ aand %edx, (%eax) #RAO-INT
+ aor %edx, (%eax) #RAO-INT
+ axor %edx, (%eax) #RAO-INT
+
+.intel_syntax noprefix
+ aadd DWORD PTR [eax], %edx #RAO-INT
+ aand DWORD PTR [eax], %edx #RAO-INT
+ aor DWORD PTR [eax], %edx #RAO-INT
+ axor DWORD PTR [eax], %edx #RAO-INT
diff --git a/gas/testsuite/gas/i386/x86-64-raoint-intel.d b/gas/testsuite/gas/i386/x86-64-raoint-intel.d
new file mode 100644
index 0000000..09bb6f4
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-raoint-intel.d
@@ -0,0 +1,19 @@
+#as:
+#objdump: -dw -Mintel
+#name: x86_64 RAO_INT insns (Intel disassembly)
+#source: x86-64-raoint.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*48 0f 38 fc 10\s+aadd QWORD PTR \[rax\],rdx
+\s*[a-f0-9]+:\s*66 48 0f 38 fc 10\s+aand QWORD PTR \[rax\],rdx
+\s*[a-f0-9]+:\s*f2 48 0f 38 fc 10\s+aor QWORD PTR \[rax\],rdx
+\s*[a-f0-9]+:\s*f3 48 0f 38 fc 10\s+axor QWORD PTR \[rax\],rdx
+\s*[a-f0-9]+:\s*48 0f 38 fc 10\s+aadd QWORD PTR \[rax\],rdx
+\s*[a-f0-9]+:\s*66 48 0f 38 fc 10\s+aand QWORD PTR \[rax\],rdx
+\s*[a-f0-9]+:\s*f2 48 0f 38 fc 10\s+aor QWORD PTR \[rax\],rdx
+\s*[a-f0-9]+:\s*f3 48 0f 38 fc 10\s+axor QWORD PTR \[rax\],rdx
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-raoint.d b/gas/testsuite/gas/i386/x86-64-raoint.d
new file mode 100644
index 0000000..3a235ad
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-raoint.d
@@ -0,0 +1,19 @@
+#as:
+#objdump: -dw
+#name: x86_64 RAO_INT insns
+#source: x86-64-raoint.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*48 0f 38 fc 10\s+aadd %rdx,\(%rax\)
+\s*[a-f0-9]+:\s*66 48 0f 38 fc 10\s+aand %rdx,\(%rax\)
+\s*[a-f0-9]+:\s*f2 48 0f 38 fc 10\s+aor %rdx,\(%rax\)
+\s*[a-f0-9]+:\s*f3 48 0f 38 fc 10\s+axor %rdx,\(%rax\)
+\s*[a-f0-9]+:\s*48 0f 38 fc 10\s+aadd %rdx,\(%rax\)
+\s*[a-f0-9]+:\s*66 48 0f 38 fc 10\s+aand %rdx,\(%rax\)
+\s*[a-f0-9]+:\s*f2 48 0f 38 fc 10\s+aor %rdx,\(%rax\)
+\s*[a-f0-9]+:\s*f3 48 0f 38 fc 10\s+axor %rdx,\(%rax\)
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-raoint.s b/gas/testsuite/gas/i386/x86-64-raoint.s
new file mode 100644
index 0000000..645bcfc
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-raoint.s
@@ -0,0 +1,15 @@
+# Check 64bit RAO_INT instructions
+
+ .allow_index_reg
+ .text
+_start:
+ aadd %rdx, (%rax) #RAO-INT
+ aand %rdx, (%rax) #RAO-INT
+ aor %rdx, (%rax) #RAO-INT
+ axor %rdx, (%rax) #RAO-INT
+
+.intel_syntax noprefix
+ aadd QWORD PTR [rax], %rdx #RAO-INT
+ aand QWORD PTR [rax], %rdx #RAO-INT
+ aor QWORD PTR [rax], %rdx #RAO-INT
+ axor QWORD PTR [rax], %rdx #RAO-INT