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author | Matthew Wahab <matthew.wahab@arm.com> | 2015-12-11 10:22:40 +0000 |
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committer | Matthew Wahab <matthew.wahab@arm.com> | 2015-12-11 10:22:40 +0000 |
commit | 1e6f4800fc01c7957d0688158385aba3bf5ce8de (patch) | |
tree | bea10feba856f6bc823faf5b009f788f11333d45 /gas | |
parent | 9ed608f98b2c8c483c994f884429420e74835417 (diff) | |
download | fsf-binutils-gdb-1e6f4800fc01c7957d0688158385aba3bf5ce8de.zip fsf-binutils-gdb-1e6f4800fc01c7957d0688158385aba3bf5ce8de.tar.gz fsf-binutils-gdb-1e6f4800fc01c7957d0688158385aba3bf5ce8de.tar.bz2 |
[AArch64][Patch 5/5] Add instruction PSB CSYNC
The Statistical Profile Extension adds the instruction PSB CSYNC as an
alias for the HINT #17 instruction. This patch adds the instruction to
binutils as a HINT alias that takes an operand.
A new operand type, AARCH64_OPND_BARRIER_PSB, is added to represent the
operand to PSB. A parser for the operand type is added to the assembler
and a printer to the disassembler. The operand name "csync" is added to
the list of HINT options with HINT number #17. Encoding and decoding of
the operand is handled by the ins_hint/ext_hint functions added in the
preceding patches.
gas/
2015-12-11 Matthew Wahab <matthew.wahab@arm.com>
* config/tc-aarch64.c (aarch64_hint_opt_hsh): New.
(parse_barrier_psb): New.
(parse_operands): Add case for AARCH64_OPND_BARRIER_PSB.
(md_begin): Set up aarch64_hint_opt_hsh.
gas/testsuite/
2015-12-11 Matthew Wahab <matthew.wahab@arm.com>
* gas/aarch64/system-2.d: Enable the statistical profiling
extension. Update the expected output.
* gas/aarch64/system-2.s: Add tests for PSB CSYNC.
* gas/aarch64/system.d: Update the expected output.
include/opcode/
2015-12-11 Matthew Wahab <matthew.wahab@arm.com>
* aarch64.h (aarch64_opnd): Add AARCH64_OPND_BARRIER_PSB.
* aarch64-asm-2.c: Regenerate.
* aarch64-dis-2.c: Regenerate.
* aarch64-opc-2.c: Regenerate.
* aarch64-opc.c (aarch64_hint_options): Add "csync".
(aarch64_print_operands): Handle AARCH64_OPND_BARRIER_PSB.
* aarch64-tbl.h (aarch64_feature_stat_profile): New.
(STAT_PROFILE): New.
(aarch64_opcode_table): Add "psb".
(AARCH64_OPERANDS): Add "BARRIER_PSB".
Change-Id: I5ffb672d26a8b15b48785478d359350a9b70ca09
Diffstat (limited to 'gas')
-rw-r--r-- | gas/ChangeLog | 7 | ||||
-rw-r--r-- | gas/config/tc-aarch64.c | 56 | ||||
-rw-r--r-- | gas/testsuite/ChangeLog | 7 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/system-2.d | 4 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/system-2.s | 4 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/system.d | 2 |
6 files changed, 77 insertions, 3 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 2fcad8e..f69d006 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,12 @@ 2015-12-11 Matthew Wahab <matthew.wahab@arm.com> + * config/tc-aarch64.c (aarch64_hint_opt_hsh): New. + (parse_barrier_psb): New. + (parse_operands): Add case for AARCH64_OPND_BARRIER_PSB. + (md_begin): Set up aarch64_hint_opt_hsh. + +2015-12-11 Matthew Wahab <matthew.wahab@arm.com> + * config/tc-aarch64.c (aarch64_features): Add "profile". * doc/c-aarch64.texi (AArch64 Extensions): Add "profile". diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c index 2f115ec..2685ae8 100644 --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c @@ -406,6 +406,7 @@ static struct hash_control *aarch64_reg_hsh; static struct hash_control *aarch64_barrier_opt_hsh; static struct hash_control *aarch64_nzcv_hsh; static struct hash_control *aarch64_pldop_hsh; +static struct hash_control *aarch64_hint_opt_hsh; /* Stuff needed to resolve the label ambiguity As: @@ -3604,6 +3605,41 @@ parse_barrier (char **str) return o->value; } +/* Parse an operand for a PSB barrier. Set *HINT_OPT to the hint-option record + return 0 if successful. Otherwise return PARSE_FAIL. */ + +static int +parse_barrier_psb (char **str, + const struct aarch64_name_value_pair ** hint_opt) +{ + char *p, *q; + const struct aarch64_name_value_pair *o; + + p = q = *str; + while (ISALPHA (*q)) + q++; + + o = hash_find_n (aarch64_hint_opt_hsh, p, q - p); + if (!o) + { + set_fatal_syntax_error + ( _("unknown or missing option to PSB")); + return PARSE_FAIL; + } + + if (o->value != 0x11) + { + /* PSB only accepts option name 'CSYNC'. */ + set_syntax_error + (_("the specified option is not accepted for PSB")); + return PARSE_FAIL; + } + + *str = q; + *hint_opt = o; + return 0; +} + /* Parse a system register or a PSTATE field name for an MSR/MRS instruction. Returns the encoding for the option, or PARSE_FAIL. @@ -5643,6 +5679,12 @@ sys_reg_ins: inst.base.operands[i].prfop = aarch64_prfops + val; break; + case AARCH64_OPND_BARRIER_PSB: + val = parse_barrier_psb (&str, &(info->hint_option)); + if (val == PARSE_FAIL) + goto failure; + break; + default: as_fatal (_("unhandled operand code %d"), operands[i]); } @@ -7506,7 +7548,8 @@ md_begin (void) || (aarch64_reg_hsh = hash_new ()) == NULL || (aarch64_barrier_opt_hsh = hash_new ()) == NULL || (aarch64_nzcv_hsh = hash_new ()) == NULL - || (aarch64_pldop_hsh = hash_new ()) == NULL) + || (aarch64_pldop_hsh = hash_new ()) == NULL + || (aarch64_hint_opt_hsh = hash_new ()) == NULL) as_fatal (_("virtual memory exhausted")); fill_instruction_hash_table (); @@ -7602,6 +7645,17 @@ md_begin (void) (void *) (aarch64_prfops + i)); } + for (i = 0; aarch64_hint_options[i].name != NULL; i++) + { + const char* name = aarch64_hint_options[i].name; + + checked_hash_insert (aarch64_hint_opt_hsh, name, + (void *) (aarch64_hint_options + i)); + /* Also hash the name in the upper case. */ + checked_hash_insert (aarch64_pldop_hsh, get_upper_str (name), + (void *) (aarch64_hint_options + i)); + } + /* Set the cpu variant based on the command-line options. */ if (!mcpu_cpu_opt) mcpu_cpu_opt = march_cpu_opt; diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index dafa360..cd81f93 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,5 +1,12 @@ 2015-12-11 Matthew Wahab <matthew.wahab@arm.com> + * gas/aarch64/system-2.d: Enable the statistical profiling + extension. Update the expected output. + * gas/aarch64/system-2.s: Add tests for PSB CSYNC. + * gas/aarch64/system.d: Update the expected output. + +2015-12-11 Matthew Wahab <matthew.wahab@arm.com> + * gas/aarch64/sysreg-2.s: Add tests for the statistical profiling system registers. * gas/aarch64/sysreg-2.d: Enable the statistical profiling diff --git a/gas/testsuite/gas/aarch64/system-2.d b/gas/testsuite/gas/aarch64/system-2.d index 9b379cf..f999348 100644 --- a/gas/testsuite/gas/aarch64/system-2.d +++ b/gas/testsuite/gas/aarch64/system-2.d @@ -1,4 +1,4 @@ -#as: -march=armv8.2-a +#as: -march=armv8.2-a+profile #objdump: -dr .*: file format .* @@ -8,3 +8,5 @@ Disassembly of section \.text: 0000000000000000 <.*>: 0: d503221f esb 4: d503221f esb + 8: d503223f psb csync + c: d503223f psb csync diff --git a/gas/testsuite/gas/aarch64/system-2.s b/gas/testsuite/gas/aarch64/system-2.s index 9b7f216..3402e76 100644 --- a/gas/testsuite/gas/aarch64/system-2.s +++ b/gas/testsuite/gas/aarch64/system-2.s @@ -4,3 +4,7 @@ /* RAS Extension. */ esb hint #0x10 + + /* Statistical profiling. */ + psb csync + hint #0x11 diff --git a/gas/testsuite/gas/aarch64/system.d b/gas/testsuite/gas/aarch64/system.d index d4dcf86..2da13ee 100644 --- a/gas/testsuite/gas/aarch64/system.d +++ b/gas/testsuite/gas/aarch64/system.d @@ -29,7 +29,7 @@ Disassembly of section \.text: 54: d50321df hint #0xe 58: d50321ff hint #0xf 5c: d503221f (hint #0x10|esb) - 60: d503223f hint #0x11 + 60: d503223f (hint #0x11|psb csync) 64: d503225f hint #0x12 68: d503227f hint #0x13 6c: d503229f hint #0x14 |