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| author | Matthew Wahab <matthew.wahab@arm.com> | 2015-12-10 16:38:44 +0000 |
|---|---|---|
| committer | Matthew Wahab <matthew.wahab@arm.com> | 2015-12-10 16:40:45 +0000 |
| commit | d6bf7ce6c26cd31fe744419269dea999a3faaf8c (patch) | |
| tree | fe3bd85148f9052f67f022ce3459aea363295b9c /gas | |
| parent | ea2deeec92695c33045d71ffa73add6305b17b9a (diff) | |
| download | fsf-binutils-gdb-d6bf7ce6c26cd31fe744419269dea999a3faaf8c.zip fsf-binutils-gdb-d6bf7ce6c26cd31fe744419269dea999a3faaf8c.tar.gz fsf-binutils-gdb-d6bf7ce6c26cd31fe744419269dea999a3faaf8c.tar.bz2 | |
[AArch64][PATCH 2/2] Support ARMv8.2 DC CVAP instruction.
ARMv8.2 adds the new system instruction DC CVAP. This patch adds support
for the instruction to binutils, enabled when -march=armv8.2-a is
selected.
gas/
2015-12-10 Matthew Wahab <matthew.wahab@arm.com>
* config/tc-aarch64.c (parse_sys_ins_reg): Add check of
architectural support for system register.
gas/testsuite/
2015-12-10 Matthew Wahab <matthew.wahab@arm.com>
* gas/aarch64/sysreg-2.d: Add tests for dc instruction.
* gas/aarch64/sysreg-2.s: Add uses of dc instruction.
include/opcode/
2015-12-10 Matthew Wahab <matthew.wahab@arm.com>
* aarch64.h (aarch64_sys_ins_reg_supported_p): Declare.
opcodes/
2015-12-10 Matthew Wahab <matthew.wahab@arm.com>
* aarch64-opc.c (aarch64_sys_regs_dc): Add "cvap".
(aarch64_sys_ins_reg_supported_p): New.
Change-Id: I3158b97d9bbee9644c2d0e2986db807412ef1053
Diffstat (limited to 'gas')
| -rw-r--r-- | gas/ChangeLog | 5 | ||||
| -rw-r--r-- | gas/config/tc-aarch64.c | 4 | ||||
| -rw-r--r-- | gas/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/sysreg-2.d | 3 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/sysreg-2.s | 6 |
5 files changed, 23 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 8b95bdd..aa6454e 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,8 @@ +2015-12-10 Matthew Wahab <matthew.wahab@arm.com> + + * config/tc-aarch64.c (parse_sys_ins_reg): Add check of + architectural support for system register. + 2015-12-10 Jose E. Marchesi <jose.marchesi@oracle.com> * doc/c-sparc.texi (Sparc-Regs): Document the %dN and %qN notation diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c index d306710..bb2f228 100644 --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c @@ -3687,6 +3687,10 @@ parse_sys_ins_reg (char **str, struct hash_control *sys_ins_regs) if (!o) return NULL; + if (!aarch64_sys_ins_reg_supported_p (cpu_variant, o)) + as_bad (_("selected processor does not support system register " + "name '%s'"), buf); + *str = q; return o; } diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index aecac6a..1a2f004 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,5 +1,10 @@ 2015-12-10 Matthew Wahab <matthew.wahab@arm.com> + * gas/aarch64/sysreg-2.d: Add tests for dc instruction. + * gas/aarch64/sysreg-2.s: Add uses of dc instruction. + +2015-12-10 Matthew Wahab <matthew.wahab@arm.com> + * gas/aarch64/uao-directive.d: New. * gas/aarch64/uao.d: New. * gas/aarch64/uao.s: New. diff --git a/gas/testsuite/gas/aarch64/sysreg-2.d b/gas/testsuite/gas/aarch64/sysreg-2.d index 31b9f33..dffe08f 100644 --- a/gas/testsuite/gas/aarch64/sysreg-2.d +++ b/gas/testsuite/gas/aarch64/sysreg-2.d @@ -27,3 +27,6 @@ Disassembly of section .text: [0-9a-f]+: d518c125 msr disr_el1, x5 [0-9a-f]+: d538c125 mrs x5, disr_el1 [0-9a-f]+: d53cc125 mrs x5, vdisr_el2 + [0-9a-f]+: d50b7a20 dc cvac, x0 + [0-9a-f]+: d50b7b21 dc cvau, x1 + [0-9a-f]+: d50b7c22 dc cvap, x2 diff --git a/gas/testsuite/gas/aarch64/sysreg-2.s b/gas/testsuite/gas/aarch64/sysreg-2.s index 2a6b06c..62b3a5e 100644 --- a/gas/testsuite/gas/aarch64/sysreg-2.s +++ b/gas/testsuite/gas/aarch64/sysreg-2.s @@ -30,3 +30,9 @@ rw_sys_reg sys_reg=vsesr_el2 xreg=x5 r=1 w=0 rw_sys_reg sys_reg=disr_el1 xreg=x5 r=1 w=1 rw_sys_reg sys_reg=vdisr_el2 xreg=x5 r=1 w=0 + + /* DC CVAP. */ + + dc cvac, x0 + dc cvau, x1 + dc cvap, x2 |