Enable Intel MOVDIRI, MOVDIR64B instructions

gas/

	* config/tc-i386.c (cpu_arch): Add .movdir, .movdir64b.
	(cpu_noarch): Likewise.
	(process_suffix): Add check for register size.
	* doc/c-i386.texi: Document movdiri, movdir64b.
	* testsuite/gas/i386/i386.exp: Run MOVDIR{I,64B} tests.
	* testsuite/gas/i386/movdir-intel.d: New file.
	* testsuite/gas/i386/movdir.d: Likewise.
	* testsuite/gas/i386/movdir.s: Likewise.
	* testsuite/gas/i386/movdir64b-reg.s: Likewise.
	* testsuite/gas/i386/movdir64b-reg.l: Likewise.
	* testsuite/gas/i386/x86-64-movdir-intel.d: Likewise.
	* testsuite/gas/i386/x86-64-movdir.d: Likewise.
	* testsuite/gas/i386/x86-64-movdir.s: Likewise.
	* testsuite/gas/i386/x86-64-movdir64b-reg.s: Likewise.
	* testsuite/gas/i386/x86-64-movdir64b-reg.l: Likewise.

opcodes/

	* i386-dis.c (Gva): New.
	(enum): Add PREFIX_0F38F8, PREFIX_0F38F9,
	MOD_0F38F8_PREFIX_2, MOD_0F38F9_PREFIX_0.
	(prefix_table): New instructions (see prefix above).
	(mod_table): New instructions (see prefix above).
	(OP_G): Handle va_mode.
	* i386-gen.c (cpu_flag_init): Add CPU_MOVDIRI_FLAGS,
	CPU_MOVDIR64B_FLAGS.
	(cpu_flags): Add CpuMOVDIRI and CpuMOVDIR64B.
	* i386-opc.h (enum): Add CpuMOVDIRI, CpuMOVDIR64B.
	(i386_cpu_flags): Add cpumovdiri and cpumovdir64b.
	* i386-opc.tbl: Add movidir{i,64b}.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

14 files changed, 199 insertions, 0 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index fe622f8..971e42a 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,22 @@
+2018-05-07  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
+	    H.J. Lu  <hongjiu.lu@intel.com>
+
+	* config/tc-i386.c (cpu_arch): Add .movdir, .movdir64b.
+	(cpu_noarch): Likewise.
+	(process_suffix): Add check for register size.
+	* doc/c-i386.texi: Document movdiri, movdir64b.
+	* testsuite/gas/i386/i386.exp: Run MOVDIR{I,64B} tests.
+	* testsuite/gas/i386/movdir-intel.d: New file.
+	* testsuite/gas/i386/movdir.d: Likewise.
+	* testsuite/gas/i386/movdir.s: Likewise.
+	* testsuite/gas/i386/movdir64b-reg.s: Likewise.
+	* testsuite/gas/i386/movdir64b-reg.l: Likewise.
+	* testsuite/gas/i386/x86-64-movdir-intel.d: Likewise.
+	* testsuite/gas/i386/x86-64-movdir.d: Likewise.
+	* testsuite/gas/i386/x86-64-movdir.s: Likewise.
+	* testsuite/gas/i386/x86-64-movdir64b-reg.s: Likewise.
+	* testsuite/gas/i386/x86-64-movdir64b-reg.l: Likewise.
+
 2018-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 
 	* config/tc-i386.c (process_suffix): Check addrprefixopreg
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index b4c93a2..be31d9e 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -1029,6 +1029,10 @@ static const arch_entry cpu_arch[] =
     CPU_WAITPKG_FLAGS, 0 },
   { STRING_COMMA_LEN (".cldemote"), PROCESSOR_UNKNOWN,
     CPU_CLDEMOTE_FLAGS, 0 },
+  { STRING_COMMA_LEN (".movdiri"), PROCESSOR_UNKNOWN,
+    CPU_MOVDIRI_FLAGS, 0 },
+  { STRING_COMMA_LEN (".movdir64b"), PROCESSOR_UNKNOWN,
+    CPU_MOVDIR64B_FLAGS, 0 },
 };
 
 static const noarch_entry cpu_noarch[] =
@@ -1064,6 +1068,8 @@ static const noarch_entry cpu_noarch[] =
   { STRING_COMMA_LEN ("noavx512_bitalg"), CPU_ANY_AVX512_BITALG_FLAGS },
   { STRING_COMMA_LEN ("noibt"), CPU_ANY_IBT_FLAGS },
   { STRING_COMMA_LEN ("noshstk"), CPU_ANY_SHSTK_FLAGS },
+  { STRING_COMMA_LEN ("nomovdiri"), CPU_ANY_MOVDIRI_FLAGS },
+  { STRING_COMMA_LEN ("nomovdir64b"), CPU_ANY_MOVDIR64B_FLAGS },
 };
 
 #ifdef I386COFF
@@ -6044,6 +6050,41 @@ process_suffix (void)
       break;
     }
 
+  if (i.reg_operands != 0
+      && i.operands > 1
+      && i.tm.opcode_modifier.addrprefixopreg
+      && !i.tm.opcode_modifier.immext)
+    {
+      /* Check invalid register operand when the address size override
+	 prefix changes the size of register operands.  */
+      unsigned int op;
+      enum { need_word, need_dword, need_qword } need;
+
+      if (flag_code == CODE_32BIT)
+	need = i.prefix[ADDR_PREFIX] ? need_word : need_dword;
+      else
+	{
+	  if (i.prefix[ADDR_PREFIX])
+	    need = need_dword;
+	  else
+	    need = flag_code == CODE_64BIT ? need_qword : need_word;
+	}
+
+      for (op = 0; op < i.operands; op++)
+	if (i.types[op].bitfield.reg
+	    && ((need == need_word
+		 && !i.op[op].regs->reg_type.bitfield.word)
+		|| (need == need_dword
+		    && !i.op[op].regs->reg_type.bitfield.dword)
+		|| (need == need_qword
+		    && !i.op[op].regs->reg_type.bitfield.qword)))
+	  {
+	    as_bad (_("invalid register operand size for `%s'"),
+		    i.tm.name);
+	    return 0;
+	  }
+    }
+
   return 1;
 }
 
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
index 3d459e2..7e07755 100644
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -176,6 +176,8 @@ accept various extension mnemonics.  For example,
 @code{clflushopt},
 @code{se1},
 @code{clwb},
+@code{movdiri},
+@code{movdir64b},
 @code{avx512f},
 @code{avx512cd},
 @code{avx512er},
@@ -1276,6 +1278,7 @@ supported on the CPU specified.  The choices for @var{cpu_type} are:
 @item @samp{.clwb} @tab @samp{.rdpid} @tab @samp{.ptwrite} @tab @item @samp{.ibt}
 @item @samp{.wbnoinvd} @tab @samp{.pconfig} @tab @samp{.waitpkg} @tab @samp{.cldemote}
 @item @samp{.shstk} @tab @samp{.gfni} @tab @samp{.vaes} @tab @samp{.vpclmulqdq}
+@item @samp{.movdiri} @tab @samp{.movdir64b}
 @item @samp{.3dnow} @tab @samp{.3dnowa} @tab @samp{.sse4a} @tab @samp{.sse5}
 @item @samp{.syscall} @tab @samp{.rdtscp} @tab @samp{.svme} @tab @samp{.abm}
 @item @samp{.lwp} @tab @samp{.fma4} @tab @samp{.xop} @tab @samp{.cx16}
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index e061c67..c691a02 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -431,6 +431,9 @@ if [expr ([istarget "i*86-*-*"] ||  [istarget "x86_64-*-*"]) && [gas_32_check]]
     run_dump_test "waitpkg-intel"
     run_dump_test "cldemote"
     run_dump_test "cldemote-intel"
+    run_dump_test "movdir"
+    run_dump_test "movdir-intel"
+    run_list_test "movdir64b-reg"
     run_list_test "avx512vl-1" "-al"
     run_list_test "avx512vl-2" "-al"
     run_list_test "avx512vl-plain" "-al"
@@ -924,6 +927,9 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
     run_dump_test "x86-64-waitpkg-intel"
     run_dump_test "x86-64-cldemote"
     run_dump_test "x86-64-cldemote-intel"
+    run_dump_test "x86-64-movdir"
+    run_dump_test "x86-64-movdir-intel"
+    run_list_test "x86-64-movdir64b-reg"
     run_dump_test "x86-64-fence-as-lock-add-yes"
     run_dump_test "x86-64-fence-as-lock-add-no"
     run_dump_test "x86-64-pr20141"
diff --git a/gas/testsuite/gas/i386/movdir-intel.d b/gas/testsuite/gas/i386/movdir-intel.d
new file mode 100644
index 0000000..d6eab9c
--- /dev/null
+++ b/gas/testsuite/gas/i386/movdir-intel.d
@@ -0,0 +1,18 @@
+#as:
+#objdump: -dw -Mintel
+#name: i386 MOVDIR[I,64B] insns (Intel disassembly)
+#source: movdir.s
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+00000000 <_start>:
+[ 	]*[a-f0-9]+:[ 	]*0f 38 f9 01[ 	]*movdiri DWORD PTR \[ecx\],eax
+[ 	]*[a-f0-9]+:[ 	]*66 0f 38 f8 01[ 	]*movdir64b eax,\[ecx\]
+[ 	]*[a-f0-9]+:[ 	]*67 66 0f 38 f8 04[ 	]*movdir64b ax,\[si\]
+[ 	]*[a-f0-9]+:[ 	]*0f 38 f9 01[ 	]*movdiri DWORD PTR \[ecx\],eax
+[ 	]*[a-f0-9]+:[ 	]*66 0f 38 f8 01[ 	]*movdir64b eax,\[ecx\]
+[ 	]*[a-f0-9]+:[ 	]*67 66 0f 38 f8 04[ 	]*movdir64b ax,\[si\]
+#pass
diff --git a/gas/testsuite/gas/i386/movdir.d b/gas/testsuite/gas/i386/movdir.d
new file mode 100644
index 0000000..852b20d
--- /dev/null
+++ b/gas/testsuite/gas/i386/movdir.d
@@ -0,0 +1,18 @@
+#as:
+#objdump: -dw
+#name: i386 MOVDIR[I,64B] insns
+#source: movdir.s
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+00000000 <_start>:
+[ 	]*[a-f0-9]+:[ 	]*0f 38 f9 01[ 	]*movdiri %eax,\(%ecx\)
+[ 	]*[a-f0-9]+:[ 	]*66 0f 38 f8 01[ 	]*movdir64b \(%ecx\),%eax
+[ 	]*[a-f0-9]+:[ 	]*67 66 0f 38 f8 04[ 	]*movdir64b \(%si\),%ax
+[ 	]*[a-f0-9]+:[ 	]*0f 38 f9 01[ 	]*movdiri %eax,\(%ecx\)
+[ 	]*[a-f0-9]+:[ 	]*66 0f 38 f8 01[ 	]*movdir64b \(%ecx\),%eax
+[ 	]*[a-f0-9]+:[ 	]*67 66 0f 38 f8 04[ 	]*movdir64b \(%si\),%ax
+#pass
diff --git a/gas/testsuite/gas/i386/movdir.s b/gas/testsuite/gas/i386/movdir.s
new file mode 100644
index 0000000..28dfa61
--- /dev/null
+++ b/gas/testsuite/gas/i386/movdir.s
@@ -0,0 +1,13 @@
+# Check MOVDIR[I,64B] 32-bit instructions
+
+	.allow_index_reg
+	.text
+_start:
+	movdiri %eax, (%ecx)
+	movdir64b (%ecx),%eax
+	movdir64b (%si),%ax
+
+	.intel_syntax noprefix
+	movdiri [ecx], eax
+	movdir64b eax,[ecx]
+	movdir64b ax,[si]
diff --git a/gas/testsuite/gas/i386/movdir64b-reg.l b/gas/testsuite/gas/i386/movdir64b-reg.l
new file mode 100644
index 0000000..e01d20d
--- /dev/null
+++ b/gas/testsuite/gas/i386/movdir64b-reg.l
@@ -0,0 +1,5 @@
+.*: Assembler messages:
+.*:6: Error: invalid register operand size for `movdir64b'
+.*:7: Error: invalid register operand size for `movdir64b'
+.*:10: Error: invalid register operand size for `movdir64b'
+.*:11: Error: invalid register operand size for `movdir64b'
diff --git a/gas/testsuite/gas/i386/movdir64b-reg.s b/gas/testsuite/gas/i386/movdir64b-reg.s
new file mode 100644
index 0000000..ace5e86
--- /dev/null
+++ b/gas/testsuite/gas/i386/movdir64b-reg.s
@@ -0,0 +1,11 @@
+# Check error for MOVDIR64B 32-bit instructions
+
+	.allow_index_reg
+	.text
+_start:
+	movdir64b (%si),%eax
+	movdir64b (%esi),%ax
+
+	.intel_syntax noprefix
+	movdir64b eax,[si]
+	movdir64b ax,[esi]
diff --git a/gas/testsuite/gas/i386/x86-64-movdir-intel.d b/gas/testsuite/gas/i386/x86-64-movdir-intel.d
new file mode 100644
index 0000000..f6c2548
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-movdir-intel.d
@@ -0,0 +1,18 @@
+#as:
+#objdump: -dw -Mintel
+#name: x86_64 MOVDIR[I,64B] insns (Intel disassembly)
+#source: x86-64-movdir.s
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:[ 	]*48 0f 38 f9 01[ 	]*movdiri QWORD PTR \[rcx\],rax
+[ 	]*[a-f0-9]+:[ 	]*66 0f 38 f8 01[ 	]*movdir64b rax,\[rcx\]
+[ 	]*[a-f0-9]+:[ 	]*67 66 0f 38 f8 01[ 	]*movdir64b eax,\[ecx]
+[ 	]*[a-f0-9]+:[ 	]*48 0f 38 f9 01[ 	]*movdiri QWORD PTR \[rcx\],rax
+[ 	]*[a-f0-9]+:[ 	]*66 0f 38 f8 01[ 	]*movdir64b rax,\[rcx\]
+[ 	]*[a-f0-9]+:[ 	]*67 66 0f 38 f8 01[ 	]*movdir64b eax,\[ecx\]
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-movdir.d b/gas/testsuite/gas/i386/x86-64-movdir.d
new file mode 100644
index 0000000..fd7f4e5
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-movdir.d
@@ -0,0 +1,18 @@
+#as:
+#objdump: -dw
+#name: x86_64 MOVDIR[I,64B] insns
+#source: x86-64-movdir.s
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:[ 	]*48 0f 38 f9 01[ 	]*movdiri %rax,\(%rcx\)
+[ 	]*[a-f0-9]+:[ 	]*66 0f 38 f8 01[ 	]*movdir64b \(%rcx\),%rax
+[ 	]*[a-f0-9]+:[ 	]*67 66 0f 38 f8 01[ 	]*movdir64b \(%ecx\),%eax
+[ 	]*[a-f0-9]+:[ 	]*48 0f 38 f9 01[ 	]*movdiri %rax,\(%rcx\)
+[ 	]*[a-f0-9]+:[ 	]*66 0f 38 f8 01[ 	]*movdir64b \(%rcx\),%rax
+[ 	]*[a-f0-9]+:[ 	]*67 66 0f 38 f8 01[ 	]*movdir64b \(%ecx\),%eax
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-movdir.s b/gas/testsuite/gas/i386/x86-64-movdir.s
new file mode 100644
index 0000000..f0fe267
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-movdir.s
@@ -0,0 +1,13 @@
+# Check MOVDIR[I,64B] 64-bit instructions
+
+	.allow_index_reg
+	.text
+_start:
+	movdiri %rax, (%rcx)
+	movdir64b (%rcx),%rax
+	movdir64b (%ecx),%eax
+
+	.intel_syntax noprefix
+	movdiri [rcx],rax
+	movdir64b rax,[rcx]
+	movdir64b eax,[ecx]
diff --git a/gas/testsuite/gas/i386/x86-64-movdir64b-reg.l b/gas/testsuite/gas/i386/x86-64-movdir64b-reg.l
new file mode 100644
index 0000000..e01d20d
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-movdir64b-reg.l
@@ -0,0 +1,5 @@
+.*: Assembler messages:
+.*:6: Error: invalid register operand size for `movdir64b'
+.*:7: Error: invalid register operand size for `movdir64b'
+.*:10: Error: invalid register operand size for `movdir64b'
+.*:11: Error: invalid register operand size for `movdir64b'
diff --git a/gas/testsuite/gas/i386/x86-64-movdir64b-reg.s b/gas/testsuite/gas/i386/x86-64-movdir64b-reg.s
new file mode 100644
index 0000000..4aeb6d3
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-movdir64b-reg.s
@@ -0,0 +1,11 @@
+# Check error for MOVDIR64B 32-bit instructions
+
+	.allow_index_reg
+	.text
+_start:
+	movdir64b (%esi),%rax
+	movdir64b (%rsi),%eax
+
+	.intel_syntax noprefix
+	movdir64b rax,[esi]
+	movdir64b eax,[rsi]