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| author | Jan Beulich <jbeulich@suse.com> | 2020-03-06 08:56:47 +0100 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2020-03-06 08:56:47 +0100 |
| commit | bc49bfd849a9291b61bbe314505a35d07e130347 (patch) | |
| tree | 403a7f85a37f25b920867be2c06700f85794a632 /gas | |
| parent | 4873e2438cf87b14476459ca90b58ed8a7401181 (diff) | |
| download | fsf-binutils-gdb-bc49bfd849a9291b61bbe314505a35d07e130347.zip fsf-binutils-gdb-bc49bfd849a9291b61bbe314505a35d07e130347.tar.gz fsf-binutils-gdb-bc49bfd849a9291b61bbe314505a35d07e130347.tar.bz2 | |
x86: reduce amount of various VCVT* templates
Presumably as a result of various changes over the last several months,
and - for some of them - with a generalization of logic in
match_mem_size() plus mirroring of this generalization into the
broadcast handling logic of check_VecOperands(), various register-only
templates can be foled into their respective memory forms. This in
particular then also allows dropping a few more instances of IgnoreSize.
Diffstat (limited to 'gas')
| -rw-r--r-- | gas/ChangeLog | 8 | ||||
| -rw-r--r-- | gas/config/tc-i386.c | 20 |
2 files changed, 23 insertions, 5 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index addef7e..f81ec12 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,13 @@ 2020-03-06 Jan Beulich <jbeulich@suse.com> + * config/tc-i386.c (match_mem_size): Generalize broadcast special + casing. + (check_VecOperands): Zap xmmword/ymmword/zmmword when more than + one of byte/word/dword/qword is set alongside a SIMD register in + a template's operand. + +2020-03-06 Jan Beulich <jbeulich@suse.com> + * config/tc-i386.c (match_template): Extend code in logic rejecting certain suffixes in certain modes to also cover mask register use and VecSIB. Drop special casing of broadcast. Skip diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 3b84ca7..b020f39 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -2145,11 +2145,11 @@ match_mem_size (const insn_template *t, unsigned int wanted, here. Also for v{,p}broadcast*, {,v}pmov{s,z}*, and down-conversion vpmov*. */ || ((t->operand_types[wanted].bitfield.class == RegSIMD - && !t->opcode_modifier.broadcast - && (t->operand_types[wanted].bitfield.byte - || t->operand_types[wanted].bitfield.word - || t->operand_types[wanted].bitfield.dword - || t->operand_types[wanted].bitfield.qword)) + && t->operand_types[wanted].bitfield.byte + + t->operand_types[wanted].bitfield.word + + t->operand_types[wanted].bitfield.dword + + t->operand_types[wanted].bitfield.qword + > !!t->opcode_modifier.broadcast) ? (i.types[given].bitfield.xmmword || i.types[given].bitfield.ymmword || i.types[given].bitfield.zmmword) @@ -5533,6 +5533,16 @@ check_VecOperands (const insn_template *t) } overlap = operand_type_and (type, t->operand_types[op]); + if (t->operand_types[op].bitfield.class == RegSIMD + && t->operand_types[op].bitfield.byte + + t->operand_types[op].bitfield.word + + t->operand_types[op].bitfield.dword + + t->operand_types[op].bitfield.qword > 1) + { + overlap.bitfield.xmmword = 0; + overlap.bitfield.ymmword = 0; + overlap.bitfield.zmmword = 0; + } if (operand_type_all_zero (&overlap)) goto bad_broadcast; |