Add "attn", "lq" and "stq" power4 insns.

6 files changed, 179 insertions, 8 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 9a69d58..84659d0 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,9 @@
+2003-06-10  Alan Modra  <amodra@bigpond.net.au>
+	    Gary Hade <garyhade@us.ibm.com>
+
+	* config/tc-ppc.c (md_assemble): Handle PPC_OPERAND_DQ.
+	(md_apply_fix3): Special case lq insn.
+
 2003-06-10  Richard Sandiford  <rsandifo@redhat.com>
 
 	* config/tc-h8300.c (get_rtsl_operands): Accept unbracketed register
@@ -126,9 +132,9 @@
 2003-06-03  Nick Clifton  <nickc@redhat.com>
 
 	* tc-v850.c (tc-gen_reloc): Translate BFD_RELOC_32 into
-        BFD_RELOC_32_PCREL if the reloc is pc-relative.  Do this
-        before calling bfd_reloc_type_lookup.
-        
+	BFD_RELOC_32_PCREL if the reloc is pc-relative.  Do this
+	before calling bfd_reloc_type_lookup.
+
 2003-06-02  Alan Modra  <amodra@bigpond.net.au>
 
 	* read.c (emit_expr): Set dot_value.
diff --git a/gas/config/tc-ppc.c b/gas/config/tc-ppc.c
index 93739e0..a91420a 100644
--- a/gas/config/tc-ppc.c
+++ b/gas/config/tc-ppc.c
@@ -2447,7 +2447,7 @@ md_assemble (str)
 	    }
 
 	  if (ppc_obj64
-	      && (operand->flags & PPC_OPERAND_DS) != 0)
+	      && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
 	    {
 	      switch (reloc)
 		{
@@ -5714,13 +5714,18 @@ md_apply_fix3 (fixP, valP, seg)
 	    abort ();
 	  {
 	    unsigned char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
-	    unsigned long val;
+	    long val, mask;
 
 	    if (target_big_endian)
-	      val = bfd_getb16 (where);
+	      val = bfd_getb32 (where - 2);
 	    else
-	      val = bfd_getl16 (where);
-	    val |= (value & 0xfffc);
+	      val = bfd_getl32 (where);
+	    mask = 0xfffc;
+	    /* lq insns reserve the four lsbs.  */
+	    if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
+		&& (val & (0x3f << 26)) == (56 << 26))
+	      mask = 0xfff0;
+	    val |= value & mask;
 	    if (target_big_endian)
 	      bfd_putb16 ((bfd_vma) val, where);
 	    else
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 7b14f61..4688b00 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2003-06-10  Gary Hade <garyhade@us.ibm.com>
+
+	* gas/ppc/test2elf64.{s,d}: New test.
+	* gas/ppc/ppc.exp: Run new test.
+
 2003-06-10  Richard Sandiford  <rsandifo@redhat.com>
 
 	* gas/h8300/h8sx_mov_imm.[sd]: New test.
diff --git a/gas/testsuite/gas/ppc/ppc.exp b/gas/testsuite/gas/ppc/ppc.exp
index eda443b..6d3b031 100644
--- a/gas/testsuite/gas/ppc/ppc.exp
+++ b/gas/testsuite/gas/ppc/ppc.exp
@@ -10,6 +10,7 @@ if { [istarget powerpc64*-*-*] || [istarget *-*-elf64*]} then {
     run_dump_test "astest64"
     run_dump_test "astest2_64"
     run_dump_test "test1elf64"
+    run_dump_test "test2elf64"
 } elseif { [istarget powerpc*-*aix*] } then {
     run_dump_test "test1xcoff32"
 } elseif { [istarget powerpc*-*-*bsd*] \
diff --git a/gas/testsuite/gas/ppc/test2elf64.d b/gas/testsuite/gas/ppc/test2elf64.d
new file mode 100644
index 0000000..1a5f386
--- /dev/null
+++ b/gas/testsuite/gas/ppc/test2elf64.d
@@ -0,0 +1,101 @@
+#objdump: -Drx -Mpower4
+#as: -mpower4
+#name: PowerPC Test 2, 64 bit elf, power4 instructions
+
+.*: +file format elf64-powerpc
+.*
+architecture: powerpc:common64, flags 0x0+11:
+HAS_RELOC, HAS_SYMS
+start address 0x0+
+
+Sections:
+Idx Name +Size +VMA +LMA +File off +Algn
+ +0 \.text +0+68 +0+ +0+ +.*
+ +CONTENTS, ALLOC, LOAD, RELOC, READONLY, CODE
+ +1 \.data +0+10 +0+ +0+ +.*
+ +CONTENTS, ALLOC, LOAD, DATA
+ +2 \.bss +0+ +0+ +0+ +.*
+ +ALLOC
+ +3 \.toc +0+30 +0+ +0+ +.*
+ +CONTENTS, ALLOC, LOAD, RELOC, DATA
+SYMBOL TABLE:
+0+ l +d +\.text	0+ 
+0+ l +d +\.data	0+ 
+0+ l +d +\.bss	0+ 
+0+ l +\.data	0+ dsym0
+0+8 l +\.data	0+ dsym1
+0+ l +d +\.toc	0+ 
+0+8 l +\.data	0+ usym0
+0+10 l +\.data	0+ usym1
+0+ +\*UND\*	0+ esym0
+0+ +\*UND\*	0+ esym1
+
+
+Disassembly of section \.text:
+
+0+ <\.text>:
+ +0:	e0 83 00 00 	lq	r4,0\(r3\)
+			2: R_PPC64_ADDR16_LO_DS	dsym0
+ +4:	e0 83 00 00 	lq	r4,0\(r3\)
+			6: R_PPC64_ADDR16_LO_DS	dsym1
+ +8:	e0 83 00 00 	lq	r4,0\(r3\)
+			a: R_PPC64_ADDR16_LO_DS	usym0
+ +c:	e0 83 00 00 	lq	r4,0\(r3\)
+			e: R_PPC64_ADDR16_LO_DS	usym1
+ +10:	e0 83 00 00 	lq	r4,0\(r3\)
+			12: R_PPC64_ADDR16_LO_DS	esym0
+ +14:	e0 83 00 00 	lq	r4,0\(r3\)
+			16: R_PPC64_ADDR16_LO_DS	esym1
+ +18:	e0 82 00 00 	lq	r4,0\(r2\)
+			1a: R_PPC64_TOC16_DS	\.toc
+ +1c:	e0 82 00 00 	lq	r4,0\(r2\)
+			1e: R_PPC64_TOC16_DS	\.toc\+0x8
+ +20:	e0 82 00 10 	lq	r4,16\(r2\)
+			22: R_PPC64_TOC16_DS	\.toc\+0x10
+ +24:	e0 82 00 10 	lq	r4,16\(r2\)
+			26: R_PPC64_TOC16_DS	\.toc\+0x18
+ +28:	e0 82 00 20 	lq	r4,32\(r2\)
+			2a: R_PPC64_TOC16_DS	\.toc\+0x20
+ +2c:	e0 82 00 20 	lq	r4,32\(r2\)
+			2e: R_PPC64_TOC16_DS	\.toc\+0x28
+ +30:	e0 c2 00 20 	lq	r6,32\(r2\)
+			32: R_PPC64_TOC16_LO_DS	\.toc\+0x28
+ +34:	e0 80 00 00 	lq	r4,0\(r0\)
+			36: R_PPC64_ADDR16_LO_DS	\.text
+ +38:	e0 c3 00 00 	lq	r6,0\(r3\)
+			3a: R_PPC64_GOT16_DS	dsym0
+ +3c:	e0 c3 00 00 	lq	r6,0\(r3\)
+			3e: R_PPC64_GOT16_LO_DS	dsym0
+ +40:	e0 c3 00 00 	lq	r6,0\(r3\)
+			42: R_PPC64_PLT16_LO_DS	dsym0
+ +44:	e0 c3 00 00 	lq	r6,0\(r3\)
+			46: R_PPC64_SECTOFF_DS	dsym1
+ +48:	e0 c3 00 00 	lq	r6,0\(r3\)
+			4a: R_PPC64_SECTOFF_LO_DS	dsym1
+ +4c:	e0 c4 00 10 	lq	r6,16\(r4\)
+ +50:	f8 c7 00 02 	stq	r6,0\(r7\)
+ +54:	f8 c7 00 12 	stq	r6,16\(r7\)
+ +58:	f8 c7 ff f2 	stq	r6,-16\(r7\)
+ +5c:	f8 c7 80 02 	stq	r6,-32768\(r7\)
+ +60:	f8 c7 7f f2 	stq	r6,32752\(r7\)
+ +64:	00 00 02 00 	attn
+Disassembly of section \.data:
+
+0+ <dsym0>:
+ +0:	00 00 00 00 	\.long 0x0
+ +4:	de ad be ef 	stfdu	f21,-16657\(r13\)
+
+0+8 <dsym1>:
+ +8:	00 00 00 00 	\.long 0x0
+ +c:	ca fe ba be 	lfd	f23,-17730\(r30\)
+
+Disassembly of section \.toc:
+
+0+ <\.toc>:
+	\.\.\.
+			0: R_PPC64_ADDR64	dsym0
+			8: R_PPC64_ADDR64	dsym1
+			10: R_PPC64_ADDR64	usym0
+			18: R_PPC64_ADDR64	usym1
+			20: R_PPC64_ADDR64	esym0
+			28: R_PPC64_ADDR64	esym1
diff --git a/gas/testsuite/gas/ppc/test2elf64.s b/gas/testsuite/gas/ppc/test2elf64.s
new file mode 100644
index 0000000..3daf4d6
--- /dev/null
+++ b/gas/testsuite/gas/ppc/test2elf64.s
@@ -0,0 +1,53 @@
+
+	.section	".data"
+dsym0:	.llong	0xdeadbeef
+dsym1:
+
+
+	.section	".toc"
+.L_tsym0:
+	.tc	ignored0[TC],dsym0
+.L_tsym1:
+	.tc	ignored1[TC],dsym1
+.L_tsym2:
+	.tc	ignored2[TC],usym0
+.L_tsym3:
+	.tc	ignored3[TC],usym1
+.L_tsym4:
+	.tc	ignored4[TC],esym0
+.L_tsym5:
+	.tc	ignored5[TC],esym1
+
+
+	.section	".text"
+	lq	4,dsym0@l(3)
+	lq	4,dsym1@l(3)
+	lq	4,usym0@l(3)
+	lq	4,usym1@l(3)
+	lq	4,esym0@l(3)
+	lq	4,esym1@l(3)
+	lq	4,.L_tsym0@toc(2)
+	lq	4,.L_tsym1@toc(2)
+	lq	4,.L_tsym2@toc(2)
+	lq	4,.L_tsym3@toc(2)
+	lq	4,.L_tsym4@toc(2)
+	lq	4,.L_tsym5@toc(2)
+	lq	6,.L_tsym5@toc@l(2)
+	lq	4,.text@l(0)	
+	lq	6,dsym0@got(3)
+	lq	6,dsym0@got@l(3)
+	lq	6,dsym0@plt@l(3)
+	lq	6,dsym1@sectoff(3)
+	lq	6,dsym1@sectoff@l(3)
+	lq	6,usym1-dsym0@l(4)
+	stq 6,	0(7)
+	stq 6,	16(7)
+	stq 6,	-16(7)
+	stq 6,	-32768(7)
+	stq 6,	32752(7)
+	attn
+
+	.section	".data"
+usym0:	.llong	0xcafebabe
+usym1:
+