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| author | Victor Do Nascimento <victor.donascimento@arm.com> | 2023-11-15 17:21:39 +0000 |
|---|---|---|
| committer | Victor Do Nascimento <victor.donascimento@arm.com> | 2024-01-09 10:16:40 +0000 |
| commit | a9e2cefdf00202e0ba59825bd66a01ec41ac3ed0 (patch) | |
| tree | b62a75e4faa6bd99b6af833302c239d1457d2e74 /gas | |
| parent | 92d8946670571118cccdbcd36d35300af33da4af (diff) | |
| download | fsf-binutils-gdb-a9e2cefdf00202e0ba59825bd66a01ec41ac3ed0.zip fsf-binutils-gdb-a9e2cefdf00202e0ba59825bd66a01ec41ac3ed0.tar.gz fsf-binutils-gdb-a9e2cefdf00202e0ba59825bd66a01ec41ac3ed0.tar.bz2 | |
aarch64: Implement TLBIP 128-bit instruction
The addition of 128-bit page table descriptors and, with it, the
addition of 128-bit system registers for these means that special
"invalidate translation table entry" instructions are needed to cope
with the new 128-bit model. This is introduced with the `tlbpi'
instruction, implemented here.
Diffstat (limited to 'gas')
| -rw-r--r-- | gas/config/tc-aarch64.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c index 539bfa2..6a8ebe4 100644 --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c @@ -7666,6 +7666,7 @@ parse_operands (char *str, const aarch64_opcode *opcode) goto sys_reg_ins; case AARCH64_OPND_SYSREG_TLBI: + case AARCH64_OPND_SYSREG_TLBIP: inst.base.operands[i].sysins_op = parse_sys_ins_reg (&str, aarch64_sys_regs_tlbi_hsh); sys_reg_ins: |