aboutsummaryrefslogtreecommitdiff
path: root/gas
diff options
context:
space:
mode:
authorJan Beulich <jbeulich@novell.com>2018-03-22 08:32:50 +0100
committerJan Beulich <jbeulich@suse.com>2018-03-22 08:32:50 +0100
commit9f79e88693dae859f838bcf684158e6e6f8f3b6b (patch)
tree78014df9e0e5b90c93563718f7b920308bfe5b78 /gas
parentd6793fa1acf384a93c83db6eb916e3b9eedd9ef4 (diff)
downloadfsf-binutils-gdb-9f79e88693dae859f838bcf684158e6e6f8f3b6b.zip
fsf-binutils-gdb-9f79e88693dae859f838bcf684158e6e6f8f3b6b.tar.gz
fsf-binutils-gdb-9f79e88693dae859f838bcf684158e6e6f8f3b6b.tar.bz2
x86: fix swapped operand handling for BNDMOV
The wrong placement of the Load attribute in the templates prevented this from working. The disassembler also didn't handle this consistently with other similar dual-encoding insns.
Diffstat (limited to 'gas')
-rw-r--r--gas/ChangeLog7
-rw-r--r--gas/testsuite/gas/i386/opts-intel.d4
-rw-r--r--gas/testsuite/gas/i386/opts.d4
-rw-r--r--gas/testsuite/gas/i386/opts.s8
-rw-r--r--gas/testsuite/gas/i386/sse2avx-opts-intel.d4
-rw-r--r--gas/testsuite/gas/i386/sse2avx-opts.d4
6 files changed, 31 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 00a4edc..6abb853 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,12 @@
2018-03-22 Jan Beulich <jbeulich@suse.com>
+ * testsuite/gas/i386/opts.s: Add bndmov cases.
+ * testsuite/gas/i386/opts.d, testsuite/gas/i386/opts-intel.d,
+ testsuite/gas/i386/sse2avx-opts.d,
+ testsuite/gas/i386/sse2avx-opts-intel.d: Adjust expectations.
+
+2018-03-22 Jan Beulich <jbeulich@suse.com>
+
* config/tc-i386.c (match_mem_size): Extend sub-xmmword
exceptions.
* testsuite/gas/i386/xmmword.l, testsuite/gas/i386/xmmword.s:
diff --git a/gas/testsuite/gas/i386/opts-intel.d b/gas/testsuite/gas/i386/opts-intel.d
index 9913c82..4c546ee 100644
--- a/gas/testsuite/gas/i386/opts-intel.d
+++ b/gas/testsuite/gas/i386/opts-intel.d
@@ -166,6 +166,8 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: c5 ca 11 e2 vmovss.s xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: 0f 6f e0 movq mm4,mm0
[ ]*[a-f0-9]+: 0f 7f c4 movq.s mm4,mm0
+[ ]*[a-f0-9]+: 66 0f 1a d1 bndmov bnd2,bnd1
+[ ]*[a-f0-9]+: 66 0f 1b ca bndmov.s bnd2,bnd1
[ ]*[a-f0-9]+: 00 d1 add cl,dl
[ ]*[a-f0-9]+: 02 ca add.s cl,dl
[ ]*[a-f0-9]+: 66 01 d1 add cx,dx
@@ -270,4 +272,6 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: c5 ca 11 e2 vmovss.s xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: 0f 6f e0 movq mm4,mm0
[ ]*[a-f0-9]+: 0f 7f c4 movq.s mm4,mm0
+[ ]*[a-f0-9]+: 66 0f 1a ca bndmov bnd1,bnd2
+[ ]*[a-f0-9]+: 66 0f 1b d1 bndmov.s bnd1,bnd2
#pass
diff --git a/gas/testsuite/gas/i386/opts.d b/gas/testsuite/gas/i386/opts.d
index 4dc385a..af6cdf0 100644
--- a/gas/testsuite/gas/i386/opts.d
+++ b/gas/testsuite/gas/i386/opts.d
@@ -165,6 +165,8 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: c5 ca 11 e2 vmovss.s %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: 0f 6f e0 movq %mm0,%mm4
[ ]*[a-f0-9]+: 0f 7f c4 movq.s %mm0,%mm4
+[ ]*[a-f0-9]+: 66 0f 1a d1 bndmov %bnd1,%bnd2
+[ ]*[a-f0-9]+: 66 0f 1b ca bndmov.s %bnd1,%bnd2
[ ]*[a-f0-9]+: 00 d1 addb %dl,%cl
[ ]*[a-f0-9]+: 02 ca addb.s %dl,%cl
[ ]*[a-f0-9]+: 66 01 d1 addw %dx,%cx
@@ -269,4 +271,6 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: c5 ca 11 e2 vmovss.s %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: 0f 6f e0 movq %mm0,%mm4
[ ]*[a-f0-9]+: 0f 7f c4 movq.s %mm0,%mm4
+[ ]*[a-f0-9]+: 66 0f 1a ca bndmov %bnd2,%bnd1
+[ ]*[a-f0-9]+: 66 0f 1b d1 bndmov.s %bnd2,%bnd1
#pass
diff --git a/gas/testsuite/gas/i386/opts.s b/gas/testsuite/gas/i386/opts.s
index 4bd8e2c..262ce1c 100644
--- a/gas/testsuite/gas/i386/opts.s
+++ b/gas/testsuite/gas/i386/opts.s
@@ -172,6 +172,10 @@ _start:
movq %mm0,%mm4
movq.s %mm0,%mm4
+# Tests for op bnd, bnd
+ bndmov %bnd1,%bnd2
+ bndmov.s %bnd1,%bnd2
+
.intel_syntax noprefix
# Tests for op reg, reg
@@ -287,3 +291,7 @@ _start:
# Tests for op mm, mm
movq mm4,mm0
movq.s mm4,mm0
+
+# Tests for op bnd, bnd
+ bndmov bnd1,bnd2
+ bndmov.s bnd1,bnd2
diff --git a/gas/testsuite/gas/i386/sse2avx-opts-intel.d b/gas/testsuite/gas/i386/sse2avx-opts-intel.d
index 392e252..3e48cf8 100644
--- a/gas/testsuite/gas/i386/sse2avx-opts-intel.d
+++ b/gas/testsuite/gas/i386/sse2avx-opts-intel.d
@@ -167,6 +167,8 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: c5 ca 11 e2 vmovss.s xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: 0f 6f e0 movq mm4,mm0
[ ]*[a-f0-9]+: 0f 7f c4 movq.s mm4,mm0
+[ ]*[a-f0-9]+: 66 0f 1a d1 bndmov bnd2,bnd1
+[ ]*[a-f0-9]+: 66 0f 1b ca bndmov.s bnd2,bnd1
[ ]*[a-f0-9]+: 00 d1 add cl,dl
[ ]*[a-f0-9]+: 02 ca add.s cl,dl
[ ]*[a-f0-9]+: 66 01 d1 add cx,dx
@@ -271,4 +273,6 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: c5 ca 11 e2 vmovss.s xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: 0f 6f e0 movq mm4,mm0
[ ]*[a-f0-9]+: 0f 7f c4 movq.s mm4,mm0
+[ ]*[a-f0-9]+: 66 0f 1a ca bndmov bnd1,bnd2
+[ ]*[a-f0-9]+: 66 0f 1b d1 bndmov.s bnd1,bnd2
#pass
diff --git a/gas/testsuite/gas/i386/sse2avx-opts.d b/gas/testsuite/gas/i386/sse2avx-opts.d
index bfeaa7b..c0524b7 100644
--- a/gas/testsuite/gas/i386/sse2avx-opts.d
+++ b/gas/testsuite/gas/i386/sse2avx-opts.d
@@ -167,6 +167,8 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: c5 ca 11 e2 vmovss.s %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: 0f 6f e0 movq %mm0,%mm4
[ ]*[a-f0-9]+: 0f 7f c4 movq.s %mm0,%mm4
+[ ]*[a-f0-9]+: 66 0f 1a d1 bndmov %bnd1,%bnd2
+[ ]*[a-f0-9]+: 66 0f 1b ca bndmov.s %bnd1,%bnd2
[ ]*[a-f0-9]+: 00 d1 addb %dl,%cl
[ ]*[a-f0-9]+: 02 ca addb.s %dl,%cl
[ ]*[a-f0-9]+: 66 01 d1 addw %dx,%cx
@@ -271,4 +273,6 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: c5 ca 11 e2 vmovss.s %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: 0f 6f e0 movq %mm0,%mm4
[ ]*[a-f0-9]+: 0f 7f c4 movq.s %mm0,%mm4
+[ ]*[a-f0-9]+: 66 0f 1a ca bndmov %bnd2,%bnd1
+[ ]*[a-f0-9]+: 66 0f 1b d1 bndmov.s %bnd2,%bnd1
#pass