aarch64: Add support for 128-bit system register mrrs and msrr insns

With the addition of 128-bit system registers to the Arm architecture
starting with Armv9.4-a, a mechanism for manipulating their contents
is introduced with the `msrr' and `mrrs' instruction pair.

These move values from one such 128-bit system register into a pair of
contiguous general-purpose registers and vice-versa, as for example:

	   msrr ttlb0_el1, x0, x1
	   mrrs x0, x1, ttlb0_el1

This patch adds the necessary support for these instructions, adding
checks for system-register width by defining a new operand type in the
form of `AARCH64_OPND_SYSREG128' and the `aarch64_sys_reg_128bit_p'
predicate, responsible for checking whether the requested system
register table entry is marked as implemented in the 128-bit mode via
the F_REG_128 flag.

6 files changed, 75 insertions, 4 deletions

diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 6a8ebe4..6d8c356 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -4788,7 +4788,7 @@ parse_sme_sm_za (char **str)
 static int
 parse_sys_reg (char **str, htab_t sys_regs,
 	       int imple_defined_p, int pstatefield_p,
-	       uint32_t* flags)
+	       uint32_t* flags, bool sysreg128_p)
 {
   char *p, *q;
   char buf[AARCH64_MAX_SYSREG_NAME_LEN];
@@ -4838,6 +4838,9 @@ parse_sys_reg (char **str, htab_t sys_regs,
 					       &o->features))
 	as_bad (_("selected processor does not support system register "
 		  "name '%s'"), buf);
+      if (sysreg128_p && !aarch64_sys_reg_128bit_p (o->flags))
+	as_bad (_("128-bit-wide accsess not allowed on selected system"
+		  " register '%s'"), buf);
       if (aarch64_sys_reg_deprecated_p (o->flags))
 	as_warn (_("system register name '%s' is deprecated and may be "
 		   "removed in a future release"), buf);
@@ -7616,12 +7619,14 @@ parse_operands (char *str, const aarch64_opcode *opcode)
 	    }
 	  info->qualifier = base_qualifier;
 	  goto regoff_addr;
-
 	case AARCH64_OPND_SYSREG:
+	case AARCH64_OPND_SYSREG128:
 	  {
+	    bool sysreg128_p = operands[i] == AARCH64_OPND_SYSREG128;
 	    uint32_t sysreg_flags;
 	    if ((val = parse_sys_reg (&str, aarch64_sys_regs_hsh, 1, 0,
-				      &sysreg_flags)) == PARSE_FAIL)
+				      &sysreg_flags,
+				      sysreg128_p)) == PARSE_FAIL)
 	      {
 		set_syntax_error (_("unknown or missing system register name"));
 		goto failure;
@@ -7635,7 +7640,7 @@ parse_operands (char *str, const aarch64_opcode *opcode)
 	  {
 	    uint32_t sysreg_flags;
 	    if ((val = parse_sys_reg (&str, aarch64_pstatefield_hsh, 0, 1,
-				      &sysreg_flags)) == PARSE_FAIL)
+				      &sysreg_flags, false)) == PARSE_FAIL)
 	      {
 	        set_syntax_error (_("unknown or missing PSTATE field name"));
 	        goto failure;
diff --git a/gas/testsuite/gas/aarch64/illegal-sysreg128.d b/gas/testsuite/gas/aarch64/illegal-sysreg128.d
new file mode 100644
index 0000000..05bafec
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/illegal-sysreg128.d
@@ -0,0 +1,2 @@
+#name: Instruction validation testing for mrrs and msrr.
+#error_output: illegal-sysreg128.l
diff --git a/gas/testsuite/gas/aarch64/illegal-sysreg128.l b/gas/testsuite/gas/aarch64/illegal-sysreg128.l
new file mode 100644
index 0000000..a7d06b7
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/illegal-sysreg128.l
@@ -0,0 +1,11 @@
+.*: Assembler messages:
+.*: Error: 128-bit-wide accsess not allowed on selected system register 'accdata_el1'
+.*: Error: 128-bit-wide accsess not allowed on selected system register 'accdata_el1'
+.*: Error: operand mismatch -- `mrrs w0,w1,ttbr0_el1'
+.*: Info:    did you mean this\?
+.*: Info:    	mrrs x0, x1, ttbr0_el1
+.*: Error: operand mismatch -- `msrr ttbr0_el1,w0,w1'
+.*: Info:    did you mean this\?
+.*: Info:    	msrr ttbr0_el1, x0, x1
+.*: Error: reg pair must be contiguous at operand 2 -- `mrrs x0,x2,ttbr0_el1'
+.*: Error: reg pair must be contiguous at operand 3 -- `msrr ttbr0_el1,x0,x2'
diff --git a/gas/testsuite/gas/aarch64/illegal-sysreg128.s b/gas/testsuite/gas/aarch64/illegal-sysreg128.s
new file mode 100644
index 0000000..90dcfef
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/illegal-sysreg128.s
@@ -0,0 +1,8 @@
+	.arch armv8.1-a+d128
+
+	mrrs	x0, x1, accdata_el1
+	msrr	accdata_el1, x0, x1
+	mrrs	w0, w1, ttbr0_el1
+	msrr	ttbr0_el1, w0, w1
+	mrrs	x0, x2, ttbr0_el1
+	msrr	ttbr0_el1, x0, x2
diff --git a/gas/testsuite/gas/aarch64/sysreg128.d b/gas/testsuite/gas/aarch64/sysreg128.d
new file mode 100644
index 0000000..8c9f7ca
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sysreg128.d
@@ -0,0 +1,28 @@
+#objdump: -dr
+
+.*
+
+
+Disassembly of section \.text:
+
+0+ <\.text>:
+[^:]*:	d5787402 	mrrs	x2, x3, par_el1
+[^:]*:	d5587404 	msrr	par_el1, x4, x5
+[^:]*:	d578d0c2 	mrrs	x2, x3, rcwmask_el1
+[^:]*:	d558d0c4 	msrr	rcwmask_el1, x4, x5
+[^:]*:	d578d062 	mrrs	x2, x3, rcwsmask_el1
+[^:]*:	d558d064 	msrr	rcwsmask_el1, x4, x5
+[^:]*:	d5782002 	mrrs	x2, x3, ttbr0_el1
+[^:]*:	d5582004 	msrr	ttbr0_el1, x4, x5
+[^:]*:	d57d2002 	mrrs	x2, x3, ttbr0_el12
+[^:]*:	d55d2004 	msrr	ttbr0_el12, x4, x5
+[^:]*:	d57c2002 	mrrs	x2, x3, ttbr0_el2
+[^:]*:	d55c2004 	msrr	ttbr0_el2, x4, x5
+[^:]*:	d5782022 	mrrs	x2, x3, ttbr1_el1
+[^:]*:	d5582024 	msrr	ttbr1_el1, x4, x5
+[^:]*:	d57d2022 	mrrs	x2, x3, ttbr1_el12
+[^:]*:	d55d2024 	msrr	ttbr1_el12, x4, x5
+[^:]*:	d57c2022 	mrrs	x2, x3, ttbr1_el2
+[^:]*:	d55c2024 	msrr	ttbr1_el2, x4, x5
+[^:]*:	d57c2102 	mrrs	x2, x3, vttbr_el2
+[^:]*:	d55c2104 	msrr	vttbr_el2, x4, x5
\ No newline at end of file
diff --git a/gas/testsuite/gas/aarch64/sysreg128.s b/gas/testsuite/gas/aarch64/sysreg128.s
new file mode 100644
index 0000000..4093315
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sysreg128.s
@@ -0,0 +1,17 @@
+	.arch armv9.4-a+d128+the
+
+	.macro	rwreg128, name
+	mrrs	x2, x3, \name
+	msrr	\name, x4, x5
+	.endm
+
+	rwreg128	par_el1
+	rwreg128	rcwmask_el1
+	rwreg128	rcwsmask_el1
+	rwreg128	ttbr0_el1
+	rwreg128	ttbr0_el12
+	rwreg128	ttbr0_el2
+	rwreg128	ttbr1_el1
+	rwreg128	ttbr1_el12
+	rwreg128	ttbr1_el2
+	rwreg128	vttbr_el2