gas/testsuite/

2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/5534
	* gas/i386/i386.s: Add tests for fnstsw and fstsw.
	* gas/i386/inval.s: Likewise.
	* gas/i386/x86_64.s: Likewise.

	* gas/i386/intel.s: Use word instead of dword on ss.

	* gas/i386/x86-64-inval.s: Add tests for fnstsw, fstsw, in
	and out.

	* gas/i386/prefix.s: Remove invalid fstsw.

	* gas/i386/inval.l: Updated.
	* gas/i386/intelbad.l: Likewise.
	* gas/i386/i386.d: Likewise.
	* gas/i386/x86_64.d: Likewise.
	* gas/i386/x86-64-inval.l: Likewise.
	* gas/i386/prefix.d: Updated.

gas/

2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/5534
	* config/tc-i386.c (_i386_insn): Update comment.
	(operand_type_match): Also clear unspecified.
	(operand_type_register_match): Likewise.
	(parse_operands): Initialize unspecified.
	(i386_intel_operand): Likewise.
	(match_template): Check memory and accumulator operand size.
	(i386_att_operand): Clear unspecified on register operand.
	(intel_e11): Likewise.
	(intel_e09): Set operand size and clean unspecified for
	"XXX PTR".

opcodes/

2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/5534
	* i386-gen.c (operand_type_init): Add Dword to
	OPERAND_TYPE_ACC32.  Add Qword to OPERAND_TYPE_ACC64.
	(opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
	Qword and Xmmword.
	(operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
	Xmmword, Unspecified and Anysize.
	(set_bitfield): Make Mmword an alias of Qword.  Make Oword
	an alias of Xmmword.

	* i386-opc.h (CheckSize): Removed.
	(Byte): Updated.
	(Word): Likewise.
	(Dword): Likewise.
	(Qword): Likewise.
	(Xmmword): Likewise.
	(FWait): Updated.
	(OTMax): Likewise.
	(i386_opcode_modifier): Remove checksize, byte, word, dword,
	qword and xmmword.
	(Fword): New.
	(TBYTE): Likewise.
	(Unspecified): Likewise.
	(Anysize): Likewise.
	(i386_operand_type): Add byte, word, dword, fword, qword,
	tbyte xmmword, unspecified and anysize.

	* i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
	Tbyte, Xmmword, Unspecified and Anysize.

	* i386-reg.tbl: Add size for accumulator.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

15 files changed, 249 insertions, 56 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index b992b85..5afae86 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,17 @@
+2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR gas/5534
+	* config/tc-i386.c (_i386_insn): Update comment.
+	(operand_type_match): Also clear unspecified.
+	(operand_type_register_match): Likewise.
+	(parse_operands): Initialize unspecified.
+	(i386_intel_operand): Likewise.
+	(match_template): Check memory and accumulator operand size.
+	(i386_att_operand): Clear unspecified on register operand.
+	(intel_e11): Likewise.
+	(intel_e09): Set operand size and clean unspecified for
+	"XXX PTR".
+
 2008-01-11  Andreas Schwab  <schwab@suse.de>
 
 	* read.c (s_space): Declare `repeat' as offsetT.
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 1d884b6..58d56f3 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -113,8 +113,8 @@ struct _i386_insn
     /* TM holds the template for the insn were currently assembling.  */
     template tm;
 
-    /* SUFFIX holds the instruction mnemonic suffix if given.
-       (e.g. 'l' for 'movl')  */
+    /* SUFFIX holds the instruction size suffix for byte, word, dword
+       or qword, if given.  */
     char suffix;
 
     /* OPERANDS gives the number of given operands.  */
@@ -1154,6 +1154,7 @@ operand_type_match (i386_operand_type overlap,
   i386_operand_type temp = overlap;
 
   temp.bitfield.jumpabsolute = 0;
+  temp.bitfield.unspecified = 0;
   if (UINTS_ALL_ZERO (temp))
     return 0;
 
@@ -1161,7 +1162,7 @@ operand_type_match (i386_operand_type overlap,
 	  && given.bitfield.jumpabsolute == overlap.bitfield.jumpabsolute);
 }
 
-/* If given types r0 and r1 are registers they must be of the same type
+/* If given types g0 and g1 are registers they must be of the same type
    unless the expected operand type register overlap is null.
    Note that Acc in a template matches every size of reg.  */
 
@@ -2642,6 +2643,7 @@ parse_operands (char *l, const char *mnemonic)
 	{			/* Yes, we've read in another operand.  */
 	  unsigned int operand_ok;
 	  this_operand = i.operands++;
+	  i.types[this_operand].bitfield.unspecified = 1;
 	  if (i.operands > MAX_OPERANDS)
 	    {
 	      as_bad (_("spurious operands; (%d operands/instruction max)"),
@@ -2968,6 +2970,7 @@ match_template (void)
   unsigned int j;
   unsigned int found_cpu_match;
   unsigned int check_register;
+  unsigned int size_match;
 
 #if MAX_OPERANDS != 4
 # error "MAX_OPERANDS must be 4."
@@ -2989,8 +2992,6 @@ match_template (void)
     suffix_check.no_qsuf = 1;
   else if (i.suffix == LONG_DOUBLE_MNEM_SUFFIX)
     suffix_check.no_ldsuf = 1;
-  else if (i.suffix == XMMWORD_MNEM_SUFFIX)
-    suffix_check.xmmword = 1;
 
   for (t = current_templates->start; t < current_templates->end; t++)
     {
@@ -3027,20 +3028,51 @@ match_template (void)
 	      || (t->opcode_modifier.no_ldsuf && suffix_check.no_ldsuf)))
 	continue;
 
-      /* Check the memory size in Intel mode when it is provided if
-	 needed.  */
-      if (intel_syntax
-	  && i.suffix
-	  && t->opcode_modifier.checksize
-	  && (!t->opcode_modifier.byte || !suffix_check.no_bsuf)
-	  && (!t->opcode_modifier.word || !suffix_check.no_wsuf)
-	  && (!t->opcode_modifier.dword || !suffix_check.no_lsuf)
-	  && (!t->opcode_modifier.qword || !suffix_check.no_qsuf)
-	  && (!t->opcode_modifier.xmmword || !suffix_check.xmmword))
-	continue;
-
+      size_match = 1;
       for (j = 0; j < MAX_OPERANDS; j++)
-	operand_types [j] = t->operand_types [j];
+	{
+	  operand_types[j] = t->operand_types[j];
+
+	  /* Check memory and accumulator operand size.  We check
+	     operand_types for accumulator, and both operand_types
+	     and i.types for memory.  */
+	  if (j < i.operands
+	      && !operand_types[j].bitfield.anysize
+	      && ((operand_types[j].bitfield.acc
+		   && ((i.types[j].bitfield.byte
+			&& !operand_types[j].bitfield.byte)
+		       || (i.types[j].bitfield.word
+			   && !operand_types[j].bitfield.word)
+		       || (i.types[j].bitfield.dword
+			   && !operand_types[j].bitfield.dword)
+		       || (i.types[j].bitfield.qword
+			   && !operand_types[j].bitfield.qword)))
+		  || (operand_types[j].bitfield.baseindex
+		      && i.types[j].bitfield.baseindex
+		      && ((i.types[j].bitfield.unspecified
+			   && !operand_types[j].bitfield.unspecified)
+			  || (i.types[j].bitfield.byte
+			      && !operand_types[j].bitfield.byte)
+			  || (i.types[j].bitfield.word
+			      && !operand_types[j].bitfield.word)
+			  || (i.types[j].bitfield.dword
+			      && !operand_types[j].bitfield.dword)
+			  || (i.types[j].bitfield.fword
+			      && !operand_types[j].bitfield.fword)
+			  || (i.types[j].bitfield.qword
+			      && !operand_types[j].bitfield.qword)
+			  || (i.types[j].bitfield.tbyte
+			      && !operand_types[j].bitfield.tbyte)
+			  || (i.types[j].bitfield.xmmword
+			      && !operand_types[j].bitfield.xmmword)))))
+	    {
+	      size_match = 0;
+	      break;
+	    }
+	}
+
+      if (!size_match)
+	continue;
 
       /* In general, don't allow 64-bit operands in 32-bit mode.  */
       if (i.suffix == QWORD_MNEM_SUFFIX
@@ -6139,6 +6171,7 @@ i386_att_operand (char *operand_string)
       temp.bitfield.baseindex = 0;
       i.types[this_operand] = operand_type_or (i.types[this_operand],
 					       temp);
+      i.types[this_operand].bitfield.unspecified = 0;
       i.op[this_operand].regs = r;
       i.reg_operands++;
     }
@@ -7854,6 +7887,7 @@ i386_intel_operand (char *operand_string, int got_a_float)
 	break;
       intel_parser.op_string = intel_parser.next_operand;
       this_operand = i.operands++;
+      i.types[this_operand].bitfield.unspecified = 1;
     }
 
   free (p);
@@ -8062,7 +8096,10 @@ intel_e09 (void)
 	  char suffix;
 
 	  if (prev_token.code == T_BYTE)
-	    suffix = BYTE_MNEM_SUFFIX;
+	    {
+	      suffix = BYTE_MNEM_SUFFIX;
+	      i.types[this_operand].bitfield.byte = 1;
+	    }
 
 	  else if (prev_token.code == T_WORD)
 	    {
@@ -8074,6 +8111,7 @@ intel_e09 (void)
 		suffix = SHORT_MNEM_SUFFIX;
 	      else
 		suffix = WORD_MNEM_SUFFIX;
+	      i.types[this_operand].bitfield.word = 1;
 	    }
 
 	  else if (prev_token.code == T_DWORD)
@@ -8090,6 +8128,7 @@ intel_e09 (void)
 		suffix = SHORT_MNEM_SUFFIX;
 	      else
 		suffix = LONG_MNEM_SUFFIX;
+	      i.types[this_operand].bitfield.dword = 1;
 	    }
 
 	  else if (prev_token.code == T_FWORD)
@@ -8106,6 +8145,7 @@ intel_e09 (void)
 		}
 	      else
 		suffix = BYTE_MNEM_SUFFIX; /* so it will cause an error */
+	      i.types[this_operand].bitfield.fword = 1;
 	    }
 
 	  else if (prev_token.code == T_QWORD)
@@ -8113,7 +8153,8 @@ intel_e09 (void)
 	      if (intel_parser.got_a_float == 1)	/* "f..." */
 		suffix = LONG_MNEM_SUFFIX;
 	      else
-		suffix = QWORD_MNEM_SUFFIX;
+		  suffix = QWORD_MNEM_SUFFIX;
+	      i.types[this_operand].bitfield.qword = 1;
 	    }
 
 	  else if (prev_token.code == T_TBYTE)
@@ -8127,6 +8168,7 @@ intel_e09 (void)
 	  else if (prev_token.code == T_XMMWORD)
 	    {
 	      suffix = XMMWORD_MNEM_SUFFIX;
+	      i.types[this_operand].bitfield.xmmword = 1;
 	    }
 
 	  else
@@ -8135,6 +8177,8 @@ intel_e09 (void)
 	      return 0;
 	    }
 
+	  i.types[this_operand].bitfield.unspecified = 0;
+
 	  /* Operands for jump/call using 'ptr' notation denote absolute
 	     addresses.  */
 	  if (current_templates->start->opcode_modifier.jump
@@ -8465,6 +8509,7 @@ intel_e11 (void)
 	    temp.bitfield.baseindex = 0;
 	    i.types[this_operand] = operand_type_or (i.types[this_operand],
 						     temp);
+	    i.types[this_operand].bitfield.unspecified = 0;
 	    i.op[this_operand].regs = reg;
 	    i.reg_operands++;
 	  }
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 4a2d55c..60c8fee 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,24 @@
+2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR gas/5534
+	* gas/i386/i386.s: Add tests for fnstsw and fstsw.
+	* gas/i386/inval.s: Likewise. 
+	* gas/i386/x86_64.s: Likewise.
+
+	* gas/i386/intel.s: Use word instead of dword on ss.
+
+	* gas/i386/x86-64-inval.s: Add tests for fnstsw, fstsw, in
+	and out.
+
+	* gas/i386/prefix.s: Remove invalid fstsw.
+
+	* gas/i386/inval.l: Updated.
+	* gas/i386/intelbad.l: Likewise.
+	* gas/i386/i386.d: Likewise.
+	* gas/i386/x86_64.d: Likewise.
+	* gas/i386/x86-64-inval.l: Likewise.
+	* gas/i386/prefix.d: Updated.
+
 2008-01-10  H.J. Lu  <hongjiu.lu@intel.com>
 
 	* gas/i386/nops.s: Add more tests with opcodes from 0x0f19
diff --git a/gas/testsuite/gas/i386/i386.d b/gas/testsuite/gas/i386/i386.d
index ddfc522..d5a23c1 100644
--- a/gas/testsuite/gas/i386/i386.d
+++ b/gas/testsuite/gas/i386/i386.d
@@ -6,6 +6,10 @@
 Disassembly of section .text:
 
 0+ <.*>:
+[ 	]*[a-f0-9]+:	df e0                	fnstsw %ax
+[ 	]*[a-f0-9]+:	df e0                	fnstsw %ax
+[ 	]*[a-f0-9]+:	9b df e0             	fstsw  %ax
+[ 	]*[a-f0-9]+:	9b df e0             	fstsw  %ax
 [ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%eax\),%edx
 [ 	]*[a-f0-9]+:	66 0f be 10          	movsbw \(%eax\),%dx
 [ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%eax\),%edx
@@ -19,6 +23,10 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	0f b6 10             	movzbl \(%eax\),%edx
 [ 	]*[a-f0-9]+:	66 0f b6 10          	movzbw \(%eax\),%dx
 [ 	]*[a-f0-9]+:	0f b7 10             	movzwl \(%eax\),%edx
+[ 	]*[a-f0-9]+:	df e0                	fnstsw %ax
+[ 	]*[a-f0-9]+:	df e0                	fnstsw %ax
+[ 	]*[a-f0-9]+:	9b df e0             	fstsw  %ax
+[ 	]*[a-f0-9]+:	9b df e0             	fstsw  %ax
 [ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%eax\),%edx
 [ 	]*[a-f0-9]+:	66 0f be 10          	movsbw \(%eax\),%dx
 [ 	]*[a-f0-9]+:	0f bf 10             	movswl \(%eax\),%edx
diff --git a/gas/testsuite/gas/i386/i386.s b/gas/testsuite/gas/i386/i386.s
index 8eb5e53..cee44a6 100644
--- a/gas/testsuite/gas/i386/i386.s
+++ b/gas/testsuite/gas/i386/i386.s
@@ -1,6 +1,11 @@
 # i386 instructions
 	.text
 
+	fnstsw
+	fnstsw	%ax
+	fstsw
+	fstsw	%ax
+
 	movsx	(%eax), %edx
 	movsx	(%eax), %dx
 	movsbl	(%eax), %edx
@@ -17,6 +22,11 @@
 	movzwl	(%eax), %edx
 
 	.intel_syntax noprefix
+	fnstsw
+	fnstsw	ax
+	fstsw
+	fstsw	ax
+
 	movsx	edx,BYTE PTR [eax]
 	movsx	dx,BYTE PTR [eax]
 	movsx	edx,WORD PTR [eax]
diff --git a/gas/testsuite/gas/i386/intel.s b/gas/testsuite/gas/i386/intel.s
index 855b419..6b42343 100644
--- a/gas/testsuite/gas/i386/intel.s
+++ b/gas/testsuite/gas/i386/intel.s
@@ -131,9 +131,9 @@ foo:
  mov    0x90909090[eax], edx
  mov    dl, 0x90909090[eax]
  mov    edx, 0x90909090[eax]
- mov    dword ptr 0x90909090[eax], ss
+ mov    word ptr 0x90909090[eax], ss
  lea    edx, 0x90909090[eax]
- mov    ss, dword ptr 0x90909090[eax]
+ mov    ss, word ptr 0x90909090[eax]
  pop    dword ptr 0x90909090[eax]
  xchg   eax, eax
  xchg   ecx, eax
diff --git a/gas/testsuite/gas/i386/intelbad.l b/gas/testsuite/gas/i386/intelbad.l
index 198420a..e3557dd 100644
--- a/gas/testsuite/gas/i386/intelbad.l
+++ b/gas/testsuite/gas/i386/intelbad.l
@@ -3,10 +3,18 @@
 .*:5: Error: .*
 .*:6: Error: .*
 .*:7: Error: .*
+.*:8: Error: .*
+.*:9: Error: .*
 .*:10: Error: .*
+.*:11: Error: .*
+.*:12: Error: .*
 .*:13: Error: .*
+.*:14: Error: .*
 .*:15: Error: .*
+.*:16: Error: .*
+.*:17: Error: .*
 .*:18: Error: .*
+.*:19: Error: .*
 .*:20: Error: .*
 .*:21: Error: .*
 .*:22: Error: .*
@@ -50,7 +58,16 @@
 .*:60: Error: .*
 .*:61: Error: .*
 .*:62: Error: .*
+.*:63: Error: .*
+.*:64: Error: .*
+.*:65: Error: .*
+.*:66: Error: .*
 .*:67: Error: .*
+.*:68: Error: .*
+.*:69: Error: .*
+.*:70: Error: .*
+.*:71: Error: .*
+.*:72: Error: .*
 .*:73: Error: .*
 .*:74: Error: .*
 .*:75: Error: .*
diff --git a/gas/testsuite/gas/i386/inval.l b/gas/testsuite/gas/i386/inval.l
index 94f3c08..53616b8 100644
--- a/gas/testsuite/gas/i386/inval.l
+++ b/gas/testsuite/gas/i386/inval.l
@@ -49,10 +49,10 @@
 .*:50: Error: .*
 .*:51: Error: .*
 .*:52: Error: .*
+.*:53: Error: .*
+.*:54: Error: .*
 .*:55: Error: .*
 .*:56: Error: .*
-.*:57: Error: .*
-.*:58: Error: .*
 .*:59: Error: .*
 .*:60: Error: .*
 .*:61: Error: .*
@@ -61,6 +61,14 @@
 .*:64: Error: .*
 .*:65: Error: .*
 .*:66: Error: .*
+.*:67: Error: .*
+.*:68: Error: .*
+.*:69: Error: .*
+.*:70: Error: .*
+.*:71: Error: .*
+.*:72: Error: .*
+.*:73: Error: .*
+.*:74: Error: .*
 GAS LISTING .*
 
 
@@ -116,20 +124,28 @@ GAS LISTING .*
 [ 	]*50[ 	]+insertq	\$4,\$2,%xmm2,%ebx
 [ 	]*51[ 	]+cvtsi2ssq \(%eax\),%xmm1
 [ 	]*52[ 	]+cvtsi2sdq \(%eax\),%xmm1
-[ 	]*53[ 	]+
-[ 	]*54[ 	]+\.intel_syntax noprefix
-[ 	]*55[ 	]+cvtsi2ss xmm1,QWORD PTR \[eax\]
-[ 	]*56[ 	]+cvtsi2sd xmm1,QWORD PTR \[eax\]
-[ 	]*57[ 	]+cvtsi2ssq xmm1,QWORD PTR \[eax\]
+[ 	]*53[ 	]+fnstsw %eax
+[ 	]*54[ 	]+fnstsw %al
+[ 	]*55[ 	]+fstsw %eax
+[ 	]*56[ 	]+fstsw %al
+[ 	]*57[ 	]+
 GAS LISTING .*
 
 
-[ 	]*58[ 	]+cvtsi2sdq xmm1,QWORD PTR \[eax\]
-[ 	]*59[ 	]+movq xmm1, XMMWORD PTR \[esp\]
-[ 	]*60[ 	]+movq xmm1, DWORD PTR \[esp\]
-[ 	]*61[ 	]+movq xmm1, WORD PTR \[esp\]
-[ 	]*62[ 	]+movq xmm1, BYTE PTR \[esp\]
-[ 	]*63[ 	]+movq XMMWORD PTR \[esp\],xmm1
-[ 	]*64[ 	]+movq DWORD PTR \[esp\],xmm1
-[ 	]*65[ 	]+movq WORD PTR \[esp\],xmm1
-[ 	]*66[ 	]+movq BYTE PTR \[esp\],xmm1
+[ 	]*58[ 	]+\.intel_syntax noprefix
+[ 	]*59[ 	]+cvtsi2ss xmm1,QWORD PTR \[eax\]
+[ 	]*60[ 	]+cvtsi2sd xmm1,QWORD PTR \[eax\]
+[ 	]*61[ 	]+cvtsi2ssq xmm1,QWORD PTR \[eax\]
+[ 	]*62[ 	]+cvtsi2sdq xmm1,QWORD PTR \[eax\]
+[ 	]*63[ 	]+movq xmm1, XMMWORD PTR \[esp\]
+[ 	]*64[ 	]+movq xmm1, DWORD PTR \[esp\]
+[ 	]*65[ 	]+movq xmm1, WORD PTR \[esp\]
+[ 	]*66[ 	]+movq xmm1, BYTE PTR \[esp\]
+[ 	]*67[ 	]+movq XMMWORD PTR \[esp\],xmm1
+[ 	]*68[ 	]+movq DWORD PTR \[esp\],xmm1
+[ 	]*69[ 	]+movq WORD PTR \[esp\],xmm1
+[ 	]*70[ 	]+movq BYTE PTR \[esp\],xmm1
+[ 	]*71[ 	]+fnstsw eax
+[ 	]*72[ 	]+fnstsw al
+[ 	]*73[ 	]+fstsw eax
+[ 	]*74[ 	]+fstsw al
diff --git a/gas/testsuite/gas/i386/inval.s b/gas/testsuite/gas/i386/inval.s
index 2584d0e..b966af3 100644
--- a/gas/testsuite/gas/i386/inval.s
+++ b/gas/testsuite/gas/i386/inval.s
@@ -50,6 +50,10 @@ foo:	jaw	foo
 	insertq	$4,$2,%xmm2,%ebx
 	cvtsi2ssq (%eax),%xmm1
 	cvtsi2sdq (%eax),%xmm1
+	fnstsw %eax
+	fnstsw %al
+	fstsw %eax
+	fstsw %al
 
 	.intel_syntax noprefix
 	cvtsi2ss xmm1,QWORD PTR [eax]
@@ -64,3 +68,7 @@ foo:	jaw	foo
 	movq DWORD PTR [esp],xmm1
 	movq WORD PTR [esp],xmm1
 	movq BYTE PTR [esp],xmm1
+	fnstsw eax
+	fnstsw al
+	fstsw eax
+	fstsw al
diff --git a/gas/testsuite/gas/i386/prefix.d b/gas/testsuite/gas/i386/prefix.d
index 9021f09..0cb79ff 100644
--- a/gas/testsuite/gas/i386/prefix.d
+++ b/gas/testsuite/gas/i386/prefix.d
@@ -9,7 +9,6 @@ Disassembly of section .text:
    0:	9b 26 67 d9 3c [ 	]*addr16 fstcw %es:\(%si\)
    5:	9b df e0 [ 	]*fstsw  %ax
    8:	9b df e0 [ 	]*fstsw  %ax
-   b:	9b df e0 [ 	]*fstsw  %ax
-   e:	9b 67 df e0 [ 	]*addr16 fstsw %ax
-  12:	36 67 66 f3 a7 [ 	]*repz addr16 cmpsw %es:\(%di\),%ss:\(%si\)
+   b:	9b 67 df e0 [ 	]*addr16 fstsw %ax
+   f:	36 67 66 f3 a7 [ 	]*repz addr16 cmpsw %es:\(%di\),%ss:\(%si\)
 #pass
diff --git a/gas/testsuite/gas/i386/prefix.s b/gas/testsuite/gas/i386/prefix.s
index 5cf55cd..a141ad5 100644
--- a/gas/testsuite/gas/i386/prefix.s
+++ b/gas/testsuite/gas/i386/prefix.s
@@ -1,5 +1,5 @@
 .text ; foo: addr16 fstcw %es:(%si)
- fstsw;fstsw %ax;fstsw %eax
+ fstsw; fstsw %ax;
  addr16 fstsw %ax ;addr16 rep cmpsw %es:(%di),%ss:(%si)
 
 # Get a good alignment.
diff --git a/gas/testsuite/gas/i386/x86-64-inval.l b/gas/testsuite/gas/i386/x86-64-inval.l
index dcc2f80..c567a13 100644
--- a/gas/testsuite/gas/i386/x86-64-inval.l
+++ b/gas/testsuite/gas/i386/x86-64-inval.l
@@ -49,15 +49,27 @@
 .*:50: Error: .*
 .*:51: Error: .*
 .*:52: Error: .*
+.*:53: Error: .*
 .*:54: Error: .*
 .*:55: Error: .*
 .*:56: Error: .*
 .*:57: Error: .*
 .*:58: Error: .*
-.*:59: Error: .*
-.*:60: Error: .*
 .*:61: Error: .*
 .*:62: Error: .*
+.*:63: Error: .*
+.*:64: Error: .*
+.*:65: Error: .*
+.*:66: Error: .*
+.*:67: Error: .*
+.*:68: Error: .*
+.*:69: Error: .*
+.*:70: Error: .*
+.*:71: Error: .*
+.*:72: Error: .*
+.*:73: Error: .*
+.*:74: Error: .*
+.*:75: Error: .*
 GAS LISTING .*
 
 
@@ -113,16 +125,29 @@ GAS LISTING .*
 [ 	]*50[ 	]+popfl		\# can't have 32-bit stack operands
 [ 	]*51[ 	]+retl		\# can't have 32-bit stack operands
 [ 	]*52[ 	]+insertq \$4,\$2,%xmm2,%ebx \# The last operand must be XMM register\.
-[ 	]*53[ 	]+\.intel_syntax noprefix
-[ 	]*54[ 	]+cmpxchg16b dword ptr \[rax\] \# Must be oword
-[ 	]*55[ 	]+movq xmm1, XMMWORD PTR \[rsp\]
-[ 	]*56[ 	]+movq xmm1, DWORD PTR \[rsp\]
-[ 	]*57[ 	]+movq xmm1, WORD PTR \[rsp\]
+[ 	]*53[ 	]+fnstsw %eax
+[ 	]*54[ 	]+fnstsw %al
+[ 	]*55[ 	]+fstsw %eax
+[ 	]*56[ 	]+fstsw %al
+[ 	]*57[ 	]+in \$8,%rax
 GAS LISTING .*
 
 
-[ 	]*58[ 	]+movq xmm1, BYTE PTR \[rsp\]
-[ 	]*59[ 	]+movq XMMWORD PTR \[rsp\],xmm1
-[ 	]*60[ 	]+movq DWORD PTR \[rsp\],xmm1
-[ 	]*61[ 	]+movq WORD PTR \[rsp\],xmm1
-[ 	]*62[ 	]+movq BYTE PTR \[rsp\],xmm1
+[ 	]*58[ 	]+out %rax,\$8
+[ 	]*59[ 	]+
+[ 	]*60[ 	]+\.intel_syntax noprefix
+[ 	]*61[ 	]+cmpxchg16b dword ptr \[rax\] \# Must be oword
+[ 	]*62[ 	]+movq xmm1, XMMWORD PTR \[rsp\]
+[ 	]*63[ 	]+movq xmm1, DWORD PTR \[rsp\]
+[ 	]*64[ 	]+movq xmm1, WORD PTR \[rsp\]
+[ 	]*65[ 	]+movq xmm1, BYTE PTR \[rsp\]
+[ 	]*66[ 	]+movq XMMWORD PTR \[rsp\],xmm1
+[ 	]*67[ 	]+movq DWORD PTR \[rsp\],xmm1
+[ 	]*68[ 	]+movq WORD PTR \[rsp\],xmm1
+[ 	]*69[ 	]+movq BYTE PTR \[rsp\],xmm1
+[ 	]*70[ 	]+fnstsw eax
+[ 	]*71[ 	]+fnstsw al
+[ 	]*72[ 	]+fstsw eax
+[ 	]*73[ 	]+fstsw al
+[ 	]*74[ 	]+in rax,8
+[ 	]*75[ 	]+out 8,rax
diff --git a/gas/testsuite/gas/i386/x86-64-inval.s b/gas/testsuite/gas/i386/x86-64-inval.s
index 979635f..30407e8 100644
--- a/gas/testsuite/gas/i386/x86-64-inval.s
+++ b/gas/testsuite/gas/i386/x86-64-inval.s
@@ -50,6 +50,13 @@ foo:	jcxz foo	# No prefix exists to select CX as a counter
 	popfl		# can't have 32-bit stack operands
 	retl		# can't have 32-bit stack operands
 	insertq $4,$2,%xmm2,%ebx # The last operand must be XMM register.
+	fnstsw %eax
+	fnstsw %al
+	fstsw %eax
+	fstsw %al
+	in $8,%rax
+	out %rax,$8
+
 	.intel_syntax noprefix
 	cmpxchg16b dword ptr [rax] # Must be oword
 	movq xmm1, XMMWORD PTR [rsp]
@@ -60,3 +67,9 @@ foo:	jcxz foo	# No prefix exists to select CX as a counter
 	movq DWORD PTR [rsp],xmm1
 	movq WORD PTR [rsp],xmm1
 	movq BYTE PTR [rsp],xmm1
+	fnstsw eax
+	fnstsw al
+	fstsw eax
+	fstsw al
+	in rax,8
+	out 8,rax
diff --git a/gas/testsuite/gas/i386/x86_64.d b/gas/testsuite/gas/i386/x86_64.d
index b21d0af..4e9536c 100644
--- a/gas/testsuite/gas/i386/x86_64.d
+++ b/gas/testsuite/gas/i386/x86_64.d
@@ -191,4 +191,12 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	f3 0f 7e 0c 24       	movq   \(%rsp\),%xmm1
 [ 	]*[a-f0-9]+:	66 0f d6 0c 24       	movq   %xmm1,\(%rsp\)
 [ 	]*[a-f0-9]+:	66 0f d6 0c 24       	movq   %xmm1,\(%rsp\)
+[ 	]*[a-f0-9]+:	df e0                	fnstsw %ax
+[ 	]*[a-f0-9]+:	df e0                	fnstsw %ax
+[ 	]*[a-f0-9]+:	9b df e0             	fstsw  %ax
+[ 	]*[a-f0-9]+:	9b df e0             	fstsw  %ax
+[ 	]*[a-f0-9]+:	df e0                	fnstsw %ax
+[ 	]*[a-f0-9]+:	df e0                	fnstsw %ax
+[ 	]*[a-f0-9]+:	9b df e0             	fstsw  %ax
+[ 	]*[a-f0-9]+:	9b df e0             	fstsw  %ax
 #pass
diff --git a/gas/testsuite/gas/i386/x86_64.s b/gas/testsuite/gas/i386/x86_64.s
index fbf4b31..d107b12 100644
--- a/gas/testsuite/gas/i386/x86_64.s
+++ b/gas/testsuite/gas/i386/x86_64.s
@@ -233,5 +233,14 @@ cmpxchg16b oword ptr [rax]
 	movq	QWORD PTR [rsp],xmm1
 	movq	[rsp],xmm1
 
-# Get a good alignment.
- .p2align	4,0
+.att_syntax
+	fnstsw
+	fnstsw	%ax
+	fstsw
+	fstsw	%ax
+
+	.intel_syntax noprefix
+	fnstsw
+	fnstsw	ax
+	fstsw
+	fstsw	ax