[AArch64][7/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12

2015-08-11  Jiong Wang  <jiong.wang@arm.com>

include/elf/
  * aarch64.h (R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12): Define.

bfd/
  * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12): New entry.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
  BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers
  "dtprel_lo12".
  (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12.
  (aarch64_force_relocation): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-dtprel_lo12-1.s: New testcase.
  * gas/aarch64/reloc-dtprel_lo12-ilp32-1.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-1.d: New expectation file.
  * gas/aarch64/reloc-dtprel_lo12-ilp32-1.d: Likewise.

7 files changed, 54 insertions, 0 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 314735a..e483f4f 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,12 @@
 2015-08-11  Jiong Wang  <jiong.wang@arm.com>
 
+	* config/tc-aarch64.c (reloc_table): New relocation modifiers
+	"dtprel_lo12".
+	(md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12.
+	(aarch64_force_relocation): Likewise.
+
+2015-08-11  Jiong Wang  <jiong.wang@arm.com>
+
 	* config/tc-aarch64.c (reloc_table): New relocation modifiers.
 	(md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC.
 	(aarch64_force_relocation): Likewise.
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index a633b04..df37541 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -2522,6 +2522,15 @@ static struct reloc_table_entry reloc_table[] = {
    0,
    0},
 
+  /* 12 bit offset into the module TLS base address.  */
+  {"dtprel_lo12", 0,
+   0,				/* adr_type */
+   0,
+   0,
+   BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12,
+   0,
+   0},
+
   /* Get to the page containing GOT TLS entry for a symbol */
   {"gottprel", 0,
    0,				/* adr_type */
@@ -6787,6 +6796,7 @@ md_apply_fix (fixS * fixP, valueT * valP, segT seg)
     case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:
     case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
     case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
+    case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12:
     case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
     case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
     case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
@@ -6999,6 +7009,7 @@ aarch64_force_relocation (struct fix *fixp)
     case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:
     case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
     case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
+    case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12:
     case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
     case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
     case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 9449f1d..958bf71 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,5 +1,12 @@
 2015-08-11  Jiong Wang  <jiong.wang@arm.com>
 
+	* gas/aarch64/reloc-dtprel_lo12-1.s: New testcase.
+	* gas/aarch64/reloc-dtprel_lo12-ilp32-1.s: Likewise.
+	* gas/aarch64/reloc-dtprel_lo12-1.d: New expectation file.
+	* gas/aarch64/reloc-dtprel_lo12-ilp32-1.d: Likewise.
+
+2015-08-11  Jiong Wang  <jiong.wang@arm.com>
+
 	* gas/aarch64/reloc-tlsldm_lo12_nc-1.s: New testcase.
 	* gas/aarch64/reloc-tlsldm_lo12_nc-ilp32-1.s: Likewise.
 	* gas/aarch64/reloc-tlsldm_lo12_nc-1.d: New expectation file.
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-1.d b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-1.d
new file mode 100644
index 0000000..0b1f5f8
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-1.d
@@ -0,0 +1,9 @@
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	91000347 	add	x7, x26, #0x0
+			0: R_AARCH64_TLSLD_ADD_DTPREL_LO12	x
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-1.s b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-1.s
new file mode 100644
index 0000000..eac7ac6
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-1.s
@@ -0,0 +1,5 @@
+// Test file for AArch64 GAS -- dtprel_lo12
+
+func:
+	// BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12
+	add  x7, x26, #:dtprel_lo12:x
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ilp32-1.d b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ilp32-1.d
new file mode 100644
index 0000000..a44f9d2
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ilp32-1.d
@@ -0,0 +1,10 @@
+#as: -mabi=ilp32
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+00000000 <.*>:
+   0:	110002a8 	add	w8, w21, #0x0
+			0: R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12	x
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ilp32-1.s b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ilp32-1.s
new file mode 100644
index 0000000..ccbe385
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ilp32-1.s
@@ -0,0 +1,5 @@
+// Test file for AArch64 GAS -- dtprel_lo12 ILP32
+
+func:
+	// BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12
+	add  w8, w21, #:dtprel_lo12:x