Add support for CRX co-processor opcodes

9 files changed, 190 insertions, 92 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index dbd128a..e9911f6 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,10 @@
+2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
+
+	* config/tc-crx.c (preprocess_reglist): Handle Co-processor
+	Special registers. 
+	(get_cinv_parameters): Add 'b' option to invalidate the
+	branch-target cache.
+
 2004-10-05  Paul Brook  <paul@codesourcery.com>
 
 	* config/tc-arm.c (unwind): New variable.
diff --git a/gas/config/tc-crx.c b/gas/config/tc-crx.c
index 382c562..6c144b3 100644
--- a/gas/config/tc-crx.c
+++ b/gas/config/tc-crx.c
@@ -1724,7 +1724,7 @@ static int
 get_cinv_parameters (char * operand)
 {
   char *p = operand;
-  int d_used = 0, i_used = 0, u_used = 0;
+  int d_used = 0, i_used = 0, u_used = 0, b_used = 0;
 
   while (*++p != ']')
     {
@@ -1737,11 +1737,14 @@ get_cinv_parameters (char * operand)
 	i_used = 1;
       else if (*p == 'u')
 	u_used = 1;
+      else if (*p == 'b')
+	b_used = 1;
       else
 	as_bad (_("Illegal `cinv' parameter: `%c'"), *p);
     }
 
-  return ((d_used ? 4 : 0)
+  return ((b_used ? 8 : 0)
+	+ (d_used ? 4 : 0)
 	+ (i_used ? 2 : 0)
 	+ (u_used ? 1 : 0));
 }
@@ -2374,12 +2377,22 @@ preprocess_reglist (char *param, int *allocated)
 
       strncpy (reg_name, regP, paramP - regP);
 
+      /* Coprocessor register c<N>.  */
       if (IS_INSN_TYPE (COP_REG_INS))
         {
           if ((cr = get_copregister (reg_name)) == nullcopregister)
 	    as_bad (_("Illegal register `%s' in cop-register list"), reg_name);
 	  mask_reg (getreg_image (cr - c0), &mask);
         }
+      /* Coprocessor Special register cs<N>.  */
+      else if (IS_INSN_TYPE (COPS_REG_INS))
+        {
+          if ((cr = get_copregister (reg_name)) == nullcopregister)
+	    as_bad (_("Illegal register `%s' in cop-special-register list"), 
+		      reg_name);
+	  mask_reg (getreg_image (cr - cs0), &mask);
+        }
+      /* General purpose register r<N>.  */
       else
         {
           if ((r = get_register (reg_name)) == nullregister)
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 7671424..565dc1b 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,13 @@
+2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
+
+	* gas/crx/cop_insn.s: New file.
+	* gas/crx/cop_insn.d: Likewise.
+	* gas/crx/load_stor_insn.s: Move Co-processor insns to a separate
+	test.
+	* gas/crx/misc_insn.s: Likewise.
+	* gas/crx/load_stor_insn.d: Regenerate.
+	* gas/crx/misc_insn.d: Likewise.
+
 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
 
 	* gas/ppc/e500.s: Add double-precision instructions.
diff --git a/gas/testsuite/gas/crx/cop_insn.d b/gas/testsuite/gas/crx/cop_insn.d
new file mode 100644
index 0000000..9108f1e
--- /dev/null
+++ b/gas/testsuite/gas/crx/cop_insn.d
@@ -0,0 +1,67 @@
+#as:
+#objdump: -dr
+#name: cop_insn
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+00000000 <mtcr>:
+   0:	1f 30 1e 30 	mtcr	\$0xf, r1, c14
+
+00000004 <mfcr>:
+   4:	13 30 72 31 	mfcr	\$0x3, c7, r2
+
+00000008 <mtcsr>:
+   8:	12 30 51 32 	mtcsr	\$0x2, r5, cs1
+
+0000000c <mfcsr>:
+   c:	11 30 ce 33 	mfcsr	\$0x1, cs12, r14
+
+00000010 <ldcr>:
+  10:	11 30 38 34 	ldcr	\$0x1, r3, c8
+
+00000014 <stcr>:
+  14:	12 30 4b 35 	stcr	\$0x2, r4, c11
+
+00000018 <ldcsr>:
+  18:	14 30 6c 36 	ldcsr	\$0x4, r6, cs12
+
+0000001c <stcsr>:
+  1c:	17 30 dd 37 	stcsr	\$0x7, r13, cs13
+
+00000020 <loadmcr>:
+  20:	13 31 01 30 	loadmcr	\$0x3, r1, {c2,c3,c5}
+  24:	2c 00 
+
+00000026 <stormcr>:
+  26:	1f 31 1e 30 	stormcr	\$0xf, r14, {c4,c7,c9,c10}
+  2a:	90 06 
+
+0000002c <loadmcsr>:
+  2c:	1c 31 28 30 	loadmcsr	\$0xc, r8, {cs7,cs8,cs9,cs10,cs11}
+  30:	80 0f 
+
+00000032 <stormcsr>:
+  32:	19 31 39 30 	stormcsr	\$0x9, r9, {cs4,cs7,cs10}
+  36:	90 04 
+
+00000038 <bcop>:
+  38:	13 30 48 77 	bcop	\$0x7, \$0x3, \*\+0x90
+  3c:	1c 31 fa 76 	bcop	\$0x6, \$0xc, \*\-0xbcdfe
+  40:	01 19 
+
+00000042 <cpdop>:
+  42:	13 30 45 b2 	cpdop	\$0x3, \$0x2, r4, r5
+  46:	17 31 12 ba 	cpdop	\$0x7, \$0xa, r1, r2, \$0x1234
+  4a:	34 12 
+
+0000004c <mtpr>:
+  4c:	09 30 10 00 	mtpr	r0, hi
+
+00000050 <mfpr>:
+  50:	0a 30 05 11 	mfpr	lo, r5
+  54:	0a 30 0a 90 	mfpr	uhi, r10
+
+00000058 <cinv>:
+  58:	10 30 0f 00 	cinv	\[b,d,i,u\]
diff --git a/gas/testsuite/gas/crx/cop_insn.s b/gas/testsuite/gas/crx/cop_insn.s
new file mode 100644
index 0000000..1415cff
--- /dev/null
+++ b/gas/testsuite/gas/crx/cop_insn.s
@@ -0,0 +1,77 @@
+# Co-Processor instructions.
+ .data
+foodata: .word 42
+	 .text
+footext:
+
+	.global mtcr
+mtcr:
+mtcr $0xf, r1, c14
+
+	.global mfcr
+mfcr:
+mfcr $3, c7, r2
+
+	.global mtcsr
+mtcsr:
+mtcsr $0x2, r5, cs1
+
+	.global mfcsr
+mfcsr:
+mfcsr $01, cs12, ra
+
+	.global ldcr
+ldcr:
+ldcr $1, r3, c8
+
+	.global stcr
+stcr:
+stcr $2, r4, c11
+
+	.global ldcsr
+ldcsr:
+ldcsr $4, r6, cs12
+
+	.global stcsr
+stcsr:
+stcsr $7, r13, cs13
+
+	.global loadmcr
+loadmcr:
+loadmcr $3, r1, {c2,c3,c5}
+
+	.global stormcr
+stormcr:
+stormcr $15, ra, {c10,c9,c7,c4}
+
+	.global loadmcsr
+loadmcsr:
+loadmcsr $12, r8, {cs7, cs8, cs9, cs10, cs11}
+
+	.global stormcsr
+stormcsr:
+stormcsr $9, r9, {cs10,cs7,cs4}
+
+	.global bcop
+bcop:
+bcop $7, $3, 0x90
+bcop $6, $12, -0xbcdfe
+
+	.global cpdop
+cpdop:
+cpdop $3, $2, r4, r5
+cpdop $7, $10, r1, r2, $0x1234
+
+	.global mtpr
+mtpr:
+mtpr r0 , hi
+
+	.global mfpr
+mfpr:
+mfpr lo , r5
+mfpr uhi , r10
+
+	.global cinv
+cinv:
+cinv [i,d,u,b]
+
diff --git a/gas/testsuite/gas/crx/load_stor_insn.d b/gas/testsuite/gas/crx/load_stor_insn.d
index 6a4a177..805e3ea 100644
--- a/gas/testsuite/gas/crx/load_stor_insn.d
+++ b/gas/testsuite/gas/crx/load_stor_insn.d
@@ -141,10 +141,3 @@ Disassembly of section .text:
  182:	af 36 05 a0 	stord	\$0xf, 0x5\(r10\)\+
  186:	a0 36 e4 bf 	stord	\$0x0, 0xfe4\(r11\)\+
 
-0000018a <loadmcr>:
- 18a:	13 31 01 30 	loadmcr	\$0x3, r1, {c2,c3,c5}
- 18e:	2c 00 
-
-00000190 <stormcr>:
- 190:	1f 31 1e 30 	stormcr	\$0xf, r14, {c4,c7,c9,c10}
- 194:	90 06 
diff --git a/gas/testsuite/gas/crx/load_stor_insn.s b/gas/testsuite/gas/crx/load_stor_insn.s
index 6b71621..4c9fd41 100644
--- a/gas/testsuite/gas/crx/load_stor_insn.s
+++ b/gas/testsuite/gas/crx/load_stor_insn.s
@@ -108,11 +108,3 @@ stord r14, -0657(r15,r7,1)
 stord $0xf, 05(r10)+
 stord $0x0, -034(r11)+
 
-# CO-processor registers
-	.global loadmcr
-loadmcr:
-loadmcr $3, r1, {c2,c3,c5}
-
-	.global stormcr
-stormcr:
-stormcr $15, ra, {c10,c9,c7,c4}
diff --git a/gas/testsuite/gas/crx/misc_insn.d b/gas/testsuite/gas/crx/misc_insn.d
index c183222..ea4c7c4 100644
--- a/gas/testsuite/gas/crx/misc_insn.d
+++ b/gas/testsuite/gas/crx/misc_insn.d
@@ -1,6 +1,6 @@
 #as:
 #objdump: -dr
-#name: load_stor_insn
+#name: misc_insn
 
 .*: +file format .*
 
@@ -213,48 +213,21 @@ Disassembly of section .text:
 0000010c <cntlsd>:
  10c:	08 30 2c ae 	cntlsd	r2, r12
 
-00000110 <mtpr>:
- 110:	09 30 10 00 	mtpr	r0, hi
+00000110 <excp>:
+ 110:	f8 ff       	excp	bpt
+ 112:	f5 ff       	excp	svc
 
-00000114 <mfpr>:
- 114:	0a 30 05 11 	mfpr	lo, r5
- 118:	0a 30 0a 90 	mfpr	uhi, r10
+00000114 <ram>:
+ 114:	61 3e ec 21 	ram	\$0x18, \$0x9, \$0x1, r14, r12
 
-0000011c <mtcr>:
- 11c:	1f 30 1e 30 	mtcr	\$0xf, r1, c14
+00000118 <rim>:
+ 118:	fd 3e 21 ee 	rim	\$0x1f, \$0xf, \$0xe, r2, r1
 
-00000120 <mfcr>:
- 120:	13 30 72 31 	mfcr	\$0x3, c7, r2
+0000011c <rotb>:
+ 11c:	f1 fd       	rotb	\$0x7, r1
 
-00000124 <mtcsr>:
- 124:	12 30 51 32 	mtcsr	\$0x2, r5, cs1
+0000011e <rotw>:
+ 11e:	d3 b9       	rotw	\$0xd, r3
 
-00000128 <mfcsr>:
- 128:	11 30 ce 33 	mfcsr	\$0x1, cs12, r14
-
-0000012c <bcop>:
- 12c:	13 30 48 77 	bcop	\$0x7, \$0x3, \*\+0x90
- 130:	1c 31 fa 76 	bcop	\$0x6, \$0xc, \*\-0xbcdfe
- 134:	01 19 
-
-00000136 <excp>:
- 136:	f8 ff       	excp	bpt
- 138:	f5 ff       	excp	svc
-
-0000013a <cinv>:
- 13a:	10 30 07 00 	cinv	\[d,i,u\]
-
-0000013e <ram>:
- 13e:	61 3e ec 21 	ram	\$0x18, \$0x9, \$0x1, r14, r12
-
-00000142 <rim>:
- 142:	fd 3e 21 ee 	rim	\$0x1f, \$0xf, \$0xe, r2, r1
-
-00000146 <rotb>:
- 146:	f1 fd       	rotb	\$0x7, r1
-
-00000148 <rotw>:
- 148:	d3 b9       	rotw	\$0xd, r3
-
-0000014a <rotd>:
- 14a:	08 30 b2 f1 	rotd	\$0x1b, r2
+00000120 <rotd>:
+ 120:	08 30 b2 f1 	rotd	\$0x1b, r2
diff --git a/gas/testsuite/gas/crx/misc_insn.s b/gas/testsuite/gas/crx/misc_insn.s
index f6a2488..2330d4c 100644
--- a/gas/testsuite/gas/crx/misc_insn.s
+++ b/gas/testsuite/gas/crx/misc_insn.s
@@ -284,45 +284,11 @@ subqd r0 , r10
 cntlsd:
 cntlsd r2 , r12
 
-	.global mtpr
-mtpr:
-mtpr r0 , hi
-
-	.global mfpr
-mfpr:
-mfpr lo , r5
-mfpr uhi , r10
-
-	.global mtcr
-mtcr:
-mtcr $0xf, r1, c14
-
-	.global mfcr
-mfcr:
-mfcr $3, c7, r2
-
-	.global mtcsr
-mtcsr:
-mtcsr $0x2, r5, cs1
-
-	.global mfcsr
-mfcsr:
-mfcsr $01, cs12, ra
-
-	.global bcop
-bcop:
-bcop $7, $3, 0x90
-bcop $6, $12, -0xbcdfe
-
 	.global excp
 excp:
 excp BPT
 excp svc
 
-	.global cinv
-cinv:
-cinv [i,d,u]
-
 	.global ram
 ram:
 ram $24, $9, $1, ra, r12