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authorVictor Do Nascimento <victor.donascimento@arm.com>2023-11-15 14:29:31 +0000
committerVictor Do Nascimento <victor.donascimento@arm.com>2024-01-09 10:16:40 +0000
commit3521a28f10900ed893f53fcceec2f66c335cb154 (patch)
tree2ddacb0f3751437dfdce28490946d167995d3098 /gas
parentf89c290e23c1195bbe6f90980ace3f9a81fde6f1 (diff)
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aarch64: Add support for the SYSP 128-bit system instruction
Mirroring the use of the `sys' - System Instruction assembly instruction, this implements its 128-bit counterpart, `sysp'. This optionally takes two contiguous general-purpose registers starting at an even number or, when these are omitted, by default sets both of these to xzr. Syntax: sysp #<op1>, <Cn>, <Cm>, #<op2>{, <Xt1>, <Xt2>}
Diffstat (limited to 'gas')
-rw-r--r--gas/testsuite/gas/aarch64/illegal-sys128.l4
-rw-r--r--gas/testsuite/gas/aarch64/illegal-sys128.s5
2 files changed, 9 insertions, 0 deletions
diff --git a/gas/testsuite/gas/aarch64/illegal-sys128.l b/gas/testsuite/gas/aarch64/illegal-sys128.l
new file mode 100644
index 0000000..b86fbc8
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/illegal-sys128.l
@@ -0,0 +1,4 @@
+.*: Assembler messages:
+.*: Error: C8 - C9 expected at operand 2 -- `sysp #0,C7,C0,#0,x0,x1'
+.*: Error: C8 - C9 expected at operand 2 -- `sysp #0,C10,C0,#0,x0,x1'
+.*: Error: C0 - C7 expected at operand 3 -- `sysp #6,C9,C8,#7,x27,x28'
diff --git a/gas/testsuite/gas/aarch64/illegal-sys128.s b/gas/testsuite/gas/aarch64/illegal-sys128.s
new file mode 100644
index 0000000..42473c9
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/illegal-sys128.s
@@ -0,0 +1,5 @@
+ .arch armv8-a+d128
+
+ sysp #0, C7, C0, #0, x0, x1
+ sysp #0, C10, C0, #0, x0, x1
+ sysp #6, C9, C8, #7, x27, x28