Bunch of changes from Richard Earnshaw for generic bi-endian ARM aout targets.

Details in change logs.

8 files changed, 137 insertions, 4 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 7336fca..34bd170 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,105 @@
+Thu May 18 04:25:11 1995  Ken Raeburn  <raeburn@kr-laptop.cygnus.com>
+
+	Wed May 10 14:28:16 1995 Richard Earnshaw (rearnsha@armltd.co.uk)
+
+	* config/tc-arm.c (CP_T_{Pre,UD,WB}): Define, bits in co-processor 
+	instructions.
+	([ls]fm_flags): Correct error in bitmasks.
+	(cp_address_required_here): Delete second parameter, FLAGS.  All 
+	callers changed.  Remove all dead code referring to FLAGS.  If 
+	address is just "[Reg]" then convert into a PRE-INCREMENT UP format.
+	(do_fp_ldmstm): Handle full-descending and empty-ascending stack 
+	formats explicitly.
+
+	* config/tc-arm.c (internalError): Define.
+	(ARM_{1,2,250,3,6,7,7DM,ANY,2UP,ALL,3UP,6UP,LONGMUL}): Define processor
+	variants.
+	(FPU_{CORE,FPA10,FPA11,NONE,ALL,MEMMULTI}): Define floating point
+	variants.
+	({CPU,FPU}_DEFAULT): Define.
+	(cpu_variant): New variable.
+	(asm_flg): Change more_flags to flag_bits.
+	Add prototypes for new functions.
+	(FLAG_{S,P,B,T,ED,FD,FA,EA,IB,IA,DB,DA,L}): Delete.
+	(s_flag[], ldst_flags[], byte_flag[], cmp_flags[], ldm_flags[],
+	 stm_flags[], lfm_flags[], sfm_flags[], round_flags[], except_flags[],
+	 cplong_flag[]): New variables.
+	(asm_opcode, insns[]): New format, add version support.
+	(arm_flg_hsh): Delete.
+	(do_mul, do_mla): Remove "Warning" from warning messages.
+	(do_arit): Simplify.
+	(do_swap): Make error message more appropriate.
+	(md_begin): Build hash tables starting at first entry in tables.
+	(md_number_to_chars): Cope with big/little-endian selection.
+	(md_chars_to_number): New function.
+	(md_apply_fix): Rewrite to make endian independent.
+	(tc_gen_reloc): Better error messages.
+	(md_assemble): Reject opcodes forbidden by the currently selected cpu
+	variant.  Rewrite handling code for instruction flags.
+	(md_shortopts): Add option "m:".
+	(md_parse_option): Get the desired cpu/fpu variant.
+
+	From: David Taylor (dtaylor@armltd.co.uk)
+	* configure.in (architecture variants): Check for "armeb" and "arm*",
+	set endianness accordingly.
+	* read.c (read_a_source_file): New hooks md_start_line_hook and
+	md_after_pass_hook.
+	* config/arm-{big,lit}.mt: New files
+	* config/tc-arm.h ({LITTLE,BIG}_ENDIAN, BYTE_ORDER): Define.
+	(TARGET_FORMAT): Select depending on endianness and emulation and 
+	object format.
+	(md_after_pass_hook, md_start_line_hook): Define.
+	* config/tc-arm.c: Include subsegs.h, symbols.h and listing.h.
+	(shift[]): Add uppper case equivalents.
+	(CP_T_[XY], TRANS_BIT): Define.
+	(conds[]): Delete initial NULL entry, add "lo" entry as synonym for 
+	"cc".
+	(LONGEST_FLAG, flags[]): Delete.
+	(arm_psr): New structure.
+	(psrs[]): New variable.
+	(PSR_ALL): Define.
+	(LONGEST_INST): Bump to 5.
+	(LITERAL_MASK, COND_MASK, OPCODE_MASK, DATA_OP_SHIFT): Define.
+	(OPCODE_{AND,EOR,SUB,RSB,ADD,ADC,SBC,RSC,TST,TEQ,CMP,CMN,ORR,MOV,BIC,
+	 MVN}): Define.
+	(insns[]): Add smull, umull, smlal, umlal, ldfm, stfm, msr and mrs
+	instructions.  Add nop and adr pseudo ops.
+	(reg_table): Add APCS register name variants.
+	(arm_psr_hsh): New hash table.
+	(md_pseudo_table): Add "ltorg", "pool", "extend", "ldouble" and 
+	"packed".
+	(MAX_LITERAL_POOL_SIZE): Define.
+	(struct literalS): New structure.
+	(literals, next_literal_pool_place, lit_pool_num, current_poolP): New
+	variables.
+	(add_to_lit_pool, symbol_locate, symbol_make_empty): New functions.
+	(validate_immediate): Return FAIL on failure.
+	(s_ltorg): New function.
+	(psr_required_here, psrf_required_here): New functions.
+	(cp_address_required_here): New parameter, flag, all callers changed.
+	If flag is non-zero, restrict the legal addressing modes.
+	(do_nop, do_mrs, do_msr, do_mull): New functions.
+	(negate_data_op): New function.
+	(data_op2): accept #x,y meaning x rotated right by y, but only when
+	suitable constants.  If immediate is not legal, try changing the
+	opcode.
+	(do_adr): New function.
+	(do_ldst): accept "ldr reg, =expr".  Put expr in the pool if it can't
+	be done as an immediate.
+	(do_fp_ldst): Use CP_T_[XY], not immediate values.
+	(do_fp_ldmstm): New function.
+	(arm_psr_parse): New function.
+	(output_inst): Use INSN_SIZE in call to md_number_to_chars.
+	(md_assemble): Add hack so that "Label instruction" causes alignment of
+	the label.
+	(arm_after_pass_hook, arm_start_line_hook, arm_frob_symbol): New 
+	functions.
+
+Wed May 17 05:25:16 1995  Michael Meissner  <meissner@tiktok.cygnus.com>
+
+	* config/tc-ppc.c (md_show_usage): Add \'s at end of lines in
+	strings for non-GCC compilers.
+
 Tue May 16 19:36:00 1995  Ken Raeburn  <raeburn@cujo.cygnus.com>
 
 	* config/obj-ecoff.c (ecoff_pop_insert): New function.
diff --git a/gas/config/.Sanitize b/gas/config/.Sanitize
index 0406a2a..91be3b0 100644
--- a/gas/config/.Sanitize
+++ b/gas/config/.Sanitize
@@ -41,6 +41,8 @@ Things-to-keep:
 
 aout_gnu.h
 alpha-opcode.h
+arm-big.mt
+arm-lit.mt
 atof-ieee.c
 atof-tahoe.c
 atof-vax.c
diff --git a/gas/config/arm-big.mt b/gas/config/arm-big.mt
new file mode 100644
index 0000000..31e773a
--- /dev/null
+++ b/gas/config/arm-big.mt
@@ -0,0 +1 @@
+TDEFINES=-DTARGET_BYTES_BIG_ENDIAN
diff --git a/gas/config/arm-lit.mt b/gas/config/arm-lit.mt
new file mode 100644
index 0000000..9e240e8
--- /dev/null
+++ b/gas/config/arm-lit.mt
@@ -0,0 +1 @@
+TDEFINES=-DTARGET_BYTES_LITTLE_ENDIAN
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 64dbbc6..4c8a668 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,17 @@
+Wed May 10 14:28:16 1995 Richard Earnshaw (rearnsha@armltd.co.uk)	
+
+	* arm/arm7dm.s: New file -- tests for ARM7DM instructions.
+	* arm/arm6.s: Correct bogus tests.
+	* arm/gas.exp (arm6.s): Is now a valid test.
+	(arm7dm.s): New test.
+	* arm/float.s: Add load/store multiple floating point instruction 
+	tests.
+
+Wed May  3 13:14:44 1995  Jeff Law  (law@snake.cs.utah.edu)
+
+	* gas/hppa/reloc/longcall.s: New test.
+	* gas/hppa/reloc/reloc.exp: Run it.
+
 Tue May  2 16:37:48 1995  Ken Raeburn  <raeburn@cujo.cygnus.com>
 
 	* gas/mips/ld.d: Modified for gas delay-slot fixes.
diff --git a/gas/testsuite/gas/arm/.Sanitize b/gas/testsuite/gas/arm/.Sanitize
index 4594424..6fb3a4f 100644
--- a/gas/testsuite/gas/arm/.Sanitize
+++ b/gas/testsuite/gas/arm/.Sanitize
@@ -27,6 +27,7 @@ Things-to-keep:
 
 arm3.s
 arm6.s
+arm7dm.s
 copro.s
 float.s
 gas.exp
diff --git a/gas/testsuite/gas/arm/arm7dm.s b/gas/testsuite/gas/arm/arm7dm.s
new file mode 100644
index 0000000..7496c70
--- /dev/null
+++ b/gas/testsuite/gas/arm/arm7dm.s
@@ -0,0 +1,12 @@
+.text
+.align 0
+	
+	smull	r0, r1, r2, r3
+	umull	r0, r1, r2, r3
+	smlal	r0, r1, r2, r3
+	umlal	r0, r1, r4, r3
+
+	smullne	r0, r1, r3, r4
+	smulls	r1, r0, r9, r11
+	umlaleqs r2, r9, r4, r9
+	smlalge r14, r10, r8, r14
diff --git a/gas/testsuite/gas/arm/gas.exp b/gas/testsuite/gas/arm/gas.exp
index 92f6adc..339c3e6 100644
--- a/gas/testsuite/gas/arm/gas.exp
+++ b/gas/testsuite/gas/arm/gas.exp
@@ -1,14 +1,14 @@
 #
 # Some ARM tests
 #
-if [istarget arm-*-riscix*] then {
+if [istarget arm-*-*] then {
     gas_test "inst.s" "" $stdoptlist "Basic instruction set"
 
     gas_test "arm3.s" "" $stdoptlist "Arm 3 instructions"
 
-    # These instructions aren't supported, and I'm told some are
-    # actually invalid.
-    gas_test_error "arm6.s" "" "Arm 6 instructions"
+    gas_test "arm6.s" "" $stdoptlist "Arm 6 instructions"
+
+    gas_test "arm7dm.s" "" $stdoptlist "Arm 7DM instructions"
 
     gas_test "copro.s" "" $stdoptlist "Co processor instructions"