include/opcode/

	* mips.h: Remove documentation of "+D" and "+T".

opcodes/
	* mips-opc.c (mips_builtin_opcodes): Remove "+D" and "+T" entries.
	* micromips-opc.c (micromips_opcodes): Likewise.
	* mips-dis.c (print_insn_args, print_insn_micromips): Remove "+D"
	and "+T" handling.  Check for a "0" suffix when deciding whether to
	use coprocessor 0 names.  In that case, also check for ",H" selectors.

gas/
	* config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
	(mips_ip): Remove "+D" and "+T" handling.

gas/testsuite/
	* gas/mips/lb.d, gas/mips/sb.d: Use coprocessor register names
	for LWC0 and SWC0.

5 files changed, 12 insertions, 16 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 333eb03..0ab8ff0 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2013-07-07  Richard Sandiford  <rdsandiford@googlemail.com>
+
+	* config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
+	(mips_ip): Remove "+D" and "+T" handling.
+
 2013-07-05  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 
 	* config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index d2b1f63..395230d 100644
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -10889,8 +10889,6 @@ validate_mips_insn (const struct mips_opcode *opc)
 	  case 'A': USE_BITS (OP_MASK_SHAMT,	OP_SH_SHAMT);	break;
 	  case 'B': USE_BITS (OP_MASK_INSMSB,	OP_SH_INSMSB);	break;
 	  case 'C': USE_BITS (OP_MASK_EXTMSBD,	OP_SH_EXTMSBD);	break;
-	  case 'D': USE_BITS (OP_MASK_RD,	OP_SH_RD);
-		    USE_BITS (OP_MASK_SEL,	OP_SH_SEL);	break;
 	  case 'E': USE_BITS (OP_MASK_SHAMT,	OP_SH_SHAMT);	break;
 	  case 'F': USE_BITS (OP_MASK_INSMSB,	OP_SH_INSMSB);	break;
 	  case 'G': USE_BITS (OP_MASK_EXTMSBD,	OP_SH_EXTMSBD);	break;
@@ -10898,8 +10896,6 @@ validate_mips_insn (const struct mips_opcode *opc)
 	  case 'I': break;
 	  case 'J': USE_BITS (OP_MASK_CODE10,	OP_SH_CODE10);	break;
 	  case 't': USE_BITS (OP_MASK_RT,	OP_SH_RT);	break;
-	  case 'T': USE_BITS (OP_MASK_RT,	OP_SH_RT);
-		    USE_BITS (OP_MASK_SEL,	OP_SH_SEL);	break;
 	  case 'x': USE_BITS (OP_MASK_BBITIND,	OP_SH_BBITIND);	break;
 	  case 'X': USE_BITS (OP_MASK_BBITIND,	OP_SH_BBITIND);	break;
 	  case 'p': USE_BITS (OP_MASK_CINSPOS,	OP_SH_CINSPOS);	break;
@@ -11069,7 +11065,6 @@ validate_micromips_insn (const struct mips_opcode *opc)
 	  case 'A': USE_BITS (EXTLSB);	break;
 	  case 'B': USE_BITS (INSMSB);	break;
 	  case 'C': USE_BITS (EXTMSBD);	break;
-	  case 'D': USE_BITS (RS);	USE_BITS (SEL);	break;
 	  case 'E': USE_BITS (EXTLSB);	break;
 	  case 'F': USE_BITS (INSMSB);	break;
 	  case 'G': USE_BITS (EXTMSBD);	break;
@@ -11938,10 +11933,6 @@ mips_ip (char *str, struct mips_cl_insn *ip)
 		  s = expr_end;
 		  continue;
 
-		case 'D':
-		  /* +D is for disassembly only; never match.  */
-		  break;
-
 		case 'I':
 		  /* "+I" is like "I", except that imm2_expr is used.  */
 		  my_getExpression (&imm2_expr, s);
@@ -11953,11 +11944,6 @@ mips_ip (char *str, struct mips_cl_insn *ip)
 		  s = expr_end;
 		  continue;
 
-		case 'T': /* Coprocessor register.  */
-		  gas_assert (!mips_opts.micromips);
-		  /* +T is for disassembly only; never match.  */
-		  break;
-
 		case 't': /* Coprocessor register number.  */
 		  gas_assert (!mips_opts.micromips);
 		  if (s[0] == '$' && ISDIGIT (s[1]))
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 82b437c..bf440eb 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2013-07-07  Richard Sandiford  <rdsandiford@googlemail.com>
+
+	* gas/mips/lb.d, gas/mips/sb.d: Use coprocessor register names
+	for LWC0 and SWC0.
+
 2013-07-05  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 
 	* gas/s390/zarch-zEC12.s: Change bprp second operand and add
diff --git a/gas/testsuite/gas/mips/lb.d b/gas/testsuite/gas/mips/lb.d
index 4a43c7f..918b842 100644
--- a/gas/testsuite/gas/mips/lb.d
+++ b/gas/testsuite/gas/mips/lb.d
@@ -388,7 +388,7 @@ Disassembly of section .text:
 0+0378 <[^>]*> lw	a0,0\(zero\)
 0+037c <[^>]*> lwl	a0,0\(zero\)
 0+0380 <[^>]*> lwr	a0,0\(zero\)
-0+0384 <[^>]*> lwc0	\$4,0\(zero\)
+0+0384 <[^>]*> lwc0	(c0_context|\$4),0\(zero\)
 0+0388 <[^>]*> lwc1	\$f4,0\(zero\)
 0+038c <[^>]*> lwc2	\$4,0\(zero\)
 0+0390 <[^>]*> lwc3	\$4,0\(zero\)
diff --git a/gas/testsuite/gas/mips/sb.d b/gas/testsuite/gas/mips/sb.d
index 627c658..d25c43e 100644
--- a/gas/testsuite/gas/mips/sb.d
+++ b/gas/testsuite/gas/mips/sb.d
@@ -386,7 +386,7 @@ Disassembly of section .text:
 0+0370 <[^>]*> sw	a1,4\(zero\)
 0+0374 <[^>]*> sh	a0,0\(zero\)
 0+0378 <[^>]*> sw	a0,0\(zero\)
-0+037c <[^>]*> swc0	\$4,0\(zero\)
+0+037c <[^>]*> swc0	c0_context,0\(zero\)
 0+0380 <[^>]*> swc1	\$f4,0\(zero\)
 0+0384 <[^>]*> swc2	\$4,0\(zero\)
 0+0388 <[^>]*> swc3	\$4,0\(zero\)