gas/

	* config/tc-mips.c (append_insn): Set fx_no_overflow for 16-bit
	microMIPS branch relocations.

	gas/testsuite/
	* gas/mips/micromips-b16.d: New test.
	* gas/mips/micromips-b16.s: New test source.
	* gas/mips/mips.exp: Run the new test.

6 files changed, 79 insertions, 0 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 65fbfab..97be1d4 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2012-11-01  Chao-ying Fu  <fu@mips.com>
+
+	* config/tc-mips.c (append_insn): Set fx_no_overflow for 16-bit
+	microMIPS branch relocations.
+
 2012-11-01  Maciej W. Rozycki  <macro@codesourcery.com>
 
 	* config/tc-mips.c (is_delay_slot_valid): Don't accept macros
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index dcea7bc..4f7ead9 100644
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -4464,6 +4464,11 @@ append_insn (struct mips_cl_insn *ip, expressionS *address_expr,
 	      || lo16_reloc_p (reloc_type[0])))
 	ip->fixp[0]->fx_no_overflow = 1;
 
+      /* These relocations can have an addend that won't fit in 2 octets.  */
+      if (reloc_type[0] == BFD_RELOC_MICROMIPS_7_PCREL_S1
+	  || reloc_type[0] == BFD_RELOC_MICROMIPS_10_PCREL_S1)
+	ip->fixp[0]->fx_no_overflow = 1;
+
       if (mips_relax.sequence)
 	{
 	  if (mips_relax.first_fixup == 0)
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 4ea1ff1..573f020 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,4 +1,10 @@
 2012-11-01  Chao-ying Fu  <fu@mips.com>
+
+	* gas/mips/micromips-b16.d: New test.
+	* gas/mips/micromips-b16.s: New test source.
+	* gas/mips/mips.exp: Run the new test.
+
+2012-11-01  Chao-ying Fu  <fu@mips.com>
             Maciej W. Rozycki  <macro@codesourcery.com>
 
 	* gas/mips/micromips-branch-delay.l: Update messages for 16-bit
diff --git a/gas/testsuite/gas/mips/micromips-b16.d b/gas/testsuite/gas/mips/micromips-b16.d
new file mode 100644
index 0000000..16e8a7a
--- /dev/null
+++ b/gas/testsuite/gas/mips/micromips-b16.d
@@ -0,0 +1,45 @@
+#objdump: -dr --show-raw-insn
+#name: microMIPS b16, bnez16, beqz16
+#as: -32 -mmicromips
+#source: micromips-b16.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+
+[0-9a-f]+ <test1>:
+	\.\.\.
+
+[0-9a-f]+ <test2>:
+[ 0-9a-f]+:	cfff      	b	[0-9a-f]+ <.*>
+[ 	]*[0-9a-f]+: R_MICROMIPS_PC10_S1	.*
+[ 0-9a-f]+:	0c00      	nop
+
+[0-9a-f]+ <.*>:
+[ 0-9a-f]+:	ad7f      	bnez	v0,[0-9a-f]+ <.*>
+[ 	]*[0-9a-f]+: R_MICROMIPS_PC7_S1	.*
+[ 0-9a-f]+:	0c00      	nop
+
+[0-9a-f]+ <.*>:
+[ 0-9a-f]+:	8d7f      	beqz	v0,[0-9a-f]+ <.*>
+[ 	]*[0-9a-f]+: R_MICROMIPS_PC7_S1	.*
+[ 0-9a-f]+:	0c00      	nop
+
+[0-9a-f]+ <.*>:
+[ 0-9a-f]+:	cfff      	b	[0-9a-f]+ <.*>
+[ 	]*[0-9a-f]+: R_MICROMIPS_PC10_S1	.*
+[ 0-9a-f]+:	0c00      	nop
+
+[0-9a-f]+ <.*>:
+[ 0-9a-f]+:	ad7f      	bnez	v0,[0-9a-f]+ <.*>
+[ 	]*[0-9a-f]+: R_MICROMIPS_PC7_S1	.*
+[ 0-9a-f]+:	0c00      	nop
+
+[0-9a-f]+ <.*>:
+[ 0-9a-f]+:	8d7f      	beqz	v0,[0-9a-f]+ <.*>
+[ 	]*[0-9a-f]+: R_MICROMIPS_PC7_S1	.*
+[ 0-9a-f]+:	0c00      	nop
+
+[0-9a-f]+ <.*>:
+[ 0-9a-f]+:	0c00      	nop
+#pass
diff --git a/gas/testsuite/gas/mips/micromips-b16.s b/gas/testsuite/gas/mips/micromips-b16.s
new file mode 100644
index 0000000..ddfeaf4
--- /dev/null
+++ b/gas/testsuite/gas/mips/micromips-b16.s
@@ -0,0 +1,17 @@
+	.text
+test1:
+	.space	65536
+test2:
+	b16	1f
+1:
+	bnez16	$2,1f
+1:
+	beqz16	$2,1f
+1:
+	b	1f
+1:
+	bnez	$2,1f
+1:
+	beqz	$2,1f
+1:
+	nop
diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp
index ac1d24b..6a452d5 100644
--- a/gas/testsuite/gas/mips/mips.exp
+++ b/gas/testsuite/gas/mips/mips.exp
@@ -1115,6 +1115,7 @@ if { [istarget mips*-*-vxworks*] } {
 	run_dump_test "micromips-branch-delay"
 	run_dump_test "micromips-warn-branch-delay"
 	run_dump_test "micromips-warn-branch-delay-1"
+	run_dump_test "micromips-b16"
     }
 
     run_dump_test_arches "mcu"		[mips_arch_list_matching mips32r2 \