Add support for CPUID PREFETCHWT1

Latest AVX512 spec
http://download-software.intel.com/sites/default/files/managed/50/1a/319433-018.pdf
Has CPUID PREFETCHWT1 for prefetchwt1 instruction, which we list as AVX512PF.
This patch introduces CPUID PREFETCHWT1.

gas/

        * config/tc-i386.c (cpu_arch): Add .prefetchwt1.
        * doc/c-i386.texi: Document .prefetchwt1/prefetchwt1.

opcodes/

        * i386-gen.c (cpu_flag_init): Add CPU_PREFETCHWT1_FLAGS/
        (cpu_flags): Add CpuPREFETCHWT1.
        * i386-init.h: Regenerate.
        * i386-opc.h (CpuPREFETCHWT1): New.
        (i386_cpu_flags): Add cpuprefetchwt1.
        * i386-opc.tbl: Cahnge CPU of prefetchwt1 from CpuAVX512PF to CpuPREFETCHWT1.
        * i386-tbl.h: Regenerate.

gas/testsuite

        * gas/i386/avx512pf-intel.d: Remove prefetchwt1.
        * gas/i386/avx512pf.s: Ditto.
        * gas/i386/avx512pf.d: Ditto.
        * gas/i386/x86-64-avx512pf-intel.d: Ditto.
        * gas/i386/x86-64-avx512pf.s: Ditto.
        * gas/i386/x86-64-avx512pf.d: Ditto.
        * gas/i386/prefetchwt1-intel.d: New file.
        * gas/i386/prefetchwt1.s: Ditto.
        * gas/i386/prefetchwt1.d: Ditto.
        * gas/i386/x86-64-prefetchwt1-intel.d: Ditto.
        * gas/i386/x86-64-prefetchwt1.s: Ditto.
        * gas/i386/x86-64-prefetchwt1.d: Ditto.

17 files changed, 115 insertions, 28 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index b80cec5..3469821 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2014-02-21  Ilya Tocar  <ilya.tocar@intel.com>
+
+	* config/tc-i386.c (cpu_arch): Add .prefetchwt1.
+	* doc/c-i386.texi: Document .prefetchwt1/prefetchwt1.
+
 2014-02-12  Ilya Tocar  <ilya.tocar@intel.com>
 
 	* config/tc-i386.c (cpu_arch): Add .clflushopt, .xsavec, .xsaves.
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 49626cd..e6313cf 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -910,6 +910,8 @@ static const arch_entry cpu_arch[] =
     CPU_XSAVEC_FLAGS, 0, 0 },
   { STRING_COMMA_LEN (".xsaves"), PROCESSOR_UNKNOWN,
     CPU_XSAVES_FLAGS, 0, 0 },
+  { STRING_COMMA_LEN (".prefetchwt1"), PROCESSOR_UNKNOWN,
+    CPU_PREFETCHWT1_FLAGS, 0, 0 },
 };
 
 #ifdef I386COFF
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
index 0fa8df1..0d79fbd 100644
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -1064,6 +1064,7 @@ supported on the CPU specified.  The choices for @var{cpu_type} are:
 @item @samp{.smap} @tab @samp{.mpx}
 @item @samp{.smap} @tab @samp{.sha}
 @item @samp{.smap} @tab @samp{.clflushopt} @tab @samp{.xsavec} @tab @samp{.xsaves}
+@item @samp{.smap} @tab @samp{.prefetchwt1}
 @item @samp{.3dnow} @tab @samp{.3dnowa} @tab @samp{.sse4a} @tab @samp{.sse5}
 @item @samp{.syscall} @tab @samp{.rdtscp} @tab @samp{.svme} @tab @samp{.abm}
 @item @samp{.lwp} @tab @samp{.fma4} @tab @samp{.xop} @tab @samp{.cx16}
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index a867e44..c32ec63 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,18 @@
+2014-02-21  Ilya Tocar  <ilya.tocar@intel.com>
+
+	* gas/i386/avx512pf-intel.d: Remove prefetchwt1.
+	* gas/i386/avx512pf.s: Ditto.
+	* gas/i386/avx512pf.d: Ditto.
+	* gas/i386/x86-64-avx512pf-intel.d: Ditto.
+	* gas/i386/x86-64-avx512pf.s: Ditto.
+	* gas/i386/x86-64-avx512pf.d: Ditto.
+	* gas/i386/prefetchwt1-intel.d: New file.
+	* gas/i386/prefetchwt1.s: Ditto.
+	* gas/i386/prefetchwt1.d: Ditto.
+	* gas/i386/x86-64-prefetchwt1-intel.d: Ditto.
+	* gas/i386/x86-64-prefetchwt1.s: Ditto.
+	* gas/i386/x86-64-prefetchwt1.d: Ditto.
+
 2014-02-20  Ilya Tocar  <ilya.tocar@intel.com>
 
 	* gas/i386/avx512cd-intel.d: Remove vptestnmq, vptestnmd.
diff --git a/gas/testsuite/gas/i386/avx512pf-intel.d b/gas/testsuite/gas/i386/avx512pf-intel.d
index 126792f..05012dc 100644
--- a/gas/testsuite/gas/i386/avx512pf-intel.d
+++ b/gas/testsuite/gas/i386/avx512pf-intel.d
@@ -73,8 +73,6 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	62 f2 7d 49 c7 b4 fd 7b 00 00 00 	vscatterpf1qps ZMMWORD PTR \[ebp\+zmm7\*8\+0x7b\]\{k1\}
 [ 	]*[a-f0-9]+:	62 f2 7d 49 c7 74 38 40 	vscatterpf1qps ZMMWORD PTR \[eax\+zmm7\*1\+0x100\]\{k1\}
 [ 	]*[a-f0-9]+:	62 f2 7d 49 c7 b4 b9 00 04 00 00 	vscatterpf1qps ZMMWORD PTR \[ecx\+zmm7\*4\+0x400\]\{k1\}
-[ 	]*[a-f0-9]+:	0f 0d 11             	prefetchwt1 BYTE PTR \[ecx\]
-[ 	]*[a-f0-9]+:	0f 0d 94 f4 c0 1d fe ff 	prefetchwt1 BYTE PTR \[esp\+esi\*8-0x1e240\]
 [ 	]*[a-f0-9]+:	62 f2 fd 49 c6 8c fd 85 ff ff ff 	vgatherpf0dpd ZMMWORD PTR \[ebp\+ymm7\*8-0x7b\]\{k1\}
 [ 	]*[a-f0-9]+:	62 f2 fd 49 c6 8c fd 85 ff ff ff 	vgatherpf0dpd ZMMWORD PTR \[ebp\+ymm7\*8-0x7b\]\{k1\}
 [ 	]*[a-f0-9]+:	62 f2 fd 49 c6 4c 38 20 	vgatherpf0dpd ZMMWORD PTR \[eax\+ymm7\*1\+0x100\]\{k1\}
@@ -139,6 +137,4 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	62 f2 7d 49 c7 b4 fd 85 ff ff ff 	vscatterpf1qps ZMMWORD PTR \[ebp\+zmm7\*8-0x7b\]\{k1\}
 [ 	]*[a-f0-9]+:	62 f2 7d 49 c7 74 38 40 	vscatterpf1qps ZMMWORD PTR \[eax\+zmm7\*1\+0x100\]\{k1\}
 [ 	]*[a-f0-9]+:	62 f2 7d 49 c7 b4 b9 00 04 00 00 	vscatterpf1qps ZMMWORD PTR \[ecx\+zmm7\*4\+0x400\]\{k1\}
-[ 	]*[a-f0-9]+:	0f 0d 11             	prefetchwt1 BYTE PTR \[ecx\]
-[ 	]*[a-f0-9]+:	0f 0d 94 f4 c0 1d fe ff 	prefetchwt1 BYTE PTR \[esp\+esi\*8-0x1e240\]
 #pass
diff --git a/gas/testsuite/gas/i386/avx512pf.d b/gas/testsuite/gas/i386/avx512pf.d
index cff3f48..16a4e4f 100644
--- a/gas/testsuite/gas/i386/avx512pf.d
+++ b/gas/testsuite/gas/i386/avx512pf.d
@@ -72,8 +72,6 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	62 f2 7d 49 c7 b4 fd 7b 00 00 00 	vscatterpf1qps 0x7b\(%ebp,%zmm7,8\)\{%k1\}
 [ 	]*[a-f0-9]+:	62 f2 7d 49 c7 74 38 40 	vscatterpf1qps 0x100\(%eax,%zmm7,1\)\{%k1\}
 [ 	]*[a-f0-9]+:	62 f2 7d 49 c7 b4 b9 00 04 00 00 	vscatterpf1qps 0x400\(%ecx,%zmm7,4\)\{%k1\}
-[ 	]*[a-f0-9]+:	0f 0d 11             	prefetchwt1 \(%ecx\)
-[ 	]*[a-f0-9]+:	0f 0d 94 f4 c0 1d fe ff 	prefetchwt1 -0x1e240\(%esp,%esi,8\)
 [ 	]*[a-f0-9]+:	62 f2 fd 49 c6 8c fd 85 ff ff ff 	vgatherpf0dpd -0x7b\(%ebp,%ymm7,8\)\{%k1\}
 [ 	]*[a-f0-9]+:	62 f2 fd 49 c6 8c fd 85 ff ff ff 	vgatherpf0dpd -0x7b\(%ebp,%ymm7,8\)\{%k1\}
 [ 	]*[a-f0-9]+:	62 f2 fd 49 c6 4c 38 20 	vgatherpf0dpd 0x100\(%eax,%ymm7,1\)\{%k1\}
@@ -138,6 +136,4 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	62 f2 7d 49 c7 b4 fd 85 ff ff ff 	vscatterpf1qps -0x7b\(%ebp,%zmm7,8\)\{%k1\}
 [ 	]*[a-f0-9]+:	62 f2 7d 49 c7 74 38 40 	vscatterpf1qps 0x100\(%eax,%zmm7,1\)\{%k1\}
 [ 	]*[a-f0-9]+:	62 f2 7d 49 c7 b4 b9 00 04 00 00 	vscatterpf1qps 0x400\(%ecx,%zmm7,4\)\{%k1\}
-[ 	]*[a-f0-9]+:	0f 0d 11             	prefetchwt1 \(%ecx\)
-[ 	]*[a-f0-9]+:	0f 0d 94 f4 c0 1d fe ff 	prefetchwt1 -0x1e240\(%esp,%esi,8\)
 #pass
diff --git a/gas/testsuite/gas/i386/avx512pf.s b/gas/testsuite/gas/i386/avx512pf.s
index 301e984..fc6880a 100644
--- a/gas/testsuite/gas/i386/avx512pf.s
+++ b/gas/testsuite/gas/i386/avx512pf.s
@@ -84,9 +84,6 @@ _start:
 	vscatterpf1qps	256(%eax,%zmm7){%k1}	 # AVX512PF
 	vscatterpf1qps	1024(%ecx,%zmm7,4){%k1}	 # AVX512PF
 
-	prefetchwt1	(%ecx)	 # AVX512PF
-	prefetchwt1	-123456(%esp,%esi,8)	 # AVX512PF
-
 	.intel_syntax noprefix
 	vgatherpf0dpd	ZMMWORD PTR [ebp+ymm7*8-123]{k1}	 # AVX512PF
 	vgatherpf0dpd	ZMMWORD PTR [ebp+ymm7*8-123]{k1}	 # AVX512PF
@@ -168,6 +165,3 @@ _start:
 	vscatterpf1qps	ZMMWORD PTR [eax+zmm7+256]{k1}	 # AVX512PF
 	vscatterpf1qps	ZMMWORD PTR [ecx+zmm7*4+1024]{k1}	 # AVX512PF
 
-	prefetchwt1	BYTE PTR [ecx]	 # AVX512PF
-	prefetchwt1	BYTE PTR [esp+esi*8-123456]	 # AVX512PF
-
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index 8132d0d..257c14d 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -275,6 +275,8 @@ if [expr ([istarget "i*86-*-*"] ||  [istarget "x86_64-*-*"]) && [gas_32_check]]
     run_dump_test "xsavec-intel"
     run_dump_test "xsaves"
     run_dump_test "xsaves-intel"
+    run_dump_test "prefetchwt1"
+    run_dump_test "prefetchwt1-intel"
     run_dump_test "disassem"
 
     # These tests require support for 8 and 16 bit relocs,
@@ -571,6 +573,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
     run_dump_test "x86-64-xsavec-intel"
     run_dump_test "x86-64-xsaves"
     run_dump_test "x86-64-xsaves-intel"
+    run_dump_test "x86-64-prefetchwt1"
+    run_dump_test "x86-64-prefetchwt1-intel"
 
     if { ![istarget "*-*-aix*"]
       && ![istarget "*-*-beos*"]
diff --git a/gas/testsuite/gas/i386/prefetchwt1-intel.d b/gas/testsuite/gas/i386/prefetchwt1-intel.d
new file mode 100644
index 0000000..c8b1f62
--- /dev/null
+++ b/gas/testsuite/gas/i386/prefetchwt1-intel.d
@@ -0,0 +1,16 @@
+#as:
+#objdump: -dwMintel
+#name: i386 PREFETCHWT1 insns (Intel disassembly)
+#source: prefetchwt1.s
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:	0f 0d 11             	prefetchwt1 BYTE PTR \[ecx\]
+[ 	]*[a-f0-9]+:	0f 0d 94 f4 c0 1d fe ff 	prefetchwt1 BYTE PTR \[esp\+esi\*8-0x1e240\]
+[ 	]*[a-f0-9]+:	0f 0d 11             	prefetchwt1 BYTE PTR \[ecx\]
+[ 	]*[a-f0-9]+:	0f 0d 94 f4 c0 1d fe ff 	prefetchwt1 BYTE PTR \[esp\+esi\*8-0x1e240\]
+#pass
diff --git a/gas/testsuite/gas/i386/prefetchwt1.d b/gas/testsuite/gas/i386/prefetchwt1.d
new file mode 100644
index 0000000..a1073de
--- /dev/null
+++ b/gas/testsuite/gas/i386/prefetchwt1.d
@@ -0,0 +1,15 @@
+#as:
+#objdump: -dw
+#name: i386 PREFETCHWT1 insns
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:	0f 0d 11             	prefetchwt1 \(%ecx\)
+[ 	]*[a-f0-9]+:	0f 0d 94 f4 c0 1d fe ff 	prefetchwt1 -0x1e240\(%esp,%esi,8\)
+[ 	]*[a-f0-9]+:	0f 0d 11             	prefetchwt1 \(%ecx\)
+[ 	]*[a-f0-9]+:	0f 0d 94 f4 c0 1d fe ff 	prefetchwt1 -0x1e240\(%esp,%esi,8\)
+#pass
diff --git a/gas/testsuite/gas/i386/prefetchwt1.s b/gas/testsuite/gas/i386/prefetchwt1.s
new file mode 100644
index 0000000..ae1b01a
--- /dev/null
+++ b/gas/testsuite/gas/i386/prefetchwt1.s
@@ -0,0 +1,13 @@
+# Check 32bit AVX512PF instructions
+
+	.allow_index_reg
+	.text
+_start:
+
+	prefetchwt1	(%ecx)
+	prefetchwt1	-123456(%esp,%esi,8)
+
+	.intel_syntax noprefix
+
+	prefetchwt1	BYTE PTR [ecx]
+	prefetchwt1	BYTE PTR [esp+esi*8-123456]
diff --git a/gas/testsuite/gas/i386/x86-64-avx512pf-intel.d b/gas/testsuite/gas/i386/x86-64-avx512pf-intel.d
index c0090ce..c6ee87c 100644
--- a/gas/testsuite/gas/i386/x86-64-avx512pf-intel.d
+++ b/gas/testsuite/gas/i386/x86-64-avx512pf-intel.d
@@ -73,8 +73,6 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	62 92 7d 41 c7 b4 fe 7b 00 00 00 	vscatterpf1qps ZMMWORD PTR \[r14\+zmm31\*8\+0x7b\]\{k1\}
 [ 	]*[a-f0-9]+:	62 92 7d 41 c7 74 39 40 	vscatterpf1qps ZMMWORD PTR \[r9\+zmm31\*1\+0x100\]\{k1\}
 [ 	]*[a-f0-9]+:	62 b2 7d 41 c7 b4 b9 00 04 00 00 	vscatterpf1qps ZMMWORD PTR \[rcx\+zmm31\*4\+0x400\]\{k1\}
-[ 	]*[a-f0-9]+:	0f 0d 11             	prefetchwt1 BYTE PTR \[rcx\]
-[ 	]*[a-f0-9]+:	42 0f 0d 94 f0 23 01 00 00 	prefetchwt1 BYTE PTR \[rax\+r14\*8\+0x123\]
 [ 	]*[a-f0-9]+:	62 92 fd 41 c6 8c fe 85 ff ff ff 	vgatherpf0dpd ZMMWORD PTR \[r14\+ymm31\*8-0x7b\]\{k1\}
 [ 	]*[a-f0-9]+:	62 92 fd 41 c6 8c fe 85 ff ff ff 	vgatherpf0dpd ZMMWORD PTR \[r14\+ymm31\*8-0x7b\]\{k1\}
 [ 	]*[a-f0-9]+:	62 92 fd 41 c6 4c 39 20 	vgatherpf0dpd ZMMWORD PTR \[r9\+ymm31\*1\+0x100\]\{k1\}
@@ -139,6 +137,4 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	62 92 7d 41 c7 b4 fe 85 ff ff ff 	vscatterpf1qps ZMMWORD PTR \[r14\+zmm31\*8-0x7b\]\{k1\}
 [ 	]*[a-f0-9]+:	62 92 7d 41 c7 74 39 40 	vscatterpf1qps ZMMWORD PTR \[r9\+zmm31\*1\+0x100\]\{k1\}
 [ 	]*[a-f0-9]+:	62 b2 7d 41 c7 b4 b9 00 04 00 00 	vscatterpf1qps ZMMWORD PTR \[rcx\+zmm31\*4\+0x400\]\{k1\}
-[ 	]*[a-f0-9]+:	0f 0d 11             	prefetchwt1 BYTE PTR \[rcx\]
-[ 	]*[a-f0-9]+:	42 0f 0d 94 f0 34 12 00 00 	prefetchwt1 BYTE PTR \[rax\+r14\*8\+0x1234\]
 #pass
diff --git a/gas/testsuite/gas/i386/x86-64-avx512pf.d b/gas/testsuite/gas/i386/x86-64-avx512pf.d
index 28c7669..0e3c0bd 100644
--- a/gas/testsuite/gas/i386/x86-64-avx512pf.d
+++ b/gas/testsuite/gas/i386/x86-64-avx512pf.d
@@ -72,8 +72,6 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	62 92 7d 41 c7 b4 fe 7b 00 00 00 	vscatterpf1qps 0x7b\(%r14,%zmm31,8\)\{%k1\}
 [ 	]*[a-f0-9]+:	62 92 7d 41 c7 74 39 40 	vscatterpf1qps 0x100\(%r9,%zmm31,1\)\{%k1\}
 [ 	]*[a-f0-9]+:	62 b2 7d 41 c7 b4 b9 00 04 00 00 	vscatterpf1qps 0x400\(%rcx,%zmm31,4\)\{%k1\}
-[ 	]*[a-f0-9]+:	0f 0d 11             	prefetchwt1 \(%rcx\)
-[ 	]*[a-f0-9]+:	42 0f 0d 94 f0 23 01 00 00 	prefetchwt1 0x123\(%rax,%r14,8\)
 [ 	]*[a-f0-9]+:	62 92 fd 41 c6 8c fe 85 ff ff ff 	vgatherpf0dpd -0x7b\(%r14,%ymm31,8\)\{%k1\}
 [ 	]*[a-f0-9]+:	62 92 fd 41 c6 8c fe 85 ff ff ff 	vgatherpf0dpd -0x7b\(%r14,%ymm31,8\)\{%k1\}
 [ 	]*[a-f0-9]+:	62 92 fd 41 c6 4c 39 20 	vgatherpf0dpd 0x100\(%r9,%ymm31,1\)\{%k1\}
@@ -138,6 +136,4 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	62 92 7d 41 c7 b4 fe 85 ff ff ff 	vscatterpf1qps -0x7b\(%r14,%zmm31,8\)\{%k1\}
 [ 	]*[a-f0-9]+:	62 92 7d 41 c7 74 39 40 	vscatterpf1qps 0x100\(%r9,%zmm31,1\)\{%k1\}
 [ 	]*[a-f0-9]+:	62 b2 7d 41 c7 b4 b9 00 04 00 00 	vscatterpf1qps 0x400\(%rcx,%zmm31,4\)\{%k1\}
-[ 	]*[a-f0-9]+:	0f 0d 11             	prefetchwt1 \(%rcx\)
-[ 	]*[a-f0-9]+:	42 0f 0d 94 f0 34 12 00 00 	prefetchwt1 0x1234\(%rax,%r14,8\)
 #pass
diff --git a/gas/testsuite/gas/i386/x86-64-avx512pf.s b/gas/testsuite/gas/i386/x86-64-avx512pf.s
index b2bece4..f2d3b2b 100644
--- a/gas/testsuite/gas/i386/x86-64-avx512pf.s
+++ b/gas/testsuite/gas/i386/x86-64-avx512pf.s
@@ -84,9 +84,6 @@ _start:
 	vscatterpf1qps	256(%r9,%zmm31){%k1}	 # AVX512PF
 	vscatterpf1qps	1024(%rcx,%zmm31,4){%k1}	 # AVX512PF
 
-	prefetchwt1	(%rcx)	 # AVX512PF
-	prefetchwt1	0x123(%rax,%r14,8)	 # AVX512PF
-
 	.intel_syntax noprefix
 	vgatherpf0dpd	ZMMWORD PTR [r14+ymm31*8-123]{k1}	 # AVX512PF
 	vgatherpf0dpd	ZMMWORD PTR [r14+ymm31*8-123]{k1}	 # AVX512PF
@@ -168,6 +165,3 @@ _start:
 	vscatterpf1qps	ZMMWORD PTR [r9+zmm31+256]{k1}	 # AVX512PF
 	vscatterpf1qps	ZMMWORD PTR [rcx+zmm31*4+1024]{k1}	 # AVX512PF
 
-	prefetchwt1	BYTE PTR [rcx]	 # AVX512PF
-	prefetchwt1	BYTE PTR [rax+r14*8+0x1234]	 # AVX512PF
-
diff --git a/gas/testsuite/gas/i386/x86-64-prefetchwt1-intel.d b/gas/testsuite/gas/i386/x86-64-prefetchwt1-intel.d
new file mode 100644
index 0000000..1fbdba4
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-prefetchwt1-intel.d
@@ -0,0 +1,16 @@
+#as:
+#objdump: -dwMintel
+#name: x86_64 PREFETCHWT1 insns (Intel disassembly)
+#source: x86-64-prefetchwt1.s
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:	0f 0d 11             	prefetchwt1 BYTE PTR \[rcx\]
+[ 	]*[a-f0-9]+:	42 0f 0d 94 f0 23 01 00 00 	prefetchwt1 BYTE PTR \[rax\+r14\*8\+0x123\]
+[ 	]*[a-f0-9]+:	0f 0d 11             	prefetchwt1 BYTE PTR \[rcx\]
+[ 	]*[a-f0-9]+:	42 0f 0d 94 f0 34 12 00 00 	prefetchwt1 BYTE PTR \[rax\+r14\*8\+0x1234\]
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-prefetchwt1.d b/gas/testsuite/gas/i386/x86-64-prefetchwt1.d
new file mode 100644
index 0000000..1118f55
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-prefetchwt1.d
@@ -0,0 +1,15 @@
+#as:
+#objdump: -dw
+#name: x86_64 PREFETCHWT1 insns
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:	0f 0d 11             	prefetchwt1 \(%rcx\)
+[ 	]*[a-f0-9]+:	42 0f 0d 94 f0 23 01 00 00 	prefetchwt1 0x123\(%rax,%r14,8\)
+[ 	]*[a-f0-9]+:	0f 0d 11             	prefetchwt1 \(%rcx\)
+[ 	]*[a-f0-9]+:	42 0f 0d 94 f0 34 12 00 00 	prefetchwt1 0x1234\(%rax,%r14,8\)
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-prefetchwt1.s b/gas/testsuite/gas/i386/x86-64-prefetchwt1.s
new file mode 100644
index 0000000..ae63b42
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-prefetchwt1.s
@@ -0,0 +1,13 @@
+# Check 64bit AVX512PF instructions
+
+	.allow_index_reg
+	.text
+_start:
+
+	prefetchwt1	(%rcx)	 # AVX512PF
+	prefetchwt1	0x123(%rax,%r14,8)	 # AVX512PF
+
+	.intel_syntax noprefix
+
+	prefetchwt1	BYTE PTR [rcx]	 # AVX512PF
+	prefetchwt1	BYTE PTR [rax+r14*8+0x1234]	 # AVX512PF