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| author | Nick Clifton <nickc@redhat.com> | 2001-03-06 22:33:47 +0000 |
|---|---|---|
| committer | Nick Clifton <nickc@redhat.com> | 2001-03-06 22:33:47 +0000 |
| commit | 4f3c3dbb370a8c0c8b66710c5d0c2854c1bab4f5 (patch) | |
| tree | 2042b5c453e962b76adfdd2eb4b67bd6899cfb55 /gas | |
| parent | f8f3c6cc3747d01156af27c7cc74a4628755f4d0 (diff) | |
| download | fsf-binutils-gdb-4f3c3dbb370a8c0c8b66710c5d0c2854c1bab4f5.zip fsf-binutils-gdb-4f3c3dbb370a8c0c8b66710c5d0c2854c1bab4f5.tar.gz fsf-binutils-gdb-4f3c3dbb370a8c0c8b66710c5d0c2854c1bab4f5.tar.bz2 | |
Fix BLX(1) for Thumb
Diffstat (limited to 'gas')
| -rw-r--r-- | gas/ChangeLog | 5 | ||||
| -rw-r--r-- | gas/config/tc-arm.c | 9 |
2 files changed, 14 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 503102a..9654744 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,8 @@ +2001-03-06 Nick Clifton <nickc@redhat.com> + + * config/tc-arm.c (md_apply_fix3): Clear bit zero of offset in + BLX(1) instruction. + 2001-03-06 Igor Shevlyakov <igor@windriver.com> * config/tc-m68k.c : Add 5407 to archs[] table. diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c index 514dba7..ebb7b97 100644 --- a/gas/config/tc-arm.c +++ b/gas/config/tc-arm.c @@ -7149,6 +7149,15 @@ md_apply_fix3 (fixP, val, seg) newval = (newval & 0xf800) | ((value & 0x7fffff) >> 12); newval2 = (newval2 & 0xf800) | ((value & 0xfff) >> 1); + if (fixP->fx_r_type == BFD_RELOC_THUMB_PCREL_BLX) + /* Remove bit zero of the adjusted offset. Bit zero can only be + set if the upper insn is at a half-word boundary, since the + destination address, an ARM instruction, must always be on a + word boundary. The semantics of the BLX (1) instruction, however, + are that bit zero in the offset must always be zero, and the + corresponding bit one in the target address will be set from bit + one of the source address. */ + newval2 &= ~1; md_number_to_chars (buf, newval, THUMB_SIZE); md_number_to_chars (buf + THUMB_SIZE, newval2, THUMB_SIZE); } |