diff options
author | Jan Beulich <jbeulich@suse.com> | 2020-03-06 08:53:18 +0100 |
---|---|---|
committer | Jan Beulich <jbeulich@suse.com> | 2020-03-06 08:53:18 +0100 |
commit | 4ed21b58d4b8331806b9e88da18898235942f425 (patch) | |
tree | a2b3fed5c08bba659f20f0a434f517517fd171dc /gas | |
parent | 643bb87079dd96aed99ff1572375a88179afcd15 (diff) | |
download | fsf-binutils-gdb-4ed21b58d4b8331806b9e88da18898235942f425.zip fsf-binutils-gdb-4ed21b58d4b8331806b9e88da18898235942f425.tar.gz fsf-binutils-gdb-4ed21b58d4b8331806b9e88da18898235942f425.tar.bz2 |
x86: replace NoRex64 on VEX-encoded insns
When the template specifies any of the possible VexW settings, we can
use this instead of a separate NoRex64 to suppress the setting of REX_W.
Note that this ends up addressing an inconsistency between VEX- and
EVEX-encoded VEXTRACTPS, VPEXTR{B,W}, and VPINSR{B,W} - while the former
avoided setting VEX.W, the latter pointlessly set EVEX.W when there is a
64-bit GPR operand. Adjust the testcase to cover both cases.
Convert VexW= to their respective VexW* on lines touched anyway.
Diffstat (limited to 'gas')
-rw-r--r-- | gas/ChangeLog | 13 | ||||
-rw-r--r-- | gas/config/tc-i386.c | 1 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/x86-64-avx512bw-intel.d | 24 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/x86-64-avx512bw.d | 24 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/x86-64-avx512bw.s | 24 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/x86-64-avx512f-intel.d | 12 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/x86-64-avx512f.d | 12 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/x86-64-avx512f.s | 4 |
8 files changed, 64 insertions, 50 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index b22ea5c..5ba026e 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,18 @@ 2020-03-06 Jan Beulich <jbeulich@suse.com> + * config/tc-i386.c (process_suffix): Exlucde !vexw insns + alongside !norex64 ones. + * testsuite/gas/i386/x86-64-avx512bw.s: Test VPEXTR* and VPINSR* + with both 32- and 64-bit GPR operands. + * testsuite/gas/i386/x86-64-avx512f.s: Test VEXTRACTPS with both + 32- and 64-bit GPR operands. + * testsuite/gas/i386/x86-64-avx512bw-intel.d, + testsuite/gas/i386/x86-64-avx512bw.d, + testsuite/gas/i386/x86-64-avx512f-intel.d, + testsuite/gas/i386/x86-64-avx512f.d: Adjust expectations. + +2020-03-06 Jan Beulich <jbeulich@suse.com> + * config/tc-i386.c (md_assemble): Drop use of rex64. (process_suffix): For REX.W for 64-bit CRC32. diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 9a26a1d..c5858f4 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -6667,6 +6667,7 @@ process_suffix (void) if (i.suffix == QWORD_MNEM_SUFFIX && flag_code == CODE_64BIT && !i.tm.opcode_modifier.norex64 + && !i.tm.opcode_modifier.vexw /* Special case for xchg %rax,%rax. It is NOP and doesn't need rex64. */ && ! (i.operands == 2 diff --git a/gas/testsuite/gas/i386/x86-64-avx512bw-intel.d b/gas/testsuite/gas/i386/x86-64-avx512bw-intel.d index a589d51..530db0e 100644 --- a/gas/testsuite/gas/i386/x86-64-avx512bw-intel.d +++ b/gas/testsuite/gas/i386/x86-64-avx512bw-intel.d @@ -229,9 +229,9 @@ Disassembly of section \.text: [ ]*[a-f0-9]+:[ ]*62 62 95 40 66 b2 00 20 00 00[ ]*vpblendmw zmm30,zmm29,ZMMWORD PTR \[rdx\+0x2000\] [ ]*[a-f0-9]+:[ ]*62 62 95 40 66 72 80[ ]*vpblendmw zmm30,zmm29,ZMMWORD PTR \[rdx-0x2000\] [ ]*[a-f0-9]+:[ ]*62 62 95 40 66 b2 c0 df ff ff[ ]*vpblendmw zmm30,zmm29,ZMMWORD PTR \[rdx-0x2040\] -[ ]*[a-f0-9]+:[ ]*62 63 fd 08 14 e8 ab[ ]*vpextrb rax,xmm29,0xab -[ ]*[a-f0-9]+:[ ]*62 63 fd 08 14 e8 7b[ ]*vpextrb rax,xmm29,0x7b -[ ]*[a-f0-9]+:[ ]*62 43 fd 08 14 e8 7b[ ]*vpextrb r8,xmm29,0x7b +[ ]*[a-f0-9]+:[ ]*62 63 7d 08 14 e8 ab[ ]*vpextrb eax,xmm29,0xab +[ ]*[a-f0-9]+:[ ]*62 63 7d 08 14 e8 7b[ ]*vpextrb eax,xmm29,0x7b +[ ]*[a-f0-9]+:[ ]*62 43 7d 08 14 e8 7b[ ]*vpextrb r8d,xmm29,0x7b [ ]*[a-f0-9]+:[ ]*62 63 7d 08 14 29 7b[ ]*vpextrb BYTE PTR \[rcx\],xmm29,0x7b [ ]*[a-f0-9]+:[ ]*62 23 7d 08 14 ac f0 23 01 00 00 7b[ ]*vpextrb BYTE PTR \[rax\+r14\*8\+0x123\],xmm29,0x7b [ ]*[a-f0-9]+:[ ]*62 63 7d 08 14 6a 7f 7b[ ]*vpextrb BYTE PTR \[rdx\+0x7f\],xmm29,0x7b @@ -244,9 +244,9 @@ Disassembly of section \.text: [ ]*[a-f0-9]+:[ ]*62 63 7d 08 15 aa 00 01 00 00 7b[ ]*vpextrw WORD PTR \[rdx\+0x100\],xmm29,0x7b [ ]*[a-f0-9]+:[ ]*62 63 7d 08 15 6a 80 7b[ ]*vpextrw WORD PTR \[rdx-0x100\],xmm29,0x7b [ ]*[a-f0-9]+:[ ]*62 63 7d 08 15 aa fe fe ff ff 7b[ ]*vpextrw WORD PTR \[rdx-0x102\],xmm29,0x7b -[ ]*[a-f0-9]+:[ ]*62 91 fd 08 c5 c6 ab[ ]*vpextrw rax,xmm30,0xab -[ ]*[a-f0-9]+:[ ]*62 91 fd 08 c5 c6 7b[ ]*vpextrw rax,xmm30,0x7b -[ ]*[a-f0-9]+:[ ]*62 11 fd 08 c5 c6 7b[ ]*vpextrw r8,xmm30,0x7b +[ ]*[a-f0-9]+:[ ]*62 91 7d 08 c5 c6 ab[ ]*vpextrw eax,xmm30,0xab +[ ]*[a-f0-9]+:[ ]*62 91 7d 08 c5 c6 7b[ ]*vpextrw eax,xmm30,0x7b +[ ]*[a-f0-9]+:[ ]*62 11 7d 08 c5 c6 7b[ ]*vpextrw r8d,xmm30,0x7b [ ]*[a-f0-9]+:[ ]*62 63 15 00 20 f0 ab[ ]*vpinsrb xmm30,xmm29,eax,0xab [ ]*[a-f0-9]+:[ ]*62 63 15 00 20 f0 7b[ ]*vpinsrb xmm30,xmm29,eax,0x7b [ ]*[a-f0-9]+:[ ]*62 63 15 00 20 f5 7b[ ]*vpinsrb xmm30,xmm29,ebp,0x7b @@ -1076,9 +1076,9 @@ Disassembly of section \.text: [ ]*[a-f0-9]+:[ ]*62 62 95 40 66 b2 00 20 00 00[ ]*vpblendmw zmm30,zmm29,ZMMWORD PTR \[rdx\+0x2000\] [ ]*[a-f0-9]+:[ ]*62 62 95 40 66 72 80[ ]*vpblendmw zmm30,zmm29,ZMMWORD PTR \[rdx-0x2000\] [ ]*[a-f0-9]+:[ ]*62 62 95 40 66 b2 c0 df ff ff[ ]*vpblendmw zmm30,zmm29,ZMMWORD PTR \[rdx-0x2040\] -[ ]*[a-f0-9]+:[ ]*62 63 fd 08 14 e8 ab[ ]*vpextrb rax,xmm29,0xab -[ ]*[a-f0-9]+:[ ]*62 63 fd 08 14 e8 7b[ ]*vpextrb rax,xmm29,0x7b -[ ]*[a-f0-9]+:[ ]*62 43 fd 08 14 e8 7b[ ]*vpextrb r8,xmm29,0x7b +[ ]*[a-f0-9]+:[ ]*62 63 7d 08 14 e8 ab[ ]*vpextrb eax,xmm29,0xab +[ ]*[a-f0-9]+:[ ]*62 63 7d 08 14 e8 7b[ ]*vpextrb eax,xmm29,0x7b +[ ]*[a-f0-9]+:[ ]*62 43 7d 08 14 e8 7b[ ]*vpextrb r8d,xmm29,0x7b [ ]*[a-f0-9]+:[ ]*62 63 7d 08 14 29 7b[ ]*vpextrb BYTE PTR \[rcx\],xmm29,0x7b [ ]*[a-f0-9]+:[ ]*62 23 7d 08 14 ac f0 34 12 00 00 7b[ ]*vpextrb BYTE PTR \[rax\+r14\*8\+0x1234\],xmm29,0x7b [ ]*[a-f0-9]+:[ ]*62 63 7d 08 14 6a 7f 7b[ ]*vpextrb BYTE PTR \[rdx\+0x7f\],xmm29,0x7b @@ -1091,9 +1091,9 @@ Disassembly of section \.text: [ ]*[a-f0-9]+:[ ]*62 63 7d 08 15 aa 00 01 00 00 7b[ ]*vpextrw WORD PTR \[rdx\+0x100\],xmm29,0x7b [ ]*[a-f0-9]+:[ ]*62 63 7d 08 15 6a 80 7b[ ]*vpextrw WORD PTR \[rdx-0x100\],xmm29,0x7b [ ]*[a-f0-9]+:[ ]*62 63 7d 08 15 aa fe fe ff ff 7b[ ]*vpextrw WORD PTR \[rdx-0x102\],xmm29,0x7b -[ ]*[a-f0-9]+:[ ]*62 91 fd 08 c5 c6 ab[ ]*vpextrw rax,xmm30,0xab -[ ]*[a-f0-9]+:[ ]*62 91 fd 08 c5 c6 7b[ ]*vpextrw rax,xmm30,0x7b -[ ]*[a-f0-9]+:[ ]*62 11 fd 08 c5 c6 7b[ ]*vpextrw r8,xmm30,0x7b +[ ]*[a-f0-9]+:[ ]*62 91 7d 08 c5 c6 ab[ ]*vpextrw eax,xmm30,0xab +[ ]*[a-f0-9]+:[ ]*62 91 7d 08 c5 c6 7b[ ]*vpextrw eax,xmm30,0x7b +[ ]*[a-f0-9]+:[ ]*62 11 7d 08 c5 c6 7b[ ]*vpextrw r8d,xmm30,0x7b [ ]*[a-f0-9]+:[ ]*62 63 15 00 20 f0 ab[ ]*vpinsrb xmm30,xmm29,eax,0xab [ ]*[a-f0-9]+:[ ]*62 63 15 00 20 f0 7b[ ]*vpinsrb xmm30,xmm29,eax,0x7b [ ]*[a-f0-9]+:[ ]*62 63 15 00 20 f5 7b[ ]*vpinsrb xmm30,xmm29,ebp,0x7b diff --git a/gas/testsuite/gas/i386/x86-64-avx512bw.d b/gas/testsuite/gas/i386/x86-64-avx512bw.d index bef54f7..ee3385a 100644 --- a/gas/testsuite/gas/i386/x86-64-avx512bw.d +++ b/gas/testsuite/gas/i386/x86-64-avx512bw.d @@ -229,9 +229,9 @@ Disassembly of section \.text: [ ]*[a-f0-9]+:[ ]*62 62 95 40 66 b2 00 20 00 00[ ]*vpblendmw 0x2000\(%rdx\),%zmm29,%zmm30 [ ]*[a-f0-9]+:[ ]*62 62 95 40 66 72 80[ ]*vpblendmw -0x2000\(%rdx\),%zmm29,%zmm30 [ ]*[a-f0-9]+:[ ]*62 62 95 40 66 b2 c0 df ff ff[ ]*vpblendmw -0x2040\(%rdx\),%zmm29,%zmm30 -[ ]*[a-f0-9]+:[ ]*62 63 fd 08 14 e8 ab[ ]*vpextrb \$0xab,%xmm29,%rax -[ ]*[a-f0-9]+:[ ]*62 63 fd 08 14 e8 7b[ ]*vpextrb \$0x7b,%xmm29,%rax -[ ]*[a-f0-9]+:[ ]*62 43 fd 08 14 e8 7b[ ]*vpextrb \$0x7b,%xmm29,%r8 +[ ]*[a-f0-9]+:[ ]*62 63 7d 08 14 e8 ab[ ]*vpextrb \$0xab,%xmm29,%eax +[ ]*[a-f0-9]+:[ ]*62 63 7d 08 14 e8 7b[ ]*vpextrb \$0x7b,%xmm29,%eax +[ ]*[a-f0-9]+:[ ]*62 43 7d 08 14 e8 7b[ ]*vpextrb \$0x7b,%xmm29,%r8d [ ]*[a-f0-9]+:[ ]*62 63 7d 08 14 29 7b[ ]*vpextrb \$0x7b,%xmm29,\(%rcx\) [ ]*[a-f0-9]+:[ ]*62 23 7d 08 14 ac f0 23 01 00 00 7b[ ]*vpextrb \$0x7b,%xmm29,0x123\(%rax,%r14,8\) [ ]*[a-f0-9]+:[ ]*62 63 7d 08 14 6a 7f 7b[ ]*vpextrb \$0x7b,%xmm29,0x7f\(%rdx\) @@ -244,9 +244,9 @@ Disassembly of section \.text: [ ]*[a-f0-9]+:[ ]*62 63 7d 08 15 aa 00 01 00 00 7b[ ]*vpextrw \$0x7b,%xmm29,0x100\(%rdx\) [ ]*[a-f0-9]+:[ ]*62 63 7d 08 15 6a 80 7b[ ]*vpextrw \$0x7b,%xmm29,-0x100\(%rdx\) [ ]*[a-f0-9]+:[ ]*62 63 7d 08 15 aa fe fe ff ff 7b[ ]*vpextrw \$0x7b,%xmm29,-0x102\(%rdx\) -[ ]*[a-f0-9]+:[ ]*62 91 fd 08 c5 c6 ab[ ]*vpextrw \$0xab,%xmm30,%rax -[ ]*[a-f0-9]+:[ ]*62 91 fd 08 c5 c6 7b[ ]*vpextrw \$0x7b,%xmm30,%rax -[ ]*[a-f0-9]+:[ ]*62 11 fd 08 c5 c6 7b[ ]*vpextrw \$0x7b,%xmm30,%r8 +[ ]*[a-f0-9]+:[ ]*62 91 7d 08 c5 c6 ab[ ]*vpextrw \$0xab,%xmm30,%eax +[ ]*[a-f0-9]+:[ ]*62 91 7d 08 c5 c6 7b[ ]*vpextrw \$0x7b,%xmm30,%eax +[ ]*[a-f0-9]+:[ ]*62 11 7d 08 c5 c6 7b[ ]*vpextrw \$0x7b,%xmm30,%r8d [ ]*[a-f0-9]+:[ ]*62 63 15 00 20 f0 ab[ ]*vpinsrb \$0xab,%eax,%xmm29,%xmm30 [ ]*[a-f0-9]+:[ ]*62 63 15 00 20 f0 7b[ ]*vpinsrb \$0x7b,%eax,%xmm29,%xmm30 [ ]*[a-f0-9]+:[ ]*62 63 15 00 20 f5 7b[ ]*vpinsrb \$0x7b,%ebp,%xmm29,%xmm30 @@ -1076,9 +1076,9 @@ Disassembly of section \.text: [ ]*[a-f0-9]+:[ ]*62 62 95 40 66 b2 00 20 00 00[ ]*vpblendmw 0x2000\(%rdx\),%zmm29,%zmm30 [ ]*[a-f0-9]+:[ ]*62 62 95 40 66 72 80[ ]*vpblendmw -0x2000\(%rdx\),%zmm29,%zmm30 [ ]*[a-f0-9]+:[ ]*62 62 95 40 66 b2 c0 df ff ff[ ]*vpblendmw -0x2040\(%rdx\),%zmm29,%zmm30 -[ ]*[a-f0-9]+:[ ]*62 63 fd 08 14 e8 ab[ ]*vpextrb \$0xab,%xmm29,%rax -[ ]*[a-f0-9]+:[ ]*62 63 fd 08 14 e8 7b[ ]*vpextrb \$0x7b,%xmm29,%rax -[ ]*[a-f0-9]+:[ ]*62 43 fd 08 14 e8 7b[ ]*vpextrb \$0x7b,%xmm29,%r8 +[ ]*[a-f0-9]+:[ ]*62 63 7d 08 14 e8 ab[ ]*vpextrb \$0xab,%xmm29,%eax +[ ]*[a-f0-9]+:[ ]*62 63 7d 08 14 e8 7b[ ]*vpextrb \$0x7b,%xmm29,%eax +[ ]*[a-f0-9]+:[ ]*62 43 7d 08 14 e8 7b[ ]*vpextrb \$0x7b,%xmm29,%r8d [ ]*[a-f0-9]+:[ ]*62 63 7d 08 14 29 7b[ ]*vpextrb \$0x7b,%xmm29,\(%rcx\) [ ]*[a-f0-9]+:[ ]*62 23 7d 08 14 ac f0 34 12 00 00 7b[ ]*vpextrb \$0x7b,%xmm29,0x1234\(%rax,%r14,8\) [ ]*[a-f0-9]+:[ ]*62 63 7d 08 14 6a 7f 7b[ ]*vpextrb \$0x7b,%xmm29,0x7f\(%rdx\) @@ -1091,9 +1091,9 @@ Disassembly of section \.text: [ ]*[a-f0-9]+:[ ]*62 63 7d 08 15 aa 00 01 00 00 7b[ ]*vpextrw \$0x7b,%xmm29,0x100\(%rdx\) [ ]*[a-f0-9]+:[ ]*62 63 7d 08 15 6a 80 7b[ ]*vpextrw \$0x7b,%xmm29,-0x100\(%rdx\) [ ]*[a-f0-9]+:[ ]*62 63 7d 08 15 aa fe fe ff ff 7b[ ]*vpextrw \$0x7b,%xmm29,-0x102\(%rdx\) -[ ]*[a-f0-9]+:[ ]*62 91 fd 08 c5 c6 ab[ ]*vpextrw \$0xab,%xmm30,%rax -[ ]*[a-f0-9]+:[ ]*62 91 fd 08 c5 c6 7b[ ]*vpextrw \$0x7b,%xmm30,%rax -[ ]*[a-f0-9]+:[ ]*62 11 fd 08 c5 c6 7b[ ]*vpextrw \$0x7b,%xmm30,%r8 +[ ]*[a-f0-9]+:[ ]*62 91 7d 08 c5 c6 ab[ ]*vpextrw \$0xab,%xmm30,%eax +[ ]*[a-f0-9]+:[ ]*62 91 7d 08 c5 c6 7b[ ]*vpextrw \$0x7b,%xmm30,%eax +[ ]*[a-f0-9]+:[ ]*62 11 7d 08 c5 c6 7b[ ]*vpextrw \$0x7b,%xmm30,%r8d [ ]*[a-f0-9]+:[ ]*62 63 15 00 20 f0 ab[ ]*vpinsrb \$0xab,%eax,%xmm29,%xmm30 [ ]*[a-f0-9]+:[ ]*62 63 15 00 20 f0 7b[ ]*vpinsrb \$0x7b,%eax,%xmm29,%xmm30 [ ]*[a-f0-9]+:[ ]*62 63 15 00 20 f5 7b[ ]*vpinsrb \$0x7b,%ebp,%xmm29,%xmm30 diff --git a/gas/testsuite/gas/i386/x86-64-avx512bw.s b/gas/testsuite/gas/i386/x86-64-avx512bw.s index 5875230..d04ddfb 100644 --- a/gas/testsuite/gas/i386/x86-64-avx512bw.s +++ b/gas/testsuite/gas/i386/x86-64-avx512bw.s @@ -223,7 +223,7 @@ _start: vpblendmw 8192(%rdx), %zmm29, %zmm30 # AVX512BW vpblendmw -8192(%rdx), %zmm29, %zmm30 # AVX512BW Disp8 vpblendmw -8256(%rdx), %zmm29, %zmm30 # AVX512BW - vpextrb $0xab, %xmm29, %rax # AVX512BW + vpextrb $0xab, %xmm29, %eax # AVX512BW vpextrb $123, %xmm29, %rax # AVX512BW vpextrb $123, %xmm29, %r8 # AVX512BW vpextrb $123, %xmm29, (%rcx) # AVX512BW @@ -238,13 +238,13 @@ _start: vpextrw $123, %xmm29, 256(%rdx) # AVX512BW vpextrw $123, %xmm29, -256(%rdx) # AVX512BW Disp8 vpextrw $123, %xmm29, -258(%rdx) # AVX512BW - vpextrw $0xab, %xmm30, %rax # AVX512BW + vpextrw $0xab, %xmm30, %eax # AVX512BW vpextrw $123, %xmm30, %rax # AVX512BW vpextrw $123, %xmm30, %r8 # AVX512BW vpinsrb $0xab, %eax, %xmm29, %xmm30 # AVX512BW - vpinsrb $123, %eax, %xmm29, %xmm30 # AVX512BW + vpinsrb $123, %rax, %xmm29, %xmm30 # AVX512BW vpinsrb $123, %ebp, %xmm29, %xmm30 # AVX512BW - vpinsrb $123, %r13d, %xmm29, %xmm30 # AVX512BW + vpinsrb $123, %r13, %xmm29, %xmm30 # AVX512BW vpinsrb $123, (%rcx), %xmm29, %xmm30 # AVX512BW vpinsrb $123, 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512BW vpinsrb $123, 127(%rdx), %xmm29, %xmm30 # AVX512BW Disp8 @@ -252,9 +252,9 @@ _start: vpinsrb $123, -128(%rdx), %xmm29, %xmm30 # AVX512BW Disp8 vpinsrb $123, -129(%rdx), %xmm29, %xmm30 # AVX512BW vpinsrw $0xab, %eax, %xmm29, %xmm30 # AVX512BW - vpinsrw $123, %eax, %xmm29, %xmm30 # AVX512BW + vpinsrw $123, %rax, %xmm29, %xmm30 # AVX512BW vpinsrw $123, %ebp, %xmm29, %xmm30 # AVX512BW - vpinsrw $123, %r13d, %xmm29, %xmm30 # AVX512BW + vpinsrw $123, %r13, %xmm29, %xmm30 # AVX512BW vpinsrw $123, (%rcx), %xmm29, %xmm30 # AVX512BW vpinsrw $123, 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512BW vpinsrw $123, 254(%rdx), %xmm29, %xmm30 # AVX512BW Disp8 @@ -1072,7 +1072,7 @@ _start: vpblendmw zmm30, zmm29, ZMMWORD PTR [rdx+8192] # AVX512BW vpblendmw zmm30, zmm29, ZMMWORD PTR [rdx-8192] # AVX512BW Disp8 vpblendmw zmm30, zmm29, ZMMWORD PTR [rdx-8256] # AVX512BW - vpextrb rax, xmm29, 0xab # AVX512BW + vpextrb eax, xmm29, 0xab # AVX512BW vpextrb rax, xmm29, 123 # AVX512BW vpextrb r8, xmm29, 123 # AVX512BW vpextrb BYTE PTR [rcx], xmm29, 123 # AVX512BW @@ -1087,13 +1087,13 @@ _start: vpextrw WORD PTR [rdx+256], xmm29, 123 # AVX512BW vpextrw WORD PTR [rdx-256], xmm29, 123 # AVX512BW Disp8 vpextrw WORD PTR [rdx-258], xmm29, 123 # AVX512BW - vpextrw rax, xmm30, 0xab # AVX512BW + vpextrw eax, xmm30, 0xab # AVX512BW vpextrw rax, xmm30, 123 # AVX512BW vpextrw r8, xmm30, 123 # AVX512BW vpinsrb xmm30, xmm29, eax, 0xab # AVX512BW - vpinsrb xmm30, xmm29, eax, 123 # AVX512BW + vpinsrb xmm30, xmm29, rax, 123 # AVX512BW vpinsrb xmm30, xmm29, ebp, 123 # AVX512BW - vpinsrb xmm30, xmm29, r13d, 123 # AVX512BW + vpinsrb xmm30, xmm29, r13, 123 # AVX512BW vpinsrb xmm30, xmm29, BYTE PTR [rcx], 123 # AVX512BW vpinsrb xmm30, xmm29, BYTE PTR [rax+r14*8+0x1234], 123 # AVX512BW vpinsrb xmm30, xmm29, BYTE PTR [rdx+127], 123 # AVX512BW Disp8 @@ -1101,9 +1101,9 @@ _start: vpinsrb xmm30, xmm29, BYTE PTR [rdx-128], 123 # AVX512BW Disp8 vpinsrb xmm30, xmm29, BYTE PTR [rdx-129], 123 # AVX512BW vpinsrw xmm30, xmm29, eax, 0xab # AVX512BW - vpinsrw xmm30, xmm29, eax, 123 # AVX512BW + vpinsrw xmm30, xmm29, rax, 123 # AVX512BW vpinsrw xmm30, xmm29, ebp, 123 # AVX512BW - vpinsrw xmm30, xmm29, r13d, 123 # AVX512BW + vpinsrw xmm30, xmm29, r13, 123 # AVX512BW vpinsrw xmm30, xmm29, WORD PTR [rcx], 123 # AVX512BW vpinsrw xmm30, xmm29, WORD PTR [rax+r14*8+0x1234], 123 # AVX512BW vpinsrw xmm30, xmm29, WORD PTR [rdx+254], 123 # AVX512BW Disp8 diff --git a/gas/testsuite/gas/i386/x86-64-avx512f-intel.d b/gas/testsuite/gas/i386/x86-64-avx512f-intel.d index ff2a3d1..867be88 100644 --- a/gas/testsuite/gas/i386/x86-64-avx512f-intel.d +++ b/gas/testsuite/gas/i386/x86-64-avx512f-intel.d @@ -2709,9 +2709,9 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 62 03 fd 4f 3b ee ab vextracti64x4 ymm30\{k7\},zmm29,0xab [ ]*[a-f0-9]+: 62 03 fd cf 3b ee ab vextracti64x4 ymm30\{k7\}\{z\},zmm29,0xab [ ]*[a-f0-9]+: 62 03 fd 4f 3b ee 7b vextracti64x4 ymm30\{k7\},zmm29,0x7b -[ ]*[a-f0-9]+: 62 63 fd 08 17 e8 ab vextractps rax,xmm29,0xab -[ ]*[a-f0-9]+: 62 63 fd 08 17 e8 7b vextractps rax,xmm29,0x7b -[ ]*[a-f0-9]+: 62 43 fd 08 17 e8 7b vextractps r8,xmm29,0x7b +[ ]*[a-f0-9]+: 62 63 7d 08 17 e8 ab vextractps eax,xmm29,0xab +[ ]*[a-f0-9]+: 62 63 7d 08 17 e8 7b vextractps eax,xmm29,0x7b +[ ]*[a-f0-9]+: 62 43 7d 08 17 e8 7b vextractps r8d,xmm29,0x7b [ ]*[a-f0-9]+: 62 63 7d 08 17 29 7b vextractps DWORD PTR \[rcx\],xmm29,0x7b [ ]*[a-f0-9]+: 62 23 7d 08 17 ac f0 23 01 00 00 7b vextractps DWORD PTR \[rax\+r14\*8\+0x123\],xmm29,0x7b [ ]*[a-f0-9]+: 62 63 7d 08 17 6a 7f 7b vextractps DWORD PTR \[rdx\+0x1fc\],xmm29,0x7b @@ -9730,9 +9730,9 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 62 03 fd 4f 3b ee ab vextracti64x4 ymm30\{k7\},zmm29,0xab [ ]*[a-f0-9]+: 62 03 fd cf 3b ee ab vextracti64x4 ymm30\{k7\}\{z\},zmm29,0xab [ ]*[a-f0-9]+: 62 03 fd 4f 3b ee 7b vextracti64x4 ymm30\{k7\},zmm29,0x7b -[ ]*[a-f0-9]+: 62 63 fd 08 17 e8 ab vextractps rax,xmm29,0xab -[ ]*[a-f0-9]+: 62 63 fd 08 17 e8 7b vextractps rax,xmm29,0x7b -[ ]*[a-f0-9]+: 62 43 fd 08 17 e8 7b vextractps r8,xmm29,0x7b +[ ]*[a-f0-9]+: 62 63 7d 08 17 e8 ab vextractps eax,xmm29,0xab +[ ]*[a-f0-9]+: 62 63 7d 08 17 e8 7b vextractps eax,xmm29,0x7b +[ ]*[a-f0-9]+: 62 43 7d 08 17 e8 7b vextractps r8d,xmm29,0x7b [ ]*[a-f0-9]+: 62 63 7d 08 17 29 7b vextractps DWORD PTR \[rcx\],xmm29,0x7b [ ]*[a-f0-9]+: 62 23 7d 08 17 ac f0 34 12 00 00 7b vextractps DWORD PTR \[rax\+r14\*8\+0x1234\],xmm29,0x7b [ ]*[a-f0-9]+: 62 63 7d 08 17 6a 7f 7b vextractps DWORD PTR \[rdx\+0x1fc\],xmm29,0x7b diff --git a/gas/testsuite/gas/i386/x86-64-avx512f.d b/gas/testsuite/gas/i386/x86-64-avx512f.d index 652bfc6..9ca2c1e 100644 --- a/gas/testsuite/gas/i386/x86-64-avx512f.d +++ b/gas/testsuite/gas/i386/x86-64-avx512f.d @@ -2708,9 +2708,9 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 62 03 fd 4f 3b ee ab vextracti64x4 \$0xab,%zmm29,%ymm30\{%k7\} [ ]*[a-f0-9]+: 62 03 fd cf 3b ee ab vextracti64x4 \$0xab,%zmm29,%ymm30\{%k7\}\{z\} [ ]*[a-f0-9]+: 62 03 fd 4f 3b ee 7b vextracti64x4 \$0x7b,%zmm29,%ymm30\{%k7\} -[ ]*[a-f0-9]+: 62 63 fd 08 17 e8 ab vextractps \$0xab,%xmm29,%rax -[ ]*[a-f0-9]+: 62 63 fd 08 17 e8 7b vextractps \$0x7b,%xmm29,%rax -[ ]*[a-f0-9]+: 62 43 fd 08 17 e8 7b vextractps \$0x7b,%xmm29,%r8 +[ ]*[a-f0-9]+: 62 63 7d 08 17 e8 ab vextractps \$0xab,%xmm29,%eax +[ ]*[a-f0-9]+: 62 63 7d 08 17 e8 7b vextractps \$0x7b,%xmm29,%eax +[ ]*[a-f0-9]+: 62 43 7d 08 17 e8 7b vextractps \$0x7b,%xmm29,%r8d [ ]*[a-f0-9]+: 62 63 7d 08 17 29 7b vextractps \$0x7b,%xmm29,\(%rcx\) [ ]*[a-f0-9]+: 62 23 7d 08 17 ac f0 23 01 00 00 7b vextractps \$0x7b,%xmm29,0x123\(%rax,%r14,8\) [ ]*[a-f0-9]+: 62 63 7d 08 17 6a 7f 7b vextractps \$0x7b,%xmm29,0x1fc\(%rdx\) @@ -9729,9 +9729,9 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 62 03 fd 4f 3b ee ab vextracti64x4 \$0xab,%zmm29,%ymm30\{%k7\} [ ]*[a-f0-9]+: 62 03 fd cf 3b ee ab vextracti64x4 \$0xab,%zmm29,%ymm30\{%k7\}\{z\} [ ]*[a-f0-9]+: 62 03 fd 4f 3b ee 7b vextracti64x4 \$0x7b,%zmm29,%ymm30\{%k7\} -[ ]*[a-f0-9]+: 62 63 fd 08 17 e8 ab vextractps \$0xab,%xmm29,%rax -[ ]*[a-f0-9]+: 62 63 fd 08 17 e8 7b vextractps \$0x7b,%xmm29,%rax -[ ]*[a-f0-9]+: 62 43 fd 08 17 e8 7b vextractps \$0x7b,%xmm29,%r8 +[ ]*[a-f0-9]+: 62 63 7d 08 17 e8 ab vextractps \$0xab,%xmm29,%eax +[ ]*[a-f0-9]+: 62 63 7d 08 17 e8 7b vextractps \$0x7b,%xmm29,%eax +[ ]*[a-f0-9]+: 62 43 7d 08 17 e8 7b vextractps \$0x7b,%xmm29,%r8d [ ]*[a-f0-9]+: 62 63 7d 08 17 29 7b vextractps \$0x7b,%xmm29,\(%rcx\) [ ]*[a-f0-9]+: 62 23 7d 08 17 ac f0 34 12 00 00 7b vextractps \$0x7b,%xmm29,0x1234\(%rax,%r14,8\) [ ]*[a-f0-9]+: 62 63 7d 08 17 6a 7f 7b vextractps \$0x7b,%xmm29,0x1fc\(%rdx\) diff --git a/gas/testsuite/gas/i386/x86-64-avx512f.s b/gas/testsuite/gas/i386/x86-64-avx512f.s index 31a0090..f259525 100644 --- a/gas/testsuite/gas/i386/x86-64-avx512f.s +++ b/gas/testsuite/gas/i386/x86-64-avx512f.s @@ -2953,7 +2953,7 @@ _start: vextracti64x4 $0xab, %zmm29, %ymm30{%k7}{z} # AVX512F vextracti64x4 $123, %zmm29, %ymm30{%k7} # AVX512F - vextractps $0xab, %xmm29, %rax # AVX512F + vextractps $0xab, %xmm29, %eax # AVX512F vextractps $123, %xmm29, %rax # AVX512F vextractps $123, %xmm29, %r8 # AVX512F vextractps $123, %xmm29, (%rcx) # AVX512F @@ -10611,7 +10611,7 @@ _start: vextracti64x4 ymm30{k7}{z}, zmm29, 0xab # AVX512F vextracti64x4 ymm30{k7}, zmm29, 123 # AVX512F - vextractps rax, xmm29, 0xab # AVX512F + vextractps eax, xmm29, 0xab # AVX512F vextractps rax, xmm29, 123 # AVX512F vextractps r8, xmm29, 123 # AVX512F vextractps DWORD PTR [rcx], xmm29, 123 # AVX512F |