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authorHau Hsu <hau.hsu@sifive.com>2024-08-06 11:56:18 +0800
committerNelson Chu <nelson@rivosinc.com>2024-08-06 16:07:27 +0800
commit87e720ad359ece678b37b036a61e0adcc60304f4 (patch)
tree4183cbd474f45cb16b1e88a01e0512bf30d5f36f /gas/testsuite
parent2f1739a348c59e8b095805d3eb6200ffd04be1dc (diff)
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RISC-V: map zext.h to pack/packw if Zbkb is enabled
The `zext.h` is zero-extend halfword instruction that belongs to Zbb. Currently `zext.h` falls back to 2 shifts if Zbb is not enabled. However, the encoding and operation is a special case of `pack/packw rd, rs1, rs2`, which belongs to Zbkb. The instructions pack the low halves of rs1 and rs2 into rd. When rs2 is zero (x0), they behave like zero-extend instruction, and the encoding are exactly the same as zext.h. Thus we can map `zext.h` to `pack` or `packw` (rv64) if Zbkb is enabled, instead of 2 shifts. This reduces one instruction. This patch does this by making `zext.h` also available for Zbkb. opcodes/ * riscv-opc.c (riscv_opcodes): Update `zext.h` entries to use `ZBB_OR_ZBKB` instruction class. gas/ * testsuite/gas/riscv/zext-to-pack.s: Add test for mapping zext to pack/packw encoding. * testsuite/gas/riscv/zext-to-pack-encoding.d: Likewise. * testsuite/gas/riscv/zext-to-packw-encoding.d: Likewise.
Diffstat (limited to 'gas/testsuite')
-rw-r--r--gas/testsuite/gas/riscv/zext-to-pack-encoding.d11
-rw-r--r--gas/testsuite/gas/riscv/zext-to-pack.s2
-rw-r--r--gas/testsuite/gas/riscv/zext-to-packw-encoding.d11
3 files changed, 24 insertions, 0 deletions
diff --git a/gas/testsuite/gas/riscv/zext-to-pack-encoding.d b/gas/testsuite/gas/riscv/zext-to-pack-encoding.d
new file mode 100644
index 0000000..86fcbce
--- /dev/null
+++ b/gas/testsuite/gas/riscv/zext-to-pack-encoding.d
@@ -0,0 +1,11 @@
+#as: -march=rv32i_zbkb
+#source: zext-to-pack.s
+#objdump: -d
+
+.*:[ ]+file format .*
+
+
+Disassembly of section .text:
+
+0+000 <target>:
+[ ]+[0-9a-f]+:[ ]+08054533[ ]+zext.h[ ]+a0,a0
diff --git a/gas/testsuite/gas/riscv/zext-to-pack.s b/gas/testsuite/gas/riscv/zext-to-pack.s
new file mode 100644
index 0000000..bb2be3d
--- /dev/null
+++ b/gas/testsuite/gas/riscv/zext-to-pack.s
@@ -0,0 +1,2 @@
+target:
+ zext.h a0, a0
diff --git a/gas/testsuite/gas/riscv/zext-to-packw-encoding.d b/gas/testsuite/gas/riscv/zext-to-packw-encoding.d
new file mode 100644
index 0000000..04e21e7
--- /dev/null
+++ b/gas/testsuite/gas/riscv/zext-to-packw-encoding.d
@@ -0,0 +1,11 @@
+#as: -march=rv64i_zbkb
+#source: zext-to-pack.s
+#objdump: -d
+
+.*:[ ]+file format .*
+
+
+Disassembly of section .text:
+
+0+000 <target>:
+[ ]+[0-9a-f]+:[ ]+0805453b[ ]+zext.h[ ]+a0,a0