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author | Mickael Guene <mickael.guene@st.com> | 2015-12-16 10:09:05 +0100 |
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committer | Christophe Lyon <christophe.lyon@linaro.org> | 2015-12-16 10:19:51 +0100 |
commit | 72d98d16ed09584660d0cbb759d90f8dfeef2343 (patch) | |
tree | 6a1f1e78ca24f2306e718025bf4d90d891956880 /gas/doc | |
parent | 9c35a5290213e9a28e6cc691e1cc7ba5055653f7 (diff) | |
download | fsf-binutils-gdb-72d98d16ed09584660d0cbb759d90f8dfeef2343.zip fsf-binutils-gdb-72d98d16ed09584660d0cbb759d90f8dfeef2343.tar.gz fsf-binutils-gdb-72d98d16ed09584660d0cbb759d90f8dfeef2343.tar.bz2 |
[ARM] Add support for thumb1 pcrop relocations.
To support thumb1 execute-only code we need to support four new
relocations (R_ARM_THM_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G1_NC,
R_ARM_THM_ALU_ABS_G2_NC and R_ARM_THM_ALU_ABS_G3_NC).
These relocations allow the static linker to finalize construction
of symbol address.
Typical sequence of code to get address of the symbol foo is then
the following :
movs r3, #:upper8_15:#foo
lsls r3, #8
adds r3, #:upper0_7:#foo
lsls r3, #8
adds r3, #:lower8_15:#foo
lsls r3, #8
adds r3, #:lower0_7:#foo
This will give following sequence of text and relocations after
assembly :
4: 2300 movs r3, #0
4: R_ARM_THM_ALU_ABS_G3_NC foo
6: 021b lsls r3, r3, #8
8: 3300 adds r3, #0
8: R_ARM_THM_ALU_ABS_G2_NC foo
a: 021b lsls r3, r3, #8
c: 3300 adds r3, #0
c: R_ARM_THM_ALU_ABS_G1_NC foo
e: 021b lsls r3, r3, #8
10: 3300 adds r3, #0
10: R_ARM_THM_ALU_ABS_G0_NC foo
Diffstat (limited to 'gas/doc')
-rw-r--r-- | gas/doc/c-arm.texi | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/gas/doc/c-arm.texi b/gas/doc/c-arm.texi index ee26e6d..091fc93 100644 --- a/gas/doc/c-arm.texi +++ b/gas/doc/c-arm.texi @@ -537,6 +537,22 @@ respectively. For example to load the 32-bit address of foo into r0: MOVT r0, #:upper16:foo @end smallexample +Relocations @samp{R_ARM_THM_ALU_ABS_G0_NC}, @samp{R_ARM_THM_ALU_ABS_G1_NC}, +@samp{R_ARM_THM_ALU_ABS_G2_NC} and @samp{R_ARM_THM_ALU_ABS_G3_NC} can be +generated by prefixing the value with @samp{#:lower0_7:#}, +@samp{#:lower8_15:#}, @samp{#:upper0_7:#} and @samp{#:upper8_15:#} +respectively. For example to load the 32-bit address of foo into r0: + +@smallexample + MOVS r0, #:upper8_15:#foo + LSLS r0, r0, #8 + ADDS r0, #:upper0_7:#foo + LSLS r0, r0, #8 + ADDS r0, #:lower8_15:#foo + LSLS r0, r0, #8 + ADDS r0, #:lower0_7:#foo +@end smallexample + @node ARM-Neon-Alignment @subsection NEON Alignment Specifiers |