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| author | Philipp Tomsich <philipp.tomsich@theobroma-systems.com> | 2015-01-09 20:00:14 +0000 |
|---|---|---|
| committer | Nick Clifton <nickc@redhat.com> | 2015-01-09 20:00:14 +0000 |
| commit | ea0d6bb94c47283ce54ad62485997e2aef296d43 (patch) | |
| tree | 4eb2804212de2f2a2a81165d6c95a80ee1adb45c /gas/doc | |
| parent | 588dcc3edbde19f90e76de969dbfa7ab3e17951a (diff) | |
| download | fsf-binutils-gdb-ea0d6bb94c47283ce54ad62485997e2aef296d43.zip fsf-binutils-gdb-ea0d6bb94c47283ce54ad62485997e2aef296d43.tar.gz fsf-binutils-gdb-ea0d6bb94c47283ce54ad62485997e2aef296d43.tar.bz2 | |
This patch adds the necessary support to the assembler to allow wiring
the X-Gene scheduling description up in the respective GCC backend.
* config/tc-arm.c (arm_cpus): Add support for APM X-Gene 1 and
X-Gene 2.
* doc/c-arm.texi (ARM Options): Mention xgene1 and xgene2.
Diffstat (limited to 'gas/doc')
| -rw-r--r-- | gas/doc/c-arm.texi | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/gas/doc/c-arm.texi b/gas/doc/c-arm.texi index 16ba4f9..8252487 100644 --- a/gas/doc/c-arm.texi +++ b/gas/doc/c-arm.texi @@ -129,6 +129,10 @@ recognized: @code{cortex-m1}, @code{cortex-m0}, @code{cortex-m0plus}, +@code{marvell-pj4}, +@code{marvell-whitney}, +@code{xgene1}, +@code{xgene2}, @code{ep9312} (ARM920 with Cirrus Maverick coprocessor), @code{i80200} (Intel XScale processor) @code{iwmmxt} (Intel(r) XScale processor with Wireless MMX(tm) technology coprocessor) @@ -156,13 +160,16 @@ been added, again in ascending alphabetical order. For example, The following extensions are currently supported: +@code{crc} @code{crypto} (Cryptography Extensions for v8-A architecture, implies @code{fp+simd}), @code{fp} (Floating Point Extensions for v8-A architecture), @code{idiv} (Integer Divide Extensions for v7-A and v7-R architectures), @code{iwmmxt}, @code{iwmmxt2}, +@code{xscale}, @code{maverick}, -@code{mp} (Multiprocessing Extensions for v7-A and v7-R architectures), +@code{mp} (Multiprocessing Extensions for v7-A and v7-R +architectures), @code{os} (Operating System for v6M architecture), @code{sec} (Security Extensions for v6K and v7-A architectures), @code{simd} (Advanced SIMD Extensions for v8-A architecture, implies @code{fp}), @@ -207,6 +214,7 @@ names are recognized: @code{armv7e-m}, @code{armv8-a}, @code{iwmmxt} +@code{iwmmxt2} and @code{xscale}. If both @code{-mcpu} and |