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author | Victor Do Nascimento <victor.donascimento@arm.com> | 2023-11-15 12:21:33 +0000 |
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committer | Victor Do Nascimento <victor.donascimento@arm.com> | 2024-01-09 10:16:40 +0000 |
commit | 7b08cc32165912395838e7bb995d880f623fe636 (patch) | |
tree | 0735bac1c022cf88e22f863c109f81760d71d5c6 /gas/doc/c-aarch64.texi | |
parent | 435ad222b3de93fa647fba7221eece36b1b395eb (diff) | |
download | fsf-binutils-gdb-7b08cc32165912395838e7bb995d880f623fe636.zip fsf-binutils-gdb-7b08cc32165912395838e7bb995d880f623fe636.tar.gz fsf-binutils-gdb-7b08cc32165912395838e7bb995d880f623fe636.tar.bz2 |
aarch64: Add +d128 architectural feature support
Indicating the presence of the Armv9.4-a features concerning 128-bit
Page Table Descriptors, 128-bit System Registers and Instructions,
the "+d128" architectural extension flag is added to the list of
possible -march options in Binutils, together with the necessary macro
for encoding d128 instructions.
Diffstat (limited to 'gas/doc/c-aarch64.texi')
-rw-r--r-- | gas/doc/c-aarch64.texi | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi index 97233b5..ccf18ee 100644 --- a/gas/doc/c-aarch64.texi +++ b/gas/doc/c-aarch64.texi @@ -274,6 +274,8 @@ automatically cause those extensions to be disabled. @tab Enable Prediction instructions. @item @code{ite} @tab N/A @tab no @tab Enable TRCIT instruction. +@item @code{d128} @tab Armv9.4-A @tab No + @tab Enable the 128-bit Page Descriptor Extension. This implies @code{lse128}. @end multitable @node AArch64 Syntax |