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| author | saurabh.jha@arm.com <saurabh.jha@arm.com> | 2024-05-28 15:45:52 +0100 |
|---|---|---|
| committer | Richard Earnshaw <rearnsha@arm.com> | 2024-05-28 17:28:29 +0100 |
| commit | 444c60fe33717b6aa5c1f257babfca4c789d07ac (patch) | |
| tree | 74910fef141721c7aead54edb8310991ef3614ad /gas/config | |
| parent | c3bb4211d972e681eadbdb8d800530323d98060f (diff) | |
| download | fsf-binutils-gdb-444c60fe33717b6aa5c1f257babfca4c789d07ac.zip fsf-binutils-gdb-444c60fe33717b6aa5c1f257babfca4c789d07ac.tar.gz fsf-binutils-gdb-444c60fe33717b6aa5c1f257babfca4c789d07ac.tar.bz2 | |
gas, aarch64: Add SVE2 lut extension
Introduces instructions for the SVE2 lut extension for AArch64. They are documented in the following links:
* luti2: https://developer.arm.com/documentation/ddi0602/2024-03/SVE-Instructions/LUTI2--Lookup-table-read-with-2-bit-indices-?lang=en
* luti4: https://developer.arm.com/documentation/ddi0602/2024-03/SVE-Instructions/LUTI4--Lookup-table-read-with-4-bit-indices-?lang=en
These instructions use new SVE2 vector operands. They are called
SVE_Zm1_23_INDEX, SVE_Zm2_22_INDEX, and Zm3_12_INDEX and they have
1 bit, 2 bit, and 3 bit indices respectively.
The lsb and width of these new operands are the same as many existing
operands but the convention is to give different names to fields that
serve different purpose so we introduced new fields in aarch64-opc.c
and aarch64-opc.h.
We made a design choice for the second operand of the halfword variant of
luti4 with two register tables. We could have either defined a new operand,
like SVE_Znx2, or we could have use the existing operand SVE_ZnxN. With
the new operand, we would need to implement constraints on register
lists based on either operand or opcode flag. With existing operand, we
could just existing constraint checks using opcode flag. We chose
the second approach and went with SVE_ZnxN and added opcode flag to
enforce lengths of vector register list operands. This way, we can reuse
the existing constraint check logic.
Diffstat (limited to 'gas/config')
| -rw-r--r-- | gas/config/tc-aarch64.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c index 4154786..fec17c4 100644 --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c @@ -6784,7 +6784,10 @@ parse_operands (char *str, const aarch64_opcode *opcode) info->qualifier = AARCH64_OPND_QLF_S_D; break; + case AARCH64_OPND_SVE_Zm1_23_INDEX: + case AARCH64_OPND_SVE_Zm2_22_INDEX: case AARCH64_OPND_SVE_Zm3_INDEX: + case AARCH64_OPND_SVE_Zm3_12_INDEX: case AARCH64_OPND_SVE_Zm3_22_INDEX: case AARCH64_OPND_SVE_Zm3_19_INDEX: case AARCH64_OPND_SVE_Zm3_11_INDEX: |