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| author | Andre Vieira <andre.simoesdiasvieira@arm.com> | 2019-04-15 11:29:14 +0100 |
|---|---|---|
| committer | Andre Vieira <andre.simoesdiasvieira@arm.com> | 2019-04-15 12:30:33 +0100 |
| commit | f1c7f42126274d48f6b0a929e4e15a32193997c6 (patch) | |
| tree | e7d52e61a7c5e91e8decb2a32454e44ff3d90d51 /gas/config | |
| parent | 4389b29a5af431eeac517272b66560e12df3c430 (diff) | |
| download | fsf-binutils-gdb-f1c7f42126274d48f6b0a929e4e15a32193997c6.zip fsf-binutils-gdb-f1c7f42126274d48f6b0a929e4e15a32193997c6.tar.gz fsf-binutils-gdb-f1c7f42126274d48f6b0a929e4e15a32193997c6.tar.bz2 | |
[binutils, ARM, 7/16] New BFX and BFLX instruction for Armv8.1-M Mainline
This patch is part of a series of patches to add support for Armv8.1-M Mainline instructions to binutils.
This patch adds the BFX and BFLX instructions.
ChangeLog entries are as follows :
*** gas/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* config/tc-arm.c (T16_32_TAB): New entries for bfx and bflx.
(do_t_v8_1_branch): New switch cases for bfx and bflx.
(insns): New instruction for bfx and bflx.
* testsuite/gas/arm/armv8_1-m-bf-exchange.d: New.
* testsuite/gas/arm/armv8_1-m-bf-exchange.s: New.
* testsuite/gas/arm/armv8_1-m-bf-exchange-bad.s: New
* testsuite/gas/arm/armv8_1-m-bf-exchange-bad.l: New
* testsuite/gas/arm/armv8_1-m-bf-exchange-bad.d: New
*** opcodes/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* arm-dis.c (print_insn_thumb32): Add '%<bitfield>S' to print an
Arm register with r13 and r15 unpredictable.
(thumb32_opcodes): New instructions for bfx and bflx.
Diffstat (limited to 'gas/config')
| -rw-r--r-- | gas/config/tc-arm.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c index caba273..c7c1a82 100644 --- a/gas/config/tc-arm.c +++ b/gas/config/tc-arm.c @@ -10506,6 +10506,8 @@ encode_thumb32_addr_mode (int i, bfd_boolean is_t, bfd_boolean is_d) X(_b, e000, f000b000), \ X(_bcond, d000, f0008000), \ X(_bf, 0000, f040e001), \ + X(_bfx, 0000, f060e001), \ + X(_bflx, 0000, f070e001), \ X(_bic, 4380, ea200000), \ X(_bics, 4380, ea300000), \ X(_cmn, 42c0, eb100f00), \ @@ -13362,6 +13364,11 @@ do_t_branch_future (void) } break; + case T_MNEM_bfx: + case T_MNEM_bflx: + inst.instruction |= inst.operands[1].reg << 16; + break; + default: abort (); } } @@ -21679,6 +21686,8 @@ static const struct asm_opcode insns[] = #undef THUMB_VARIANT #define THUMB_VARIANT & arm_ext_v8_1m_main toC("bf", _bf, 2, (EXPs, EXPs), t_branch_future), + toC("bfx", _bfx, 2, (EXPs, RRnpcsp), t_branch_future), + toC("bflx", _bflx, 2, (EXPs, RRnpcsp), t_branch_future), }; #undef ARM_VARIANT #undef THUMB_VARIANT |