include/

	* opcode/ppc.h (PPC_OPCODE_TITAN): Define.
bfd/
	* archures.c (bfd_mach_ppc_titan): Define.
	* bfd-in2.h: Regenerate.
	* cpu-powerpc.c (bfd_powerpc_archs): Add titan entry.
opcodes/
	* ppc-dis.c (ppc_opts): Add titan entry.
	* ppc-opc.c (TITAN, MULHW): Define.
	(powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
gas/
	* config/tc-ppc.c (md_show_usage): Mention -mtitan.  Don't use tabs.
	(ppc_mach): Handle titan.
	* doc/c-ppc.texi: Mention -mtitan.
gas/testsuite/
	* gas/ppc/titan.d, * gas/ppc/titan.s: New test.
	* gas/ppc/ppc.exp: Run it.

1 files changed, 46 insertions, 43 deletions

diff --git a/gas/config/tc-ppc.c b/gas/config/tc-ppc.c
index 212f822..3f366fe 100644
--- a/gas/config/tc-ppc.c
+++ b/gas/config/tc-ppc.c
@@ -1178,57 +1178,58 @@ md_show_usage (FILE *stream)
 {
   fprintf (stream, _("\
 PowerPC options:\n\
--a32			generate ELF32/XCOFF32\n\
--a64			generate ELF64/XCOFF64\n\
--u			ignored\n\
--mpwrx, -mpwr2		generate code for POWER/2 (RIOS2)\n\
--mpwr			generate code for POWER (RIOS1)\n\
--m601			generate code for PowerPC 601\n\
+-a32                    generate ELF32/XCOFF32\n\
+-a64                    generate ELF64/XCOFF64\n\
+-u                      ignored\n\
+-mpwrx, -mpwr2          generate code for POWER/2 (RIOS2)\n\
+-mpwr                   generate code for POWER (RIOS1)\n\
+-m601                   generate code for PowerPC 601\n\
 -mppc, -mppc32, -m603, -m604\n\
-			generate code for PowerPC 603/604\n\
--m403			generate code for PowerPC 403\n\
--m405			generate code for PowerPC 405\n\
--m440			generate code for PowerPC 440\n\
--m464			generate code for PowerPC 464\n\
--m476			generate code for PowerPC 476\n\
+                        generate code for PowerPC 603/604\n\
+-m403                   generate code for PowerPC 403\n\
+-m405                   generate code for PowerPC 405\n\
+-m440                   generate code for PowerPC 440\n\
+-m464                   generate code for PowerPC 464\n\
+-m476                   generate code for PowerPC 476\n\
 -m7400, -m7410, -m7450, -m7455\n\
-			generate code for PowerPC 7400/7410/7450/7455\n\
--m750cl			generate code for PowerPC 750cl\n"));
+                        generate code for PowerPC 7400/7410/7450/7455\n\
+-m750cl                 generate code for PowerPC 750cl\n"));
   fprintf (stream, _("\
--mppc64, -m620		generate code for PowerPC 620/625/630\n\
--mppc64bridge		generate code for PowerPC 64, including bridge insns\n\
--mbooke			generate code for 32-bit PowerPC BookE\n\
--ma2			generate code for A2 architecture\n\
--mpower4		generate code for Power4 architecture\n\
--mpower5		generate code for Power5 architecture\n\
--mpower6		generate code for Power6 architecture\n\
--mpower7		generate code for Power7 architecture\n\
--mcell			generate code for Cell Broadband Engine architecture\n\
--mcom			generate code Power/PowerPC common instructions\n\
--many			generate code for any architecture (PWR/PWRX/PPC)\n"));
+-mppc64, -m620          generate code for PowerPC 620/625/630\n\
+-mppc64bridge           generate code for PowerPC 64, including bridge insns\n\
+-mbooke                 generate code for 32-bit PowerPC BookE\n\
+-ma2                    generate code for A2 architecture\n\
+-mpower4                generate code for Power4 architecture\n\
+-mpower5                generate code for Power5 architecture\n\
+-mpower6                generate code for Power6 architecture\n\
+-mpower7                generate code for Power7 architecture\n\
+-mcell                  generate code for Cell Broadband Engine architecture\n\
+-mcom                   generate code Power/PowerPC common instructions\n\
+-many                   generate code for any architecture (PWR/PWRX/PPC)\n"));
   fprintf (stream, _("\
--maltivec		generate code for AltiVec\n\
--mvsx			generate code for Vector-Scalar (VSX) instructions\n\
--me300			generate code for PowerPC e300 family\n\
--me500, -me500x2	generate code for Motorola e500 core complex\n\
--me500mc,		generate code for Freescale e500mc core complex\n\
--me500mc64,		generate code for Freescale e500mc64 core complex\n\
--mspe			generate code for Motorola SPE instructions\n\
--mregnames		Allow symbolic names for registers\n\
--mno-regnames		Do not allow symbolic names for registers\n"));
+-maltivec               generate code for AltiVec\n\
+-mvsx                   generate code for Vector-Scalar (VSX) instructions\n\
+-me300                  generate code for PowerPC e300 family\n\
+-me500, -me500x2        generate code for Motorola e500 core complex\n\
+-me500mc,               generate code for Freescale e500mc core complex\n\
+-me500mc64,             generate code for Freescale e500mc64 core complex\n\
+-mspe                   generate code for Motorola SPE instructions\n\
+-mtitan                 generate code for AppliedMicro Titan core complex\n\
+-mregnames              Allow symbolic names for registers\n\
+-mno-regnames           Do not allow symbolic names for registers\n"));
 #ifdef OBJ_ELF
   fprintf (stream, _("\
--mrelocatable		support for GCC's -mrelocatble option\n\
--mrelocatable-lib	support for GCC's -mrelocatble-lib option\n\
--memb			set PPC_EMB bit in ELF flags\n\
+-mrelocatable           support for GCC's -mrelocatble option\n\
+-mrelocatable-lib       support for GCC's -mrelocatble-lib option\n\
+-memb                   set PPC_EMB bit in ELF flags\n\
 -mlittle, -mlittle-endian, -l, -le\n\
-			generate code for a little endian machine\n\
+                        generate code for a little endian machine\n\
 -mbig, -mbig-endian, -b, -be\n\
-			generate code for a big endian machine\n\
--msolaris		generate code for Solaris\n\
--mno-solaris		do not generate code for Solaris\n\
--V			print assembler version number\n\
--Qy, -Qn		ignored\n"));
+                        generate code for a big endian machine\n\
+-msolaris               generate code for Solaris\n\
+-mno-solaris            do not generate code for Solaris\n\
+-V                      print assembler version number\n\
+-Qy, -Qn                ignored\n"));
 #endif
 }
 
@@ -1291,6 +1292,8 @@ ppc_mach (void)
     return bfd_mach_ppc64;
   else if (ppc_arch () == bfd_arch_rs6000)
     return bfd_mach_rs6k;
+  else if (ppc_cpu & PPC_OPCODE_TITAN)
+    return bfd_mach_ppc_titan;
   else
     return bfd_mach_ppc;
 }