diff options
| author | Jan Beulich <jbeulich@suse.com> | 2020-06-08 08:39:57 +0200 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2020-06-08 08:39:57 +0200 |
| commit | 22e00a3f4df8cafd3fdb6a0cb7893877606518bb (patch) | |
| tree | fa042c831e94e9fc6afd09bc9087721c55f82957 /gas/config | |
| parent | 1ab84e0251a593bec32ccec9fef72b53b4ce218d (diff) | |
| download | fsf-binutils-gdb-22e00a3f4df8cafd3fdb6a0cb7893877606518bb.zip fsf-binutils-gdb-22e00a3f4df8cafd3fdb6a0cb7893877606518bb.tar.gz fsf-binutils-gdb-22e00a3f4df8cafd3fdb6a0cb7893877606518bb.tar.bz2 | |
x86: restrict %tr<N> visibility
First of all, these registers have never been available on any 64-bit
CPU, and hence should not be recognized in 64-bit mode. But even before
that they had already disappeared - also don't recognize them when 586
or 686 architectures were explicitly set.
Diffstat (limited to 'gas/config')
| -rw-r--r-- | gas/config/tc-i386.c | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 6b94798..cfb3b99 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -12358,11 +12358,17 @@ static bfd_boolean check_register (const reg_entry *r) if ((r->reg_type.bitfield.dword || (r->reg_type.bitfield.class == SReg && r->reg_num > 3) || r->reg_type.bitfield.class == RegCR - || r->reg_type.bitfield.class == RegDR - || r->reg_type.bitfield.class == RegTR) + || r->reg_type.bitfield.class == RegDR) && !cpu_arch_flags.bitfield.cpui386) return FALSE; + if (r->reg_type.bitfield.class == RegTR + && (flag_code == CODE_64BIT + || !cpu_arch_flags.bitfield.cpui386 + || cpu_arch_isa_flags.bitfield.cpui586 + || cpu_arch_isa_flags.bitfield.cpui686)) + return FALSE; + if (r->reg_type.bitfield.class == RegMMX && !cpu_arch_flags.bitfield.cpummx) return FALSE; |