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| author | Dmitry Selyutin <ghostmansd@gmail.com> | 2022-05-12 10:32:11 +0300 |
|---|---|---|
| committer | Alan Modra <amodra@gmail.com> | 2022-05-25 12:13:44 +0930 |
| commit | 8e5eb8e1b0cb2a408008a3e40e571f193917dcc8 (patch) | |
| tree | 57e88dbca3937b38a3dcb22cb7a316b27e5773c9 /gas/config/tc-ppc.c | |
| parent | f59e7b128933d96b53ee948ab306334e87b2f03c (diff) | |
| download | fsf-binutils-gdb-8e5eb8e1b0cb2a408008a3e40e571f193917dcc8.zip fsf-binutils-gdb-8e5eb8e1b0cb2a408008a3e40e571f193917dcc8.tar.gz fsf-binutils-gdb-8e5eb8e1b0cb2a408008a3e40e571f193917dcc8.tar.bz2 | |
ppc: extend opindex to 16 bits
With the upcoming SVP64 extension[0] to PowerPC architecture, it became
evident that PowerPC operand indices no longer fit 8 bits. This patch
switches the underlying type to uint16_t, also introducing a special
typedef so that any future extension goes even smoother.
[0] https://libre-soc.org
include/
* opcode/ppc.h (ppc_opindex_t): New typedef.
(struct powerpc_opcode): Use it.
(PPC_OPINDEX_MAX): Define.
gas/
* write.h (struct fix): Increase size of fx_pcrel_adjust.
Reorganise.
* config/tc-ppc.c (insn_validate): Use ppc_opindex_t for operands.
(md_assemble): Likewise.
(md_apply_fix): Likewise. Mask fx_pcrel_adjust with PPC_OPINDEX_MAX.
(ppc_setup_opcodes): Adjust opcode index assertion.
opcodes/
* ppc-dis.c (skip_optional_operands): Use ppc_opindex_t for
operand pointer.
(lookup_powerpc, lookup_prefix, lookup_vle, lookup_spe2): Likewise.
(print_insn_powerpc): Likewise.
Diffstat (limited to 'gas/config/tc-ppc.c')
| -rw-r--r-- | gas/config/tc-ppc.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/gas/config/tc-ppc.c b/gas/config/tc-ppc.c index 72128af..4d789fd 100644 --- a/gas/config/tc-ppc.c +++ b/gas/config/tc-ppc.c @@ -1553,7 +1553,7 @@ ppc_target_format (void) static bool insn_validate (const struct powerpc_opcode *op) { - const unsigned char *o; + const ppc_opindex_t *o; uint64_t omask = op->mask; /* The mask had better not trim off opcode bits. */ @@ -1634,8 +1634,8 @@ ppc_setup_opcodes (void) unsigned int i; /* An index into powerpc_operands is stored in struct fix - fx_pcrel_adjust which is 8 bits wide. */ - gas_assert (num_powerpc_operands < 256); + fx_pcrel_adjust which is a 16 bit field. */ + gas_assert (num_powerpc_operands <= PPC_OPINDEX_MAX + 1); /* Check operand masks. Code here and in the disassembler assumes all the 1's in the mask are contiguous. */ @@ -3251,7 +3251,7 @@ md_assemble (char *str) char *s; const struct powerpc_opcode *opcode; uint64_t insn; - const unsigned char *opindex_ptr; + const ppc_opindex_t *opindex_ptr; int need_paren; int next_opindex; struct ppc_fixup fixups[MAX_INSN_FIXUPS]; @@ -3348,7 +3348,7 @@ md_assemble (char *str) { if (num_optional_operands == 0) { - const unsigned char *optr; + const ppc_opindex_t *optr; int total = 0; int provided = 0; int omitted; @@ -7011,7 +7011,7 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg) if (fixP->fx_pcrel_adjust != 0) { /* This is a fixup on an instruction. */ - int opindex = fixP->fx_pcrel_adjust & 0xff; + ppc_opindex_t opindex = fixP->fx_pcrel_adjust & PPC_OPINDEX_MAX; operand = &powerpc_operands[opindex]; #ifdef OBJ_XCOFF |