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| author | Alan Modra <amodra@gmail.com> | 2020-09-09 22:10:47 +0930 |
|---|---|---|
| committer | Alan Modra <amodra@gmail.com> | 2020-09-09 22:51:07 +0930 |
| commit | 15a32af52fdc010801396cbcf62f33d88435ac1a (patch) | |
| tree | e92e7f2beca3fa020a341a55d2246075457c3c94 /gas/config/tc-ppc.c | |
| parent | 6a1ed9106f4f937eddc194915d6e3ec4ecc79f20 (diff) | |
| download | fsf-binutils-gdb-15a32af52fdc010801396cbcf62f33d88435ac1a.zip fsf-binutils-gdb-15a32af52fdc010801396cbcf62f33d88435ac1a.tar.gz fsf-binutils-gdb-15a32af52fdc010801396cbcf62f33d88435ac1a.tar.bz2 | |
power10 on ppc32
We don't support power10 on ppc32, mainly because some instructions
have 34-bit fields for which we don't have relocations on ppc32.
If you try to assemble typical code, you'll see errors saying
"reloc ... not supported by object file format". Also, on 32-bit
hosts with binutils configured without a 64-bit bfd, you'll see errors
saying "bignum invalid" when using large offsets. But let's not kill
output of prefix insns entirely on 32-bit hosts.
* config/tc-ppc.c (md_assemble): Emit prefix insn by parts when
valueT is smaller than 64 bits.
Diffstat (limited to 'gas/config/tc-ppc.c')
| -rw-r--r-- | gas/config/tc-ppc.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/gas/config/tc-ppc.c b/gas/config/tc-ppc.c index 1ff1cd9..4418182 100644 --- a/gas/config/tc-ppc.c +++ b/gas/config/tc-ppc.c @@ -3882,7 +3882,8 @@ md_assemble (char *str) /* The prefix part of an 8-byte instruction always occupies the lower addressed word in a doubleword, regardless of endianness. */ - if (!target_big_endian && insn_length == 8) + if (insn_length == 8 + && (sizeof (insn) > sizeof (valueT) || !target_big_endian)) { md_number_to_chars (f, PPC_GET_PREFIX (insn), 4); md_number_to_chars (f + 4, PPC_GET_SUFFIX (insn), 4); |