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| author | Chenghua Xu <paul.hua.gm@gmail.com> | 2018-08-29 20:13:00 +0800 |
|---|---|---|
| committer | Chenghua Xu <paul.hua.gm@gmail.com> | 2018-08-29 20:32:30 +0800 |
| commit | ac8cb70f3690b4eace1325c7ff918dce9073da7c (patch) | |
| tree | 83600872c07a022dcea1d3097dba01eafd5fa197 /gas/config/tc-mips.c | |
| parent | a693765e23934996abbe4e44c4ba28eabdece4f9 (diff) | |
| download | fsf-binutils-gdb-ac8cb70f3690b4eace1325c7ff918dce9073da7c.zip fsf-binutils-gdb-ac8cb70f3690b4eace1325c7ff918dce9073da7c.tar.gz fsf-binutils-gdb-ac8cb70f3690b4eace1325c7ff918dce9073da7c.tar.bz2 | |
[MIPS] Add Loongson 3A1000 proccessor support.
bfd/
* archures.c (bfd_architecture): Rename
bfd_mach_mips_loongson_3a to bfd_mach_mips_gs464.
* bfd-in2.h (bfd_architecture): Likewise.
* cpu-mips.c (enum I_xxx): Likewise.
(arch_info_struct): Likewise.
* elfxx-mips.c (_bfd_elf_mips_mach): Likewise.
(mips_set_isa_flags): Likewise.
(mips_mach_extensions): Likewise.
(bfd_mips_isa_ext_mach): Likewise.
(bfd_mips_isa_ext): Likewise.
(print_mips_isa_ext): Delete AFL_EXT_LOONGSON_3A.
binutils/
* NEWS: Mention Loongson 3A1000 proccessor support.
* readelf.c (get_machine_flags): Rename loongson-3a to gs464.
(print_mips_isa_ext): Delete AFL_EXT_LOONGSON_3A.
elfcpp/
* mips.c (EF_MIPS_MACH): Rename E_MIPS_MACH_LS3A to
E_MIPS_MACH_GS464.
gas/
* config/tc-mips.c (ISA_HAS_ODD_SINGLE_FPR): Rename
CPU_LOONGSON_3A to CPU_GS464.
(mips_cpu_info_table): Add gs464 descriptors, Keep
loongson3a as an alias of gs464 for compatibility.
* doc/as.texi (march table): Rename loongson3a to gs464.
* testsuite/gas/mips/loongson-3a-mmi.d: Set "ISA Extension"
flag to None.
gold/
* mips.cc (Mips_mach, add_machine_extensions, elf_mips_mach):
Rename loongson3a to gs464.
(mips_isa_ext_mach, mips_isa_ext): Delete loongson3a.
(infer_abiflags): Use ases instead of isa_ext for infer ABI
flags.
(elf_mips_mach_name): Rename loongson3a to gs464.
include/
* elf/mips.h (E_MIPS_MACH_XXX): Rename E_MIPS_MACH_LS3A to
E_MIPS_MACH_GS464.
(AFL_EXT_XXX): Delete AFL_EXT_LOONGSON_3A.
* opcode/mips.h (INSN_XXX): Delete INSN_LOONGSON_3A.
(CPU_XXX): Rename CPU_LOONGSON_3A to CPU_GS464.
* opcode/mips.h (mips_isa_table): Delete CPU_LOONGSON_3A case.
ld/
* testsuite/ld-mips-elf/mips-elf-flags.exp: Rename loongson3a
to gs464.
opcodes/
* mips-dis.c (mips_arch_choices): Add gs464 descriptors, Keep
loongson3a as an alias of gs464 for compatibility.
* mips-opc.c (mips_opcodes): Change Comments.
Diffstat (limited to 'gas/config/tc-mips.c')
| -rw-r--r-- | gas/config/tc-mips.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c index e60cf4e..0847875 100644 --- a/gas/config/tc-mips.c +++ b/gas/config/tc-mips.c @@ -422,7 +422,7 @@ static int mips_32bitmode = 0; || (ISA) == ISA_MIPS64R5 \ || (ISA) == ISA_MIPS64R6 \ || (CPU) == CPU_R5900) \ - && (CPU) != CPU_LOONGSON_3A) + && (CPU) != CPU_GS464) /* Return true if ISA supports move to/from high part of a 64-bit floating-point register. */ @@ -19809,8 +19809,11 @@ static const struct mips_cpu_info mips_cpu_info_table[] = /* MIPS 64 Release 2 */ /* Loongson CPU core */ + /* -march=loongson3a is an alias of -march=gs464 for compatibility */ { "loongson3a", 0, ASE_LOONGSON_MMI | ASE_LOONGSON_CAM | ASE_LOONGSON_EXT, - ISA_MIPS64R2, CPU_LOONGSON_3A }, + ISA_MIPS64R2, CPU_GS464 }, + { "gs464", 0, ASE_LOONGSON_MMI | ASE_LOONGSON_CAM | ASE_LOONGSON_EXT, + ISA_MIPS64R2, CPU_GS464 }, /* Cavium Networks Octeon CPU core */ { "octeon", 0, 0, ISA_MIPS64R2, CPU_OCTEON }, |