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| author | DJ Delorie <dj@redhat.com> | 2005-07-26 03:21:53 +0000 |
|---|---|---|
| committer | DJ Delorie <dj@redhat.com> | 2005-07-26 03:21:53 +0000 |
| commit | fd54057a29e296d29e662780fc6079e42c742228 (patch) | |
| tree | 1a109b9e7d8a9108edda9722d9e1f392e74cf070 /gas/config/tc-m32c.c | |
| parent | 030cf60a5d8687b18dbe76050ee33490fc96e075 (diff) | |
| download | fsf-binutils-gdb-fd54057a29e296d29e662780fc6079e42c742228.zip fsf-binutils-gdb-fd54057a29e296d29e662780fc6079e42c742228.tar.gz fsf-binutils-gdb-fd54057a29e296d29e662780fc6079e42c742228.tar.bz2 | |
[bfd]
* reloc.c: Remove unused M32C relocs, add BFD_RELOC_M32C_HI8.
* libbfd.h: Regenerate.
* bfd-in2.h: Regenerate.
* elf32-m32c.c (m32c_elf_howto_table): Add R_M32C_8, R_M32C_LO16,
R_M32C_HI8, R_M32C_HI16.
(m32c_reloc_map): Likewise.
(m32c_elf_relocate_section): Add R_M32C_HI8 and R_M32C_HI16.
[cpu]
* m32c.opc (parse_unsigned8): Add %dsp8().
(parse_signed8): Add %hi8().
(parse_unsigned16): Add %dsp16().
(parse_signed16): Add %lo16() and %hi16().
(parse_lab_5_3): Make valuep a bfd_vma *.
[gas]
* config/tc-m32c.c (md_cgen_lookup_reloc): Add 8 bit operands.
Support %mod() modifiers from opcodes.
* doc/c-m32c.texi (M32C-Modifiers): New section.
[include/elf]
* m32c.h: Add R_M32C_8, R_M32C_LO16, R_M32C_HI8, and R_M32C_HI16.
[opcodes]
* m32c-asm.c Regenerate.
* m32c-dis.c Regenerate.
Diffstat (limited to 'gas/config/tc-m32c.c')
| -rw-r--r-- | gas/config/tc-m32c.c | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/gas/config/tc-m32c.c b/gas/config/tc-m32c.c index 1a9ca40..9ccc9a7 100644 --- a/gas/config/tc-m32c.c +++ b/gas/config/tc-m32c.c @@ -738,6 +738,27 @@ md_cgen_lookup_reloc (const CGEN_INSN * insn ATTRIBUTE_UNUSED, int offset; } op_reloc_table[] = { + /* Absolute relocs for 8-bit fields. */ + { M32C_OPERAND_IMM_8_QI, BFD_RELOC_8, 1 }, + { M32C_OPERAND_IMM_16_QI, BFD_RELOC_8, 2 }, + { M32C_OPERAND_IMM_24_QI, BFD_RELOC_8, 3 }, + { M32C_OPERAND_IMM_32_QI, BFD_RELOC_8, 4 }, + { M32C_OPERAND_IMM_40_QI, BFD_RELOC_8, 5 }, + { M32C_OPERAND_IMM_48_QI, BFD_RELOC_8, 6 }, + { M32C_OPERAND_IMM_56_QI, BFD_RELOC_8, 7 }, + { M32C_OPERAND_DSP_8_S8, BFD_RELOC_8, 1 }, + { M32C_OPERAND_DSP_16_S8, BFD_RELOC_8, 2 }, + { M32C_OPERAND_DSP_24_S8, BFD_RELOC_8, 3 }, + { M32C_OPERAND_DSP_32_S8, BFD_RELOC_8, 4 }, + { M32C_OPERAND_DSP_40_S8, BFD_RELOC_8, 5 }, + { M32C_OPERAND_DSP_48_S8, BFD_RELOC_8, 6 }, + { M32C_OPERAND_DSP_8_U8, BFD_RELOC_8, 1 }, + { M32C_OPERAND_DSP_16_U8, BFD_RELOC_8, 2 }, + { M32C_OPERAND_DSP_24_U8, BFD_RELOC_8, 3 }, + { M32C_OPERAND_DSP_32_U8, BFD_RELOC_8, 4 }, + { M32C_OPERAND_DSP_40_U8, BFD_RELOC_8, 5 }, + { M32C_OPERAND_DSP_48_U8, BFD_RELOC_8, 6 }, + /* Absolute relocs for 16-bit fields. */ { M32C_OPERAND_IMM_16_HI, BFD_RELOC_16, 2 }, { M32C_OPERAND_IMM_24_HI, BFD_RELOC_16, 3 }, @@ -777,6 +798,11 @@ md_cgen_lookup_reloc (const CGEN_INSN * insn ATTRIBUTE_UNUSED, { fixP->fx_where += or->offset; fixP->fx_size -= or->offset; + + if (fixP->fx_cgen.opinfo + && fixP->fx_cgen.opinfo != BFD_RELOC_NONE) + return fixP->fx_cgen.opinfo; + return or->reloc; } } |