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author | Nick Clifton <nickc@redhat.com> | 2017-01-23 15:23:07 +0000 |
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committer | Nick Clifton <nickc@redhat.com> | 2017-01-23 15:23:07 +0000 |
commit | 33eaf5de31b248f84ae108cf0cf4e1664db9ee51 (patch) | |
tree | f3634c9429c1b925928ca168737186c1c31f3a4a /gas/config/tc-cr16.c | |
parent | 715e99a4980aeeb6511eded2e9d5ffe1b063f21e (diff) | |
download | fsf-binutils-gdb-33eaf5de31b248f84ae108cf0cf4e1664db9ee51.zip fsf-binutils-gdb-33eaf5de31b248f84ae108cf0cf4e1664db9ee51.tar.gz fsf-binutils-gdb-33eaf5de31b248f84ae108cf0cf4e1664db9ee51.tar.bz2 |
Fix spelling mistakes and typos in the GAS sources.
PR gas/21072
* asintl.h: Fix spelling mistakes and typos.
* atof-generic.c: Likewise.
* bit_fix.h: Likewise.
* config/atof-ieee.c: Likewise.
* config/bfin-defs.h: Likewise.
* config/bfin-parse.y: Likewise.
* config/obj-coff-seh.h: Likewise.
* config/obj-coff.c: Likewise.
* config/obj-evax.c: Likewise.
* config/obj-macho.c: Likewise.
* config/rx-parse.y: Likewise.
* config/tc-aarch64.c: Likewise.
* config/tc-alpha.c: Likewise.
* config/tc-arc.c: Likewise.
* config/tc-arm.c: Likewise.
* config/tc-avr.c: Likewise.
* config/tc-bfin.c: Likewise.
* config/tc-cr16.c: Likewise.
* config/tc-cris.c: Likewise.
* config/tc-crx.c: Likewise.
* config/tc-d10v.c: Likewise.
* config/tc-d30v.c: Likewise.
* config/tc-dlx.c: Likewise.
* config/tc-epiphany.c: Likewise.
* config/tc-frv.c: Likewise.
* config/tc-hppa.c: Likewise.
* config/tc-i370.c: Likewise.
* config/tc-i386-intel.c: Likewise.
* config/tc-i386.c: Likewise.
* config/tc-i960.c: Likewise.
* config/tc-ia64.c: Likewise.
* config/tc-m32r.c: Likewise.
* config/tc-m68hc11.c: Likewise.
* config/tc-m68k.c: Likewise.
* config/tc-mcore.c: Likewise.
* config/tc-mep.c: Likewise.
* config/tc-mep.h: Likewise.
* config/tc-metag.c: Likewise.
* config/tc-microblaze.c: Likewise.
* config/tc-mips.c: Likewise.
* config/tc-mmix.c: Likewise.
* config/tc-mn10200.c: Likewise.
* config/tc-mn10300.c: Likewise.
* config/tc-msp430.c: Likewise.
* config/tc-msp430.h: Likewise.
* config/tc-nds32.c: Likewise.
* config/tc-nds32.h: Likewise.
* config/tc-nios2.c: Likewise.
* config/tc-nios2.h: Likewise.
* config/tc-ns32k.c: Likewise.
* config/tc-pdp11.c: Likewise.
* config/tc-ppc.c: Likewise.
* config/tc-pru.c: Likewise.
* config/tc-rx.c: Likewise.
* config/tc-s390.c: Likewise.
* config/tc-score.c: Likewise.
* config/tc-score7.c: Likewise.
* config/tc-sh.c: Likewise.
* config/tc-sh64.c: Likewise.
* config/tc-sparc.c: Likewise.
* config/tc-tic4x.c: Likewise.
* config/tc-tic54x.c: Likewise.
* config/tc-v850.c: Likewise.
* config/tc-vax.c: Likewise.
* config/tc-visium.c: Likewise.
* config/tc-xgate.c: Likewise.
* config/tc-xtensa.c: Likewise.
* config/tc-z80.c: Likewise.
* config/tc-z8k.c: Likewise.
* config/te-vms.c: Likewise.
* config/xtensa-relax.c: Likewise.
* doc/as.texinfo: Likewise.
* doc/c-arm.texi: Likewise.
* doc/c-hppa.texi: Likewise.
* doc/c-i370.texi: Likewise.
* doc/c-i386.texi: Likewise.
* doc/c-m32r.texi: Likewise.
* doc/c-m68k.texi: Likewise.
* doc/c-mmix.texi: Likewise.
* doc/c-msp430.texi: Likewise.
* doc/c-nds32.texi: Likewise.
* doc/c-ns32k.texi: Likewise.
* doc/c-riscv.texi: Likewise.
* doc/c-rx.texi: Likewise.
* doc/c-s390.texi: Likewise.
* doc/c-tic6x.texi: Likewise.
* doc/c-tilegx.texi: Likewise.
* doc/c-tilepro.texi: Likewise.
* doc/c-v850.texi: Likewise.
* doc/c-xgate.texi: Likewise.
* doc/c-xtensa.texi: Likewise.
* dwarf2dbg.c: Likewise.
* ecoff.c: Likewise.
* itbl-ops.c: Likewise.
* listing.c: Likewise.
* macro.c: Likewise.
* po/gas.pot: Likewise.
* read.c: Likewise.
* struc-symbol.h: Likewise.
* symbols.h: Likewise.
* testsuite/gas/arc/relocs-errors.err: Likewise.
* write.c: Likewise.
Diffstat (limited to 'gas/config/tc-cr16.c')
-rw-r--r-- | gas/config/tc-cr16.c | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/gas/config/tc-cr16.c b/gas/config/tc-cr16.c index 76de462..4205a77 100644 --- a/gas/config/tc-cr16.c +++ b/gas/config/tc-cr16.c @@ -334,7 +334,7 @@ get_register_pair (char *reg_name) const reg_entry *rreg; char tmp_rp[16]="\0"; - /* Add '(' and ')' to the reg pair, if its not present. */ + /* Add '(' and ')' to the reg pair, if it's not present. */ if (reg_name[0] != '(') { tmp_rp[0] = '('; @@ -1153,8 +1153,8 @@ getreg_image (reg r) static void set_operand (char *operand, ins * cr16_ins) { - char *operandS; /* Pointer to start of sub-opearand. */ - char *operandE; /* Pointer to end of sub-opearand. */ + char *operandS; /* Pointer to start of sub-operand. */ + char *operandE; /* Pointer to end of sub-operand. */ argument *cur_arg = &cr16_ins->arg[cur_arg_num]; /* Current argument. */ @@ -1654,7 +1654,7 @@ getidxregp_image (reg r) return 0; } -/* Retrieve the opcode image of a given processort register. +/* Retrieve the opcode image of a given processor register. If the register is illegal for the current instruction, issue an error. */ static int @@ -1692,7 +1692,7 @@ getprocreg_image (int r) return 0; } -/* Retrieve the opcode image of a given processort register. +/* Retrieve the opcode image of a given processor register. If the register is illegal for the current instruction, issue an error. */ static int @@ -1846,7 +1846,7 @@ print_constant (int nbits, int shift, argument *arg) /* When instruction size is 3 and 'shift' is 16, a 16-bit constant is always filling the upper part of output_opcode[1]. If we mistakenly write it to output_opcode[0], the constant prefix (that is, 'match') - will be overriden. + will be overridden. 0 1 2 3 +---------+---------+---------+---------+ | 'match' | | X X X X | | @@ -2002,7 +2002,7 @@ check_range (long *num, int bits, int unsigned flags, int update) if (bits == 0 && value > 0) return OP_OUT_OF_RANGE; - /* For hosts witah longs bigger than 32-bits make sure that the top + /* For hosts with longs bigger than 32-bits make sure that the top bits of a 32-bit negative value read in by the parser are set, so that the correct comparisons are made. */ if (value & 0x80000000) @@ -2085,7 +2085,7 @@ check_range (long *num, int bits, int unsigned flags, int update) return retval; } -/* Bunch of error checkings. +/* Bunch of error checking. The checks are made after a matching instruction was found. */ static void @@ -2108,7 +2108,7 @@ warn_if_needed (ins *insn) { unsigned int count = insn->arg[0].constant, reg_val; - /* Check if count operand caused to save/retrive the RA twice + /* Check if count operand caused to save/retrieve the RA twice to generate warning message. */ if (insn->nargs > 2) { @@ -2289,7 +2289,7 @@ assemble_insn (const char *mnemonic, ins *insn) goto next_insn; /* If 'storb' instruction with 'sp' reg and 16-bit disp of - * reg-pair, leads to undifined trap, so this should use + * reg-pair, leads to undefined trap, so this should use * 20-bit disp of reg-pair. */ if (IS_INSN_MNEMONIC ("storb") && (instruction->size == 2) && (insn->arg[i].r == 15) && (insn->arg[i + 1].type == arg_crp)) @@ -2356,7 +2356,7 @@ next_insn: else /* Full match - print the encoding to output file. */ { - /* Make further checkings (such that couldn't be made earlier). + /* Make further checking (such that couldn't be made earlier). Warn the user if necessary. */ warn_if_needed (insn); @@ -2538,7 +2538,7 @@ md_assemble (char *op) ; *param++ = '\0'; - /* bCC instuctions and adjust the mnemonic by adding extra white spaces. */ + /* bCC instructions and adjust the mnemonic by adding extra white spaces. */ if (is_bcc_insn (op)) { strcpy (param1, get_b_cc (op)); @@ -2560,7 +2560,7 @@ md_assemble (char *op) /* MAPPING - SHIFT INSN, if imm4/imm16 positive values lsh[b/w] imm4/imm6, reg ==> ashu[b/w] imm4/imm16, reg - as CR16 core doesn't support lsh[b/w] right shift operaions. */ + as CR16 core doesn't support lsh[b/w] right shift operations. */ if ((streq ("lshb", op) || streq ("lshw", op) || streq ("lshd", op)) && (param [0] == '$')) { |