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| author | Maciej W. Rozycki <macro@orcam.me.uk> | 2021-05-29 03:26:32 +0200 |
|---|---|---|
| committer | Maciej W. Rozycki <macro@orcam.me.uk> | 2021-05-29 03:26:32 +0200 |
| commit | a3fb396f2dc57f585a49091e12ec6c588c45e681 (patch) | |
| tree | 3672573d24c85cb9157ad2c5f4a8b9ceb4945fe3 /gas/ChangeLog | |
| parent | 9623cc5d1fb947daf6a0eadb4f7662d0791f7893 (diff) | |
| download | fsf-binutils-gdb-a3fb396f2dc57f585a49091e12ec6c588c45e681.zip fsf-binutils-gdb-a3fb396f2dc57f585a49091e12ec6c588c45e681.tar.gz fsf-binutils-gdb-a3fb396f2dc57f585a49091e12ec6c588c45e681.tar.bz2 | |
MIPS/opcodes: Add TX39 CP0 register names
The TX39 core has its distinct set of CP0 registers[1], so it needs a
separate table to hold their names. Add a test case accordingly.
References:
[1] "32-Bit RISC Microprocessor TX39 Family Core Architecture User's
Manual", Toshiba, Jul. 27, 1995, Section 2.2.2 "System control
coprocessor (CP0) registers", pp. 9-10
opcodes/
* mips-dis.c (mips_cp0_names_r3900): New variable.
(mips_arch_choices): Use it rather than `mips_cp0_names_numeric'
for "r3900".
gas/
* testsuite/gas/mips/cp0-names-r3900.d: New test.
* testsuite/gas/mips/mips.exp: Run it.
Diffstat (limited to 'gas/ChangeLog')
| -rw-r--r-- | gas/ChangeLog | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 3b94c5d..4d7f814 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,10 @@ 2021-05-29 Maciej W. Rozycki <macro@orcam.me.uk> + * testsuite/gas/mips/cp0-names-r3900.d: New test. + * testsuite/gas/mips/mips.exp: Run it. + +2021-05-29 Maciej W. Rozycki <macro@orcam.me.uk> + * testsuite/gas/mips/micromips.d: Update disassembly according to "dmtc1" entry fix with opcodes. * testsuite/gas/mips/micromips-compact.d: Likewise. |