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| author | Jan Beulich <jbeulich@suse.com> | 2020-01-30 11:36:33 +0100 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2020-01-30 11:36:33 +0100 |
| commit | aeab2b26dbea33221db4debaf31c97277cfaea5e (patch) | |
| tree | ea035fa04bc87aab42f5381626f3a213273fc992 /cpu | |
| parent | 873494c89fb44747c7514687da25fc163c791b84 (diff) | |
| download | fsf-binutils-gdb-aeab2b26dbea33221db4debaf31c97277cfaea5e.zip fsf-binutils-gdb-aeab2b26dbea33221db4debaf31c97277cfaea5e.tar.gz fsf-binutils-gdb-aeab2b26dbea33221db4debaf31c97277cfaea5e.tar.bz2 | |
x86-64: honor vendor specifics for near RET
While vendors agree about default operand size (64 bits) and hence
unavilability of a 32-bit form, AMD honors a 16-bit operand size
override (0x66) while Intel doesn't.
Diffstat (limited to 'cpu')
0 files changed, 0 insertions, 0 deletions