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authorJose E. Marchesi <jose.marchesi@oracle.com>2019-07-19 15:35:43 +0200
committerJose E. Marchesi <jose.marchesi@oracle.com>2019-07-19 15:35:43 +0200
commit231097b03afffd0c5a2b520cd999dbcbe8d64eda (patch)
tree33315b4833f4f64ec8e1a04b037f8ec848b21e92 /cpu/bpf.cpu
parent1802aae8449a4d693ba1f4efb8a7917c2f20990b (diff)
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cpu,opcodes,gas: use %r0 and %r6 instead of %a and %ctf in eBPF disassembler
This patch changes the eBPF CPU description to prefer the register names %r0 and %r6 instead of %a and %ctx when disassembling. This matches better with the current practice, vs. cBPF. It also updates the GAS tests in order to reflect this change. Tested in a x86_64 host. cpu/ChangeLog: 2019-07-19 Jose E. Marchesi <jose.marchesi@oracle.com> * bpf.cpu (h-gpr): when disassembling, use %r0 and %r6 instead of %a and %ctx. opcodes/ChangeLog: 2019-07-19 Jose E. Marchesi <jose.marchesi@oracle.com> * bpf-desc.c: Regenerated. gas/ChangeLog: 2019-07-19 Jose E. Marchesi <jose.marchesi@oracle.com> * testsuite/gas/bpf/alu.d: Use %r6 instead of %ctx. * testsuite/gas/bpf/lddw-be.d: Likewise. * testsuite/gas/bpf/lddw.d: Likewise. * testsuite/gas/bpf/alu-be.d: Likewise. * testsuite/gas/bpf/alu32.d: Likewise.
Diffstat (limited to 'cpu/bpf.cpu')
-rw-r--r--cpu/bpf.cpu4
1 files changed, 2 insertions, 2 deletions
diff --git a/cpu/bpf.cpu b/cpu/bpf.cpu
index b8a3a92..aa01fbb 100644
--- a/cpu/bpf.cpu
+++ b/cpu/bpf.cpu
@@ -156,10 +156,10 @@
;; XXX the frame pointer fp is read-only, so it should
;; go in a different hardware.
(;; ABI names. Take priority when disassembling.
- (a 0) (r1 1) (r2 2) (r3 3) (r4 4) (r5 5) (ctx 6)
+ (r0 0) (r1 1) (r2 2) (r3 3) (r4 4) (r5 5) (r6 6)
(r7 7) (r8 8) (r9 9) (fp 10)
;; Additional names recognized when assembling.
- (r0 0) (r6 6) (r10 10))))
+ (a 0) (ctx 6) (r10 10))))
;; The program counter. CGEN requires it, even if it is not visible
;; to eBPF programs.