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authorMaciej W. Rozycki <macro@imgtec.com>2017-06-30 07:21:55 +0100
committerMaciej W. Rozycki <macro@imgtec.com>2017-06-30 07:21:55 +0100
commit9785fc2a4d220322ce6cd1d79e768345ea5234d2 (patch)
tree275033dcff24aa9a5b87300fe32dbd8ca3936da2 /binutils
parent8d011e87dfa4e1719bd909b9adcbd1a0f5a75228 (diff)
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MIPS: Fix XPA base and Virtualization ASE instruction handling
Correct a commit 7d64c587c15f ("Add support for the MIPS eXtended Physical Address (XPA) ASE.") bug, causing XPA base and Virtualization ASE instructions to be wrongly always enabled with the selection of the MIPS32r2 or higher ISA. For example this source assembles successfully as shown below: $ cat xpa.s mfhc0 $2, $1 $ as -32 -mips32 -o xpa.o xpa.s xpa.s: Assembler messages: xpa.s:1: Error: opcode not supported on this processor: mips32 (mips32) `mfhc0 $2,$1' $ as -32 -mips32r2 -o xpa.o xpa.s $ objdump -d xpa.o xpa.o: file format elf32-tradbigmips Disassembly of section .text: 00000000 <.text>: 0: 40420800 mfhc0 v0,c0_random ... $ To address this issue remove the I33 (INSN_ISA32R2) marking from all XPA instructions in the opcode table. Additionally, for XPA Virtualization ASE instructions implement an XPAVZ (ASE_XPA_VIRT) combination ASE flag and use it in place of IVIRT|XPA (ASE_VIRT|ASE_XPA). Now the same source is correctly rejected unless the `-mxpa' option is also used: $ as -32 -mips32r2 -o xpa.o xpa.s xpa.s: Assembler messages: xpa.s:1: Error: opcode not supported on this processor: mips32r2 (mips32r2) `mfhc0 $2,$1' $ as -32 -mips32r2 -mxpa -o xpa.o xpa.s $ Add test cases for XPA base and XPA Virtualization ASE instructions. Parts of this change by Andrew Bennett. include/ * opcode/mips.h (ASE_XPA_VIRT): New macro. opcodes/ * mips-dis.c (mips_calculate_combination_ases): Handle the ASE_XPA_VIRT flag. (parse_mips_ase_option): New function. (parse_mips_dis_option): Factor out ASE option handling to the new function. Call `mips_calculate_combination_ases'. * mips-opc.c (XPAVZ): New macro. (mips_builtin_opcodes): Correct ISA and ASE flags for "mfhc0", "mfhgc0", "mthc0" and "mthgc0". gas/ * config/tc-mips.c (mips_set_ase): Handle the ASE_XPA_VIRT flag. * testsuite/gas/mips/xpa.d: Remove `xpa' from `-M' in `objdump' flags. Add `-mvirt' to `as' flags. * testsuite/gas/mips/xpa-err.d: New test. * testsuite/gas/mips/xpa-virt-err.d: New test. * testsuite/gas/mips/xpa-err.l: New stderr output. * testsuite/gas/mips/xpa-virt-err.l: New stderr output. * testsuite/gas/mips/xpa-err.s: New test source. * testsuite/gas/mips/xpa-virt-err.s: New test source. * testsuite/gas/mips/mips.exp: Run the new tests. binutils/ * testsuite/binutils-all/mips/mips-xpa-virt-1.d: New test. * testsuite/binutils-all/mips/mips-xpa-virt-2.d: New test. * testsuite/binutils-all/mips/mips-xpa-virt-3.d: New test. * testsuite/binutils-all/mips/mips-xpa-virt-4.d: New test. * testsuite/binutils-all/mips/mips-xpa-virt.s: New test source. * testsuite/binutils-all/mips/mips.exp: Run the new tests.
Diffstat (limited to 'binutils')
-rw-r--r--binutils/ChangeLog9
-rw-r--r--binutils/testsuite/binutils-all/mips/mips-xpa-virt-1.d13
-rw-r--r--binutils/testsuite/binutils-all/mips/mips-xpa-virt-2.d13
-rw-r--r--binutils/testsuite/binutils-all/mips/mips-xpa-virt-3.d13
-rw-r--r--binutils/testsuite/binutils-all/mips/mips-xpa-virt-4.d13
-rw-r--r--binutils/testsuite/binutils-all/mips/mips-xpa-virt.s14
-rw-r--r--binutils/testsuite/binutils-all/mips/mips.exp4
7 files changed, 79 insertions, 0 deletions
diff --git a/binutils/ChangeLog b/binutils/ChangeLog
index d8577b0..797bfd4 100644
--- a/binutils/ChangeLog
+++ b/binutils/ChangeLog
@@ -1,3 +1,12 @@
+2017-06-30 Maciej W. Rozycki <macro@imgtec.com>
+
+ * testsuite/binutils-all/mips/mips-xpa-virt-1.d: New test.
+ * testsuite/binutils-all/mips/mips-xpa-virt-2.d: New test.
+ * testsuite/binutils-all/mips/mips-xpa-virt-3.d: New test.
+ * testsuite/binutils-all/mips/mips-xpa-virt-4.d: New test.
+ * testsuite/binutils-all/mips/mips-xpa-virt.s: New test source.
+ * testsuite/binutils-all/mips/mips.exp: Run the new tests.
+
2017-06-29 Anton Kolesov <Anton.Kolesov@synopsys.com>
* testsuite/binutils-all/arc/double_store.s: New file.
diff --git a/binutils/testsuite/binutils-all/mips/mips-xpa-virt-1.d b/binutils/testsuite/binutils-all/mips/mips-xpa-virt-1.d
new file mode 100644
index 0000000..1bb38ac
--- /dev/null
+++ b/binutils/testsuite/binutils-all/mips/mips-xpa-virt-1.d
@@ -0,0 +1,13 @@
+#PROG: objcopy
+#objdump: -d --prefix-addresses --show-raw-insn -M cp0-names=mips32
+#name: MIPS XPA and Virtualization ASE instruction disassembly 1
+#source: mips-xpa-virt.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 40020800 mfc0 v0,c0_random
+[0-9a-f]+ <[^>]*> 40420800 cfc0 v0,c0_random
+[0-9a-f]+ <[^>]*> 40620800 0x40620800
+[0-9a-f]+ <[^>]*> 40620c00 0x40620c00
+ \.\.\.
diff --git a/binutils/testsuite/binutils-all/mips/mips-xpa-virt-2.d b/binutils/testsuite/binutils-all/mips/mips-xpa-virt-2.d
new file mode 100644
index 0000000..58bd5fa
--- /dev/null
+++ b/binutils/testsuite/binutils-all/mips/mips-xpa-virt-2.d
@@ -0,0 +1,13 @@
+#PROG: objcopy
+#objdump: -d --prefix-addresses --show-raw-insn -M xpa,cp0-names=mips32
+#name: MIPS XPA and Virtualization ASE instruction disassembly 2
+#source: mips-xpa-virt.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 40020800 mfc0 v0,c0_random
+[0-9a-f]+ <[^>]*> 40420800 mfhc0 v0,c0_random
+[0-9a-f]+ <[^>]*> 40620800 0x40620800
+[0-9a-f]+ <[^>]*> 40620c00 0x40620c00
+ \.\.\.
diff --git a/binutils/testsuite/binutils-all/mips/mips-xpa-virt-3.d b/binutils/testsuite/binutils-all/mips/mips-xpa-virt-3.d
new file mode 100644
index 0000000..f42f7d7
--- /dev/null
+++ b/binutils/testsuite/binutils-all/mips/mips-xpa-virt-3.d
@@ -0,0 +1,13 @@
+#PROG: objcopy
+#objdump: -d --prefix-addresses --show-raw-insn -M virt,cp0-names=mips32
+#name: MIPS XPA and Virtualization ASE instruction disassembly 3
+#source: mips-xpa-virt.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 40020800 mfc0 v0,c0_random
+[0-9a-f]+ <[^>]*> 40420800 cfc0 v0,c0_random
+[0-9a-f]+ <[^>]*> 40620800 mfgc0 v0,c0_random
+[0-9a-f]+ <[^>]*> 40620c00 0x40620c00
+ \.\.\.
diff --git a/binutils/testsuite/binutils-all/mips/mips-xpa-virt-4.d b/binutils/testsuite/binutils-all/mips/mips-xpa-virt-4.d
new file mode 100644
index 0000000..a88c4ef
--- /dev/null
+++ b/binutils/testsuite/binutils-all/mips/mips-xpa-virt-4.d
@@ -0,0 +1,13 @@
+#PROG: objcopy
+#objdump: -d --prefix-addresses --show-raw-insn -M xpa,virt,cp0-names=mips32
+#name: MIPS XPA and Virtualization ASE instruction disassembly 4
+#source: mips-xpa-virt.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 40020800 mfc0 v0,c0_random
+[0-9a-f]+ <[^>]*> 40420800 mfhc0 v0,c0_random
+[0-9a-f]+ <[^>]*> 40620800 mfgc0 v0,c0_random
+[0-9a-f]+ <[^>]*> 40620c00 mfhgc0 v0,c0_random
+ \.\.\.
diff --git a/binutils/testsuite/binutils-all/mips/mips-xpa-virt.s b/binutils/testsuite/binutils-all/mips/mips-xpa-virt.s
new file mode 100644
index 0000000..416016a
--- /dev/null
+++ b/binutils/testsuite/binutils-all/mips/mips-xpa-virt.s
@@ -0,0 +1,14 @@
+ .set mips64r5
+ .set xpa
+ .set virt
+
+ .text
+foo:
+ mfc0 $2, $1
+ mfhc0 $2, $1
+ mfgc0 $2, $1
+ mfhgc0 $2, $1
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+ .align 4, 0
+ .space 16
diff --git a/binutils/testsuite/binutils-all/mips/mips.exp b/binutils/testsuite/binutils-all/mips/mips.exp
index 28c2197..0070929 100644
--- a/binutils/testsuite/binutils-all/mips/mips.exp
+++ b/binutils/testsuite/binutils-all/mips/mips.exp
@@ -36,6 +36,10 @@ set has_newabi [expr [istarget *-*-irix6*] \
run_dump_test "mips-ase-1"
run_dump_test "mips-ase-2"
run_dump_test "mips-ase-3"
+run_dump_test "mips-xpa-virt-1"
+run_dump_test "mips-xpa-virt-2"
+run_dump_test "mips-xpa-virt-3"
+run_dump_test "mips-xpa-virt-4"
run_dump_test "mixed-mips16"
run_dump_test "mixed-micromips"
run_dump_test "mixed-mips16-micromips"