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authorTerry Guo <terry.guo@arm.com>2014-11-21 11:31:37 +0800
committerTerry Guo <terry.guo@arm.com>2014-11-21 11:36:06 +0800
commita715796ba188e7ca9eac6e613439b63fe50a677d (patch)
tree4dd6a5f47fddcb7f5690e03ee49b51986bc0ffd8 /binutils
parent45e44d277a1b558bb77ea0a1962172a06be26594 (diff)
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Support ARM Cortex-M7
include/ChangeLog: 2014-11-21 Terry Guo <terry.guo@arm.com> * opcode/arm.h (FPU_VFP_EXT_ARMV8xD): New macro. (FPU_VFP_V5D16): Likewise. (FPU_VFP_V5_SP_D16): Likewise. (FPU_ARCH_VFP_V5D16): Likewise. (FPU_ARCH_VFP_V5_SP_D16): Likewise. bfd/ChangeLog: 2014-11-21 Terry Guo <terry.guo@arm.com> * elf32-arm.c (elf32_arm_merge_eabi_attributes): Support FPv5. binutils/ChangeLog: 2014-11-21 Terry Guo <terry.guo@arm.com> * readelf.c (arm_attr_tag_FP_arch): Extended to support FPv5. gas/ChangeLog: 2014-11-21 Terry Guo <terry.guo@arm.com> * config/tc-arm.c (fpu_vfp_ext_armv8xd): New. (arm_cpus): Support cortex-m7. (arm_fpus): Support fpv5-sp-d16 and fpv5-d16. (do_vfp_nsyn_cvt_fpv8): Generate error when use D register for S register only target like FPv5-SP-D16. (do_neon_cvttb_1): Likewise. (do_vfp_nsyn_fpv8): Likewise. (do_vrint_1): Likewise. (aeabi_set_public_attributes): Set proper FP arch for FPv5. * doc/c-arm.texi: Document new cpu and fpu names for cortex-m7. gas/testsuite/ChangeLog: 2014-11-21 Terry Guo <terry.guo@arm.com> * gas/arm/armv7e-m+fpv5-d16.s: New. * gas/arm/armv7e-m+fpv5-d16.d: Likewise. * gas/arm/armv7e-m+fpv5-sp-d16.s: Likewise. * gas/arm/armv7e-m+fpv5-sp-d16.d: Likewise. ld/testsuite/ChangeLog: 2014-11-21 Terry Guo <terry.guo@arm.com> * ld-arm/attr-merge-vfp-4-sp.s: New test source file. * ld-arm/attr-merge-vfp-5-sp.s: Likewise. * ld-arm/attr-merge-vfp-5.s: Likewise. * ld-arm/attr-merge-vfp-8.d: New test. * ld-arm/attr-merge-vfp-8r.d: Likewise. * ld-arm/attr-merge-vfp-9.d: Likewise. * ld-arm/attr-merge-vfp-9r.d: Likewise. * ld-arm/attr-merge-vfp-10.d: Likewise. * ld-arm/attr-merge-vfp-10r.d: Likewise. * ld-arm/attr-merge-vfp-11.d: Likewise. * ld-arm/attr-merge-vfp-11r.d: Likewise. * ld-arm/attr-merge-vfp-12.d: Likewise. * ld-arm/attr-merge-vfp-12r.d: Likewise. * ld-arm/attr-merge-vfp-13.d: Likewise. * ld-arm/attr-merge-vfp-13r.d: Likewise. * ld-arm/attr-merge-vfp-14.d: Likewise. * ld-arm/attr-merge-vfp-14r.d: Likewise. * ld-arm/arm-elf.exp: Run the new tests.
Diffstat (limited to 'binutils')
-rw-r--r--binutils/ChangeLog4
-rw-r--r--binutils/readelf.c2
2 files changed, 5 insertions, 1 deletions
diff --git a/binutils/ChangeLog b/binutils/ChangeLog
index ed66338..8e3976a 100644
--- a/binutils/ChangeLog
+++ b/binutils/ChangeLog
@@ -1,3 +1,7 @@
+2014-11-21 Terry Guo <terry.guo@arm.com>
+
+ * readelf.c (arm_attr_tag_FP_arch): Extended to support FPv5.
+
2014-11-19 Jan-Benedict Glaw <jbglaw@lug-owl.de>
* dwarf.c (process_extended_line_op): Fix signedness warning.
diff --git a/binutils/readelf.c b/binutils/readelf.c
index 6cead83..b7269d1 100644
--- a/binutils/readelf.c
+++ b/binutils/readelf.c
@@ -11887,7 +11887,7 @@ static const char * arm_attr_tag_THUMB_ISA_use[] =
{"No", "Thumb-1", "Thumb-2"};
static const char * arm_attr_tag_FP_arch[] =
{"No", "VFPv1", "VFPv2", "VFPv3", "VFPv3-D16", "VFPv4", "VFPv4-D16",
- "FP for ARMv8"};
+ "FP for ARMv8", "FPv5/FP-D16 for ARMv8"};
static const char * arm_attr_tag_WMMX_arch[] = {"No", "WMMXv1", "WMMXv2"};
static const char * arm_attr_tag_Advanced_SIMD_arch[] =
{"No", "NEONv1", "NEONv1 with Fused-MAC", "NEON for ARMv8"};