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authorAndre Vieira <andre.simoesdiasvieira@arm.com>2019-04-15 11:18:57 +0100
committerAndre Vieira <andre.simoesdiasvieira@arm.com>2019-04-15 12:30:33 +0100
commite5d6e09ee6cea13942a8042945e784f483a6f3af (patch)
tree682983efcb6e4ceb1ec5cbebfbb196abaebf3b94 /bfd
parente2b0ab597857bfe9d7c8742ff50bbb77c70936c4 (diff)
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[binutils, ARM, 5/16] BF insns infrastructure with new global reloc R_ARM_THM_BF16
This patch is part of a series of patches to add support for Armv8.1-M Mainline instructions to binutils. This adds infrastructure for the BF instructions which is one of the first instructions in Arm that have more than one relocations in them. This is the third infrastructure patch that adds a new relocation R_ARM_THM_BF16. The inconsistency between external R_ARM_THM_BF16 and internal BFD_RELOC_ARM_THUMB_BF17 is because internally we count the static bit-0 of the immediate and we don't externally. ChangeLog entries are as follows : *** bfd/ChangeLog *** 2019-04-15 Sudakshina Das <sudi.das@arm.com> * reloc.c (BFD_RELOC_ARM_THUMB_BF17): New enum. * bfd-in2.h: Regenerated. * libbfd.h: Regenerated. * bfd-elf32-arm.c (elf32_arm_howto_table_1): New entry for R_ARM_THM_BF16. (elf32_arm_reloc_map elf32_arm_reloc_map): Map BFD_RELOC_ARM_THUMB_BF17 and R_ARM_THM_BF16 together. (get_value_helper): New reloc helper. (elf32_arm_final_link_relocate): New switch case for R_ARM_THM_BF16. *** elfcpp/ChangeLog *** 2019-04-15 Sudakshina Das <sudi.das@arm.com> * arm.h (R_ARM_THM_BF16): New relocation code. *** gas/ChangeLog *** 2019-04-15 Sudakshina Das <sudi.das@arm.com> * config/tc-arm.c (md_pcrel_from_section): New switch case for BFD_RELOC_ARM_THUMB_BF17. (md_appdy_fix): Likewise. (tc_gen_reloc): Likewise. *** include/ChangeLog *** 2019-04-15 Sudakshina Das <sudi.das@arm.com> * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF16. *** opcodes/ChangeLog *** 2019-04-15 Sudakshina Das <sudi.das@arm.com> * arm-dis.c (print_insn_thumb32): Updated to accept new %W pattern.
Diffstat (limited to 'bfd')
-rw-r--r--bfd/ChangeLog11
-rw-r--r--bfd/bfd-in2.h3
-rw-r--r--bfd/elf32-arm.c115
-rw-r--r--bfd/libbfd.h1
-rw-r--r--bfd/reloc.c5
5 files changed, 134 insertions, 1 deletions
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index bbb251a..992e570 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,5 +1,16 @@
2019-04-15 Sudakshina Das <sudi.das@arm.com>
+ * reloc.c (BFD_RELOC_ARM_THUMB_BF17): New enum.
+ * bfd-in2.h: Regenerated.
+ * libbfd.h: Regenerated.
+ * bfd-elf32-arm.c (elf32_arm_howto_table_1): New entry for R_ARM_THM_BF16.
+ (elf32_arm_reloc_map elf32_arm_reloc_map): Map BFD_RELOC_ARM_THUMB_BF17
+ and R_ARM_THM_BF16 together.
+ (get_value_helper): New reloc helper.
+ (elf32_arm_final_link_relocate): New switch case for R_ARM_THM_BF16.
+
+2019-04-15 Sudakshina Das <sudi.das@arm.com>
+
* reloc.c (BFD_RELOC_THUMB_PCREL_BRANCH5): New enum.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
index 3493d4f..b5922ff 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -3567,6 +3567,9 @@ field in the instruction. */
/* ARM 5-bit pc-relative branch for Branch Future instructions. */
BFD_RELOC_THUMB_PCREL_BRANCH5,
+/* ARM 17-bit pc-relative branch for Branch Future instructions. */
+ BFD_RELOC_ARM_THUMB_BF17,
+
/* Thumb 7-, 9-, 12-, 20-, 23-, and 25-bit pc-relative branches.
The lowest bit must be zero and is not stored in the instruction.
Note that the corresponding ELF R_ARM_THM_JUMPnn constant has an
diff --git a/bfd/elf32-arm.c b/bfd/elf32-arm.c
index 23bfbcb..2a209da 100644
--- a/bfd/elf32-arm.c
+++ b/bfd/elf32-arm.c
@@ -1742,6 +1742,20 @@ static reloc_howto_type elf32_arm_howto_table_1[] =
0x00000000, /* src_mask. */
0x00000000, /* dst_mask. */
FALSE), /* pcrel_offset. */
+ /* Relocations for Armv8.1-M Mainline. */
+ HOWTO (R_ARM_THM_BF16, /* type. */
+ 0, /* rightshift. */
+ 1, /* size (0 = byte, 1 = short, 2 = long). */
+ 16, /* bitsize. */
+ TRUE, /* pc_relative. */
+ 0, /* bitpos. */
+ complain_overflow_dont,/* do not complain_on_overflow. */
+ bfd_elf_generic_reloc, /* special_function. */
+ "R_ARM_THM_BF16", /* name. */
+ FALSE, /* partial_inplace. */
+ 0x001f0ffe, /* src_mask. */
+ 0x001f0ffe, /* dst_mask. */
+ TRUE), /* pcrel_offset. */
};
/* 160 onwards: */
@@ -2053,7 +2067,8 @@ static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
{BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC, R_ARM_THM_ALU_ABS_G3_NC},
{BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC, R_ARM_THM_ALU_ABS_G2_NC},
{BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC, R_ARM_THM_ALU_ABS_G1_NC},
- {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G0_NC}
+ {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G0_NC},
+ {BFD_RELOC_ARM_THUMB_BF17, R_ARM_THM_BF16}
};
static reloc_howto_type *
@@ -10250,6 +10265,59 @@ identify_add_or_sub (bfd_vma insn)
return 0;
}
+/* Helper function to compute the Addend for Armv8.1-M Mainline relocations. */
+static bfd_vma
+get_value_helper (bfd_vma plt_offset,
+ asection *splt,
+ asection *input_section,
+ asection *sym_sec,
+ struct elf_link_hash_entry * h,
+ struct bfd_link_info *info,
+ bfd *input_bfd,
+ Elf_Internal_Rela *rel,
+ const char *sym_name,
+ unsigned char st_type,
+ struct elf32_arm_link_hash_table *globals,
+ bfd_boolean *unresolved_reloc_p)
+{
+ bfd_vma value = 0;
+ enum arm_st_branch_type branch_type;
+ enum elf32_arm_stub_type stub_type = arm_stub_none;
+ struct elf32_arm_stub_hash_entry *stub_entry;
+ struct elf32_arm_link_hash_entry *hash
+ = (struct elf32_arm_link_hash_entry *)h;
+
+
+ if (plt_offset != (bfd_vma) -1)
+ {
+ value = (splt->output_section->vma
+ + splt->output_offset
+ + plt_offset);
+ value -= PLT_THUMB_STUB_SIZE;
+ *unresolved_reloc_p = FALSE;
+ }
+
+ stub_type = arm_type_of_stub (info, input_section, rel,
+ st_type, &branch_type,
+ hash, value, sym_sec,
+ input_bfd, sym_name);
+
+ if (stub_type != arm_stub_none)
+ {
+ stub_entry = elf32_arm_get_stub_entry (input_section,
+ sym_sec, h,
+ rel, globals,
+ stub_type);
+ if (stub_entry != NULL)
+ {
+ value = (stub_entry->stub_offset
+ + stub_entry->stub_sec->output_offset
+ + stub_entry->stub_sec->output_section->vma);
+ }
+ }
+ return value;
+}
+
/* Perform a relocation as part of a final link. */
static bfd_reloc_status_type
@@ -12856,6 +12924,51 @@ elf32_arm_final_link_relocate (reloc_howto_type * howto,
*unresolved_reloc_p = FALSE;
return bfd_reloc_ok;
+ case R_ARM_THM_BF16:
+ {
+ bfd_vma relocation;
+ bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
+ bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
+
+ if (globals->use_rel)
+ {
+ bfd_vma immA = (upper_insn & 0x001f);
+ bfd_vma immB = (lower_insn & 0x07fe) >> 1;
+ bfd_vma immC = (lower_insn & 0x0800) >> 11;
+ addend = (immA << 12);
+ addend |= (immB << 2);
+ addend |= (immC << 1);
+ addend |= 1;
+ /* Sign extend. */
+ addend = (addend & 0x10000) ? addend - (1 << 17) : addend;
+ }
+
+ value = get_value_helper (plt_offset, splt, input_section, sym_sec, h,
+ info, input_bfd, rel, sym_name, st_type,
+ globals, unresolved_reloc_p);
+
+ relocation = value + addend;
+ relocation -= (input_section->output_section->vma
+ + input_section->output_offset
+ + rel->r_offset);
+
+ /* Put RELOCATION back into the insn. */
+ {
+ bfd_vma immA = (relocation & 0x0001f000) >> 12;
+ bfd_vma immB = (relocation & 0x00000ffc) >> 2;
+ bfd_vma immC = (relocation & 0x00000002) >> 1;
+
+ upper_insn = (upper_insn & 0xffe0) | immA;
+ lower_insn = (lower_insn & 0xf001) | (immC << 11) | (immB << 1);
+ }
+
+ /* Put the relocated value back in the object file: */
+ bfd_put_16 (input_bfd, upper_insn, hit_data);
+ bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
+
+ return bfd_reloc_ok;
+ }
+
default:
return bfd_reloc_notsupported;
}
diff --git a/bfd/libbfd.h b/bfd/libbfd.h
index 02daa29..4a3fa14 100644
--- a/bfd/libbfd.h
+++ b/bfd/libbfd.h
@@ -1530,6 +1530,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
"BFD_RELOC_ARM_PCREL_CALL",
"BFD_RELOC_ARM_PCREL_JUMP",
"BFD_RELOC_THUMB_PCREL_BRANCH5",
+ "BFD_RELOC_ARM_THUMB_BF17",
"BFD_RELOC_THUMB_PCREL_BRANCH7",
"BFD_RELOC_THUMB_PCREL_BRANCH9",
"BFD_RELOC_THUMB_PCREL_BRANCH12",
diff --git a/bfd/reloc.c b/bfd/reloc.c
index a071dc7..b351d12 100644
--- a/bfd/reloc.c
+++ b/bfd/reloc.c
@@ -3020,6 +3020,11 @@ ENUMDOC
ARM 5-bit pc-relative branch for Branch Future instructions.
ENUM
+ BFD_RELOC_ARM_THUMB_BF17
+ENUMDOC
+ ARM 17-bit pc-relative branch for Branch Future instructions.
+
+ENUM
BFD_RELOC_THUMB_PCREL_BRANCH7
ENUMX
BFD_RELOC_THUMB_PCREL_BRANCH9