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| author | Christoph Müllner <christoph.muellner@vrull.eu> | 2023-06-30 22:43:46 +0200 |
|---|---|---|
| committer | Jeff Law <jlaw@ventanamicro> | 2023-07-01 07:28:40 -0600 |
| commit | 9d469329d229da8e2a6d7b70a2be3988aa45a277 (patch) | |
| tree | 1e6e7cbaf08250da688d92b21f32a21f70c614ae /bfd | |
| parent | c0a98a853d5ccde35dca20ad5d7cea0a70e16d56 (diff) | |
| download | fsf-binutils-gdb-9d469329d229da8e2a6d7b70a2be3988aa45a277.zip fsf-binutils-gdb-9d469329d229da8e2a6d7b70a2be3988aa45a277.tar.gz fsf-binutils-gdb-9d469329d229da8e2a6d7b70a2be3988aa45a277.tar.bz2 | |
RISC-V: Add support for the Zvkg ISA extension
Zvkg is part of the vector crypto extensions.
This extension adds the following instructions:
- vghsh.vv
- vgmul.vv
bfd/ChangeLog:
* elfxx-riscv.c (riscv_multi_subset_supports): Add instruction
class support for Zvkg.
(riscv_multi_subset_supports_ext): Likewise.
gas/ChangeLog:
* testsuite/gas/riscv/zvkg.d: New test.
* testsuite/gas/riscv/zvkg.s: New test.
include/ChangeLog:
* opcode/riscv-opc.h (MATCH_VGHSH_VV): New.
(MASK_VGHSH_VV): New.
(MATCH_VGMUL_VV): New.
(MASK_VGMUL_VV): New.
(DECLARE_INSN): New.
* opcode/riscv.h (enum riscv_insn_class): Add instruction class
support for Zvkg.
opcodes/ChangeLog:
* riscv-opc.c: Add Zvkg instructions.
Signed-off-by: Nathan Huckleberry <nhuck@google.com>
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
Diffstat (limited to 'bfd')
| -rw-r--r-- | bfd/elfxx-riscv.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c index 295e0d2..8446149 100644 --- a/bfd/elfxx-riscv.c +++ b/bfd/elfxx-riscv.c @@ -1264,6 +1264,7 @@ static struct riscv_supported_ext riscv_supported_std_z_ext[] = {"zve64d", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, {"zvbb", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, {"zvbc", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, + {"zvkg", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, {"zvl32b", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, {"zvl64b", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, {"zvl128b", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, @@ -2433,6 +2434,8 @@ riscv_multi_subset_supports (riscv_parse_subset_t *rps, return riscv_subset_supports (rps, "zvbb"); case INSN_CLASS_ZVBC: return riscv_subset_supports (rps, "zvbc"); + case INSN_CLASS_ZVKG: + return riscv_subset_supports (rps, "zvkg"); case INSN_CLASS_SVINVAL: return riscv_subset_supports (rps, "svinval"); case INSN_CLASS_H: @@ -2625,6 +2628,8 @@ riscv_multi_subset_supports_ext (riscv_parse_subset_t *rps, return _("zvbb"); case INSN_CLASS_ZVBC: return _("zvbc"); + case INSN_CLASS_ZVKG: + return _("zvkg"); case INSN_CLASS_SVINVAL: return "svinval"; case INSN_CLASS_H: |