Add assembler support for ARMv8-M Mainline

2015-12-24  Thomas Preud'homme  <thomas.preudhomme@arm.com>

bfd/
    (tag_cpu_arch_combine): Adjust v4t_plus_v6_m and comb array to account
    for new TAG_CPU_ARCH_V4T_PLUS_V6_M value.  Deal with NULL values in
    comb array.

binutils/
    * readelf.c (arm_attr_tag_CPU_arch): Add ARMv8-M Mainline Tag_CPU_arch
    value.
    (arm_attr_tag_THUMB_ISA_use): Add ARMv8-M Mainline Tag_THUMB_ISA_use
    value.

gas/
    * config/tc-arm.c (arm_ext_m): Include ARMv8-M.
    (arm_ext_v8m): New feature for ARMv8-M.
    (arm_ext_atomics): New feature for ARMv8 atomics.
    (do_tt): New encoding function for TT* instructions.
    (insns): Add new entries for ARMv8-M specific instructions and
    reorganize the ones shared by ARMv8-M Mainline and ARMv8-A.
    (arm_archs): Define armv8-m.main architecture.
    (cpu_arch_ver): Define ARM_ARCH_V8M_MAIN architecture version and
    clarify the ordering rule.
    (aeabi_set_public_attributes): Use TAG_CPU_ARCH_* macro to refer to
    Tag_CPU_arch values for ARMv7e-M detection.  Add logic to keep setting
    Tag_CPU_arch to ARMv8-A for -march=all.  Also set Tag_CPU_arch_profile
    to 'A' if extension bit for atomic instructions is set, unless it is
    ARMv8-M.  Set Tag_THUMB_ISA_use to 3 for ARMv8-M.  Set Tag_DIV_use to 0
    for ARMv8-M Mainline.

gas/testsuite/
    * gas/arm/archv8m.s: New file.
    * gas/arm/archv8m-main.d: Likewise.
    * gas/arm/attr-march-armv8m.main.d: Likewise.
    * gas/arm/any-armv8m.s: Likewise.
    * gas/arm/any-armv8m.d: Likewise.

include/elf/
    * arm.h (TAG_CPU_ARCH_V8M_MAIN): Declare.
    (MAX_TAG_CPU_ARCH): Define to TAG_CPU_ARCH_V8M_MAIN.
    (TAG_CPU_ARCH_V4T_PLUS_V6_M): Define to unused value 15.

include/opcode/
    * arm.h (ARM_EXT2_ATOMICS): New extension bit.
    (ARM_EXT2_V8M): Likewise.
    (ARM_EXT_V8): Adjust comment with regards to atomics and remove
    mention of legacy use for that bit.
    (ARM_AEXT2_V8_1A): New architecture extension bitfield.
    (ARM_AEXT2_V8_2A): Likewise.
    (ARM_AEXT_V8M_MAIN): Likewise.
    (ARM_AEXT2_V8M): Likewise.
    (ARM_ARCH_V8A): Use ARM_EXT2_ATOMICS for features in second bitfield.
    (ARM_ARCH_V8_1A): Likewise with ARM_AEXT2_V8_1A.
    (ARM_ARCH_V8_2A): Likewise with ARM_AEXT2_V8_2A.
    (ARM_ARCH_V8M_MAIN): New architecture feature bitfield.
    (ARM_ARCH_V8A_FP): Use ARM_EXT2_ATOMICS for features in second bitfield
    and reindent.
    (ARM_ARCH_V8A_SIMD): Likewise.
    (ARM_ARCH_V8A_CRYPTOV1): Likewise.
    (ARM_ARCH_V8_1A_FP): Use ARM_AEXT2_V8_1A to set second bitfield of
    feature bits.
    (ARM_ARCH_V8_1A_SIMD): Likewise.
    (ARM_ARCH_V8_1A_CRYPTOV1): Likewise.

opcodes/
    * arm-dis.c (arm_opcodes): Guard lda, ldab, ldaex, ldaexb, ldaexh, stl,
    stlb, stlh, stlex, stlexb and stlexh by ARM_EXT2_ATOMICS instead of
    ARM_EXT_V8.
    (thumb32_opcodes): Add entries for wide ARMv8-M instructions.

2 files changed, 13 insertions, 1 deletions

diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index e5bedae..aea882b 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,9 @@
+2015-12-24  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	(tag_cpu_arch_combine): Adjust v4t_plus_v6_m and comb array to account
+	for new TAG_CPU_ARCH_V4T_PLUS_V6_M value.  Deal with NULL values in
+	comb array.
+
 2015-12-22 Yury Usishchev <y.usishchev@samsung.com>
 
 	* elf-bfd.h: Add callback to count additional relocations.
diff --git a/bfd/elf32-arm.c b/bfd/elf32-arm.c
index 583db4d..93f32f3 100644
--- a/bfd/elf32-arm.c
+++ b/bfd/elf32-arm.c
@@ -12292,6 +12292,9 @@ tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
       T(V6S_M),		/* V6S_M.  */
       T(V7E_M),		/* V7E_M.  */
       T(V8),		/* V8.  */
+      -1,		/* Unused.  */
+      -1,		/* Unused.  */
+      -1,		/* V8-M MAINLINE.  */
       T(V4T_PLUS_V6_M)	/* V4T plus V6_M.  */
     };
   const int *comb[] =
@@ -12303,6 +12306,9 @@ tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
       v6s_m,
       v7e_m,
       v8,
+      NULL,
+      NULL,
+      NULL,
       /* Pseudo-architecture.  */
       v4t_plus_v6_m
     };
@@ -12335,7 +12341,7 @@ tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
   if (tagh <= TAG_CPU_ARCH_V6KZ)
     return result;
 
-  result = comb[tagh - T(V6T2)][tagl];
+  result = comb[tagh - T(V6T2)] ? comb[tagh - T(V6T2)][tagl] : -1;
 
   /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
      as the canonical version.  */