Add support for mcore RVA relocs.

5 files changed, 58 insertions, 18 deletions

diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 5f86ff0..257b39b 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,20 @@
+1999-05-15  Nick Clifton  <nickc@cygnus.com>
+
+	* reloc.c (BFD_RELOC_MCORE_RVA): Define.
+	* bfd-in2.h: Regenerate.
+	* coff-mcore.c (in_reloc_p): Remove defintion.
+	(mcore_coff_howto): Add IMAGE_REL_MCORE_RVA.
+	(mcore_coff_reloc_type_lookup): Map BFD_RELOC_RVA to
+	IMAGE_REL_MCORE_RVA.
+	(coff_mcore_rtype_to_howto): Add special processing for
+	IMAGE_REL_MCORE_RVA.
+	(coff_mcore_relocate_section): Add support for
+	IMAGE_REL_MCORE_RVA. 
+	* elf32-mcore (mcore_elf_howto_): Add R_MCORE_RELATIVE.
+	(mcore_elf_reloc_type_lookup): Map BFD_RELOC_RVA to
+	R_MCORE_RELATIVE.
+	(mcore_elf_relocate_section): Delete redundant case labels. 
+	
 Fri May 14 10:59:55 1999  Andreas Schwab  <schwab@issan.cs.uni-dortmund.de>
 
 	* elf32-arm.h (elf32_arm_relocate_section): Fix operator
diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
index 860ca35..044e1a5 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -2171,6 +2171,7 @@ short offset into 11 bits. */
   BFD_RELOC_MCORE_PCREL_IMM4BY2,
   BFD_RELOC_MCORE_PCREL_32,
   BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2,
+  BFD_RELOC_MCORE_RVA,
 
 /* These two relocations are used by the linker to determine which of 
 the entries in a C++ virtual function table are actually used.  When
diff --git a/bfd/coff-mcore.c b/bfd/coff-mcore.c
index 0180517..7c44a47 100644
--- a/bfd/coff-mcore.c
+++ b/bfd/coff-mcore.c
@@ -45,8 +45,6 @@ static struct bfd_link_hash_table * coff_mcore_link_hash_table_create
   PARAMS ((bfd *));
 static bfd_reloc_status_type        mcore_coff_unsupported_reloc 
   PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
-static boolean                      in_reloc_p
-  PARAMS ((bfd *, reloc_howto_type *));
 static boolean                      coff_mcore_relocate_section
   PARAMS ((bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *,
 	   struct internal_reloc *, struct internal_syment *, asection **));
@@ -84,7 +82,7 @@ static reloc_howto_type mcore_coff_howto_table[] =
 	 false,	                 /* pc_relative */                          
 	 0,	                 /* bitpos */                               
 	 complain_overflow_dont, /* dont complain_on_overflow */
-	 0,		         /* special_function */                     
+	 NULL,		         /* special_function */                     
 	 "ABSOLUTE",             /* name */
 	 false,	                 /* partial_inplace */                      
 	 0x00,	 	         /* src_mask */                             
@@ -98,7 +96,7 @@ static reloc_howto_type mcore_coff_howto_table[] =
 	 false,	                /* pc_relative */                          
 	 0,	                /* bitpos */                               
 	 complain_overflow_bitfield, /* complain_on_overflow */
-	 0,		        /* special_function */                     
+	 NULL,		        /* special_function */                     
 	 "ADDR32",              /* name */
 	 true,	                /* partial_inplace */                      
 	 0xffffffff,            /* src_mask */                             
@@ -114,7 +112,7 @@ static reloc_howto_type mcore_coff_howto_table[] =
 	 true,			/* pc_relative */
 	 0,			/* bitpos */
 	 complain_overflow_bitfield, /* complain_on_overflow */
-	 mcore_coff_unsupported_reloc,	/* special_function */
+	 mcore_coff_unsupported_reloc, /* special_function */
 	 "IMM8BY4",             /* name */
 	 false,			/* partial_inplace */
 	 0,			/* src_mask */
@@ -146,7 +144,7 @@ static reloc_howto_type mcore_coff_howto_table[] =
 	 true,			/* pc_relative */
 	 0,			/* bitpos */
 	 complain_overflow_bitfield, /* complain_on_overflow */
-	 mcore_coff_unsupported_reloc,/* special_function */
+	 mcore_coff_unsupported_reloc, /* special_function */
 	 "IMM4BY2",              /* name */
 	 false,			/* partial_inplace */
 	 0,			/* src_mask */
@@ -187,6 +185,20 @@ static reloc_howto_type mcore_coff_howto_table[] =
 	 false,			/* partial_inplace */
 	 0x0,			/* src_mask */
 	 0x7ff,			/* dst_mask */
+	 true),			/* pcrel_offset */
+  
+  HOWTO (IMAGE_REL_MCORE_RVA,   /* type */
+	 0,			/* rightshift */
+	 2,			/* size (0 = byte, 1 = short, 2 = long) */
+	 32,			/* bitsize */
+	 false,			/* pc_relative */
+	 0,			/* bitpos */
+	 complain_overflow_signed, /* complain_on_overflow */
+	 NULL,                  /* special_function */
+	 "MCORE_RVA",           /* name */
+	 true,			/* partial_inplace */
+	 0xffffffff,		/* src_mask */
+	 0xffffffff,		/* dst_mask */
 	 true)			/* pcrel_offset */
 };
 
@@ -277,6 +289,7 @@ mcore_coff_reloc_type_lookup (abfd, code)
       HOW2MAP (BFD_RELOC_MCORE_PCREL_IMM4BY2,      IMAGE_REL_MCORE_PCREL_IMM4BY2);
       HOW2MAP (BFD_RELOC_32_PCREL,                 IMAGE_REL_MCORE_PCREL_32);
       HOW2MAP (BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2, IMAGE_REL_MCORE_PCREL_JSR_IMM11BY2);
+      HOW2MAP (BFD_RELOC_RVA,                      IMAGE_REL_MCORE_RVA);
    default: 
       return NULL;
     }
@@ -304,6 +317,9 @@ coff_mcore_rtype_to_howto (abfd, sec, rel, h, sym, addendp)
     return NULL;
   
   howto = mcore_coff_howto_table + rel->r_type;
+
+  if (rel->r_type == IMAGE_REL_MCORE_RVA)
+    * addendp -= pe_data (sec->output_section->owner)->pe_opthdr.ImageBase;
   
   if (howto->pc_relative)
     {
@@ -324,15 +340,6 @@ coff_mcore_rtype_to_howto (abfd, sec, rel, h, sym, addendp)
   return howto;
 }
 
-/* Return true if this relocation should
-   appear in the output .reloc section. */
-static boolean in_reloc_p (abfd, howto)
-     bfd * abfd;
-     reloc_howto_type * howto;
-{
-  return ! howto->pc_relative;
-}     
-
 /* The reloc processing routine for the optimized COFF linker.  */
 static boolean
 coff_mcore_relocate_section (output_bfd, info, input_bfd, input_section,
@@ -492,6 +499,7 @@ coff_mcore_relocate_section (output_bfd, info, input_bfd, input_section,
 	case IMAGE_REL_MCORE_PCREL_32:
 	case IMAGE_REL_MCORE_PCREL_JSR_IMM11BY2:
 	case IMAGE_REL_MCORE_ADDR32:
+	case IMAGE_REL_MCORE_RVA:
 	  rstat = _bfd_relocate_contents (howto, input_bfd, val, loc);
 	  break;
 	}
diff --git a/bfd/elf32-mcore.c b/bfd/elf32-mcore.c
index ef3a39f..0f78002 100644
--- a/bfd/elf32-mcore.c
+++ b/bfd/elf32-mcore.c
@@ -196,6 +196,20 @@ static reloc_howto_type mcore_elf_howto_raw[] =
          0,                     /* src_mask */
          0,                     /* dst_mask */
          false),                /* pcrel_offset */
+  
+  HOWTO (R_MCORE_RELATIVE,      /* type */
+	 0,			/* rightshift */
+	 2,			/* size (0 = byte, 1 = short, 2 = long) */
+	 32,			/* bitsize */
+	 false,			/* pc_relative */
+	 0,			/* bitpos */
+	 complain_overflow_signed, /* complain_on_overflow */
+	 NULL,                  /* special_function */
+	 "R_MCORE_RELATIVE",    /* name */
+	 true,			/* partial_inplace */
+	 0xffffffff,		/* src_mask */
+	 0xffffffff,		/* dst_mask */
+	 true)			/* pcrel_offset */
 };
 
 #ifndef NUM_ELEM
@@ -239,6 +253,7 @@ mcore_elf_reloc_type_lookup (abfd, code)
     case BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2: mcore_reloc = R_MCORE_PCRELJSR_IMM11BY2; break;
     case BFD_RELOC_VTABLE_INHERIT:           mcore_reloc = R_MCORE_GNU_VTINHERIT; break;
     case BFD_RELOC_VTABLE_ENTRY:             mcore_reloc = R_MCORE_GNU_VTENTRY; break;
+    case BFD_RELOC_RVA:                      mcore_reloc = R_MCORE_RELATIVE; break;
     default:
       return (reloc_howto_type *)NULL;
     }
@@ -532,9 +547,6 @@ mcore_elf_relocate_section (output_bfd, info, input_bfd, input_section,
       switch (r_type)
 	{
 	default:
-	case R_MCORE_PCRELIMM8BY4:	
-	case R_MCORE_PCRELIMM11BY2:
-	case R_MCORE_PCRELIMM4BY2:
 	  break;
 
 	case R_MCORE_PCRELJSR_IMM11BY2:
diff --git a/bfd/reloc.c b/bfd/reloc.c
index 8885814..5d141b1 100644
--- a/bfd/reloc.c
+++ b/bfd/reloc.c
@@ -2537,6 +2537,8 @@ ENUMX
   BFD_RELOC_MCORE_PCREL_32
 ENUMX
   BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2
+ENUMX
+  BFD_RELOC_MCORE_RVA
 ENUMDOC
   Motorola Mcore relocations.