Updated ARC assembler from arccores.com

7 files changed, 240 insertions, 209 deletions

diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 613de19..7988d77 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,16 @@
+2001-01-11  Peter Targett  <peter.targett@arccores.com>
+
+	* bfd-in2.h (bfd_architecture): Add bfd_mach_arc_5,
+	bfd_mach_arc_6, bfd_mach_arc_7, bfd_mach_arc_8 for ARC variants.
+	* cpu-arc.c (arch_info_struct): Add entries for variants.
+	(bfd_arc_arch) Set default to bfd_mach_arc_5.
+	(arc_get_mach) Don't assume machine names prefixed arc- before
+	testing.
+	* elf32-arc.c (arc_elf_object_p): Set machine number based on new
+	selections.
+	(arc_elf_final_write_processing) Likewise.
+	(ELF_MACHINE_CODE) Use EM_ARC.
+
 2001-01-10  Nick Clifton  <nickc@redhat.com>
 
 	* coff-arm.c (LOCAL_LABEL_PREFIX): Change definition to "".
diff --git a/bfd/archures.c b/bfd/archures.c
index 5bc744a..84b7744 100644
--- a/bfd/archures.c
+++ b/bfd/archures.c
@@ -222,8 +222,11 @@ DESCRIPTION
 .#define bfd_mach_v850          0
 .#define bfd_mach_v850e 	'E'
 .#define bfd_mach_v850ea	'A'
-.  bfd_arch_arc,       {* Argonaut RISC Core *}
-.#define bfd_mach_arc_base 0
+.  bfd_arch_arc,       {* ARC Cores *}
+.#define bfd_mach_arc_5         0
+.#define bfd_mach_arc_6         1
+.#define bfd_mach_arc_7         2
+.#define bfd_mach_arc_8         3
 .  bfd_arch_m32r,      {* Mitsubishi M32R/D *}
 .#define bfd_mach_m32r		0 {* backwards compatibility *}
 .#define bfd_mach_m32rx		'x'
diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
index 5fe2b47..37d1914 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -813,13 +813,13 @@ bfd_make_readable PARAMS ((bfd *abfd));
 /* Byte swapping macros for user section data.  */
 
 #define bfd_put_8(abfd, val, ptr) \
-                ((void) (*((unsigned char *)(ptr)) = (unsigned char)(val)))
+                ((void) (*((unsigned char *) (ptr)) = (unsigned char) (val)))
 #define bfd_put_signed_8 \
                bfd_put_8
 #define bfd_get_8(abfd, ptr) \
-                (*(unsigned char *)(ptr))
+                (*(unsigned char *) (ptr))
 #define bfd_get_signed_8(abfd, ptr) \
-               ((*(unsigned char *)(ptr) ^ 0x80) - 0x80)
+               ((*(unsigned char *) (ptr) ^ 0x80) - 0x80)
 
 #define bfd_put_16(abfd, val, ptr) \
                 BFD_SEND(abfd, bfd_putx16, ((val),(ptr)))
@@ -1495,8 +1495,11 @@ enum bfd_architecture
 #define bfd_mach_v850          0
 #define bfd_mach_v850e         'E'
 #define bfd_mach_v850ea        'A'
-  bfd_arch_arc,       /* Argonaut RISC Core */
-#define bfd_mach_arc_base 0
+  bfd_arch_arc,       /* ARC Cores */
+#define bfd_mach_arc_5         0
+#define bfd_mach_arc_6         1
+#define bfd_mach_arc_7         2
+#define bfd_mach_arc_8         3
   bfd_arch_m32r,      /* Mitsubishi M32R/D */
 #define bfd_mach_m32r          0 /* backwards compatibility */
 #define bfd_mach_m32rx         'x'
@@ -2218,7 +2221,7 @@ be zero and is not stored in the instruction. */
   BFD_RELOC_THUMB_PCREL_BRANCH12,
   BFD_RELOC_THUMB_PCREL_BRANCH23,
 
-/* Argonaut RISC Core (ARC) relocs.
+/* ARC Cores relocs.
 ARC 22 bit pc-relative branch.  The lowest two bits must be zero and are
 not stored in the instruction.  The high 20 bits are installed in bits 26
 through 7 of the instruction. */
@@ -2407,13 +2410,13 @@ significant 9 bits of the opcode. */
 /* This is an extended address 23-bit reloc for the tms320c54x. */
   BFD_RELOC_TIC54X_23,
 
-/* This is a 16-bit reloc for the tms320c54x, where the least 
-significant 16 bits of a 23-bit extended address are placed into 
+/* This is a 16-bit reloc for the tms320c54x, where the least
+significant 16 bits of a 23-bit extended address are placed into
 the opcode. */
   BFD_RELOC_TIC54X_16_OF_23,
 
 /* This is a reloc for the tms320c54x, where the most
-significant 7 bits of a 23-bit extended address are placed into 
+significant 7 bits of a 23-bit extended address are placed into
 the opcode. */
   BFD_RELOC_TIC54X_MS7_OF_23,
 
diff --git a/bfd/cpu-arc.c b/bfd/cpu-arc.c
index bce59d4..dbd7fb1 100644
--- a/bfd/cpu-arc.c
+++ b/bfd/cpu-arc.c
@@ -24,31 +24,31 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
 
 #define ARC(mach, print_name, default_p, next) \
 {					\
-    32,	/* 32 bits in a word */		\
-    32,	/* 32 bits in an address */	\
-    8,	/* 8 bits in a byte */		\
+    32,	/* 32 bits in a word  */	\
+    32,	/* 32 bits in an address  */	\
+    8,	/* 8 bits in a byte  */		\
     bfd_arch_arc,			\
     mach,				\
     "arc",				\
     print_name,				\
-    4, /* section alignment power */	\
+    4, /* section alignment power  */	\
     default_p,				\
     bfd_default_compatible, 		\
     bfd_default_scan,			\
     next,				\
   }
 
-#if 0 /* ??? Not currently needed, but keep in for future reference.  */
 static const bfd_arch_info_type arch_info_struct[] =
 {
-  ARC (bfd_mach_arc_foo, "arc-foo", false, &arch_info_struct[1]),
-  ARC (bfd_mach_arc_bar, "arc-bar", false, 0),
+  ARC ( bfd_mach_arc_5, "arc5", false, &arch_info_struct[1] ),
+  ARC ( bfd_mach_arc_6, "arc6", false, &arch_info_struct[2] ),
+  ARC ( bfd_mach_arc_7, "arc7", false, &arch_info_struct[3] ),
+  ARC ( bfd_mach_arc_8, "arc8", false, NULL ),
 };
-#endif
 
 const bfd_arch_info_type bfd_arc_arch =
-  ARC (bfd_mach_arc_base, "arc-base", true, 0 /*&arch_info_struct[0]*/);
-
+  ARC ( bfd_mach_arc_5, "arc", true, &arch_info_struct[0] );
+
 /* Utility routines.  */
 
 /* Given cpu type NAME, return its bfd_mach_arc_xxx value.
@@ -61,10 +61,7 @@ arc_get_mach (name)
   const bfd_arch_info_type *p;
 
   for (p = &bfd_arc_arch; p != NULL; p = p->next)
-    {
-      /* +4: skip over "arc-" */
-      if (strcmp (name, p->printable_name + 4) == 0)
-	return p->mach;
-    }
+    if (strcmp (name, p->printable_name) == 0)
+      return p->mach;
   return -1;
 }
diff --git a/bfd/elf32-arc.c b/bfd/elf32-arc.c
index 318dc70..254b346 100644
--- a/bfd/elf32-arc.c
+++ b/bfd/elf32-arc.c
@@ -1,22 +1,22 @@
 /* ARC-specific support for 32-bit ELF
-   Copyright (C) 1994, 1995, 1997, 1999 Free Software Foundation, Inc.
+   Copyright (C) 1994, 1995, 1997, 1999, 2000 Free Software Foundation, Inc.
    Contributed by Doug Evans (dje@cygnus.com).
 
-This file is part of BFD, the Binary File Descriptor library.
+   This file is part of BFD, the Binary File Descriptor library.
 
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2 of the License, or
-(at your option) any later version.
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
 
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
 
-You should have received a copy of the GNU General Public License
-along with this program; if not, write to the Free Software
-Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
 
 #include "bfd.h"
 #include "sysdep.h"
@@ -25,77 +25,80 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
 #include "elf/arc.h"
 
 static reloc_howto_type *bfd_elf32_bfd_reloc_type_lookup
- PARAMS ((bfd *abfd, bfd_reloc_code_real_type code));
+  PARAMS ((bfd *abfd, bfd_reloc_code_real_type code));
 static void arc_info_to_howto_rel
   PARAMS ((bfd *, arelent *, Elf32_Internal_Rel *));
-static boolean arc_elf_object_p PARAMS ((bfd *));
-static void arc_elf_final_write_processing PARAMS ((bfd *, boolean));
+static boolean arc_elf_object_p
+  PARAMS ((bfd *));
+static void arc_elf_final_write_processing
+  PARAMS ((bfd *, boolean));
 
 /* Try to minimize the amount of space occupied by relocation tables
    on the ROM (not that the ROM won't be swamped by other ELF overhead).  */
+
 #define USE_REL
 
 static reloc_howto_type elf_arc_howto_table[] =
 {
   /* This reloc does nothing.  */
-  HOWTO (R_ARC_NONE,		/* type */
-	 0,			/* rightshift */
-	 2,			/* size (0 = byte, 1 = short, 2 = long) */
-	 32,			/* bitsize */
-	 false,			/* pc_relative */
-	 0,			/* bitpos */
-	 complain_overflow_bitfield, /* complain_on_overflow */
-	 bfd_elf_generic_reloc,	/* special_function */
-	 "R_ARC_NONE",		/* name */
-	 false,			/* partial_inplace */
-	 0,			/* src_mask */
-	 0,			/* dst_mask */
-	 false),		/* pcrel_offset */
+  HOWTO (R_ARC_NONE,		/* type  */
+	 0,			/* rightshift  */
+	 2,			/* size (0 = byte, 1 = short, 2 = long)  */
+	 32,			/* bitsize  */
+	 false,			/* pc_relative  */
+	 0,			/* bitpos  */
+	 complain_overflow_bitfield, /* complain_on_overflow  */
+	 bfd_elf_generic_reloc,	/* special_function  */
+	 "R_ARC_NONE",		/* name  */
+	 false,			/* partial_inplace  */
+	 0,			/* src_mask  */
+	 0,			/* dst_mask  */
+	 false),		/* pcrel_offset  */
 
   /* A standard 32 bit relocation.  */
-  HOWTO (R_ARC_32,		/* type */
-	 0,	                /* rightshift */
-	 2,	                /* size (0 = byte, 1 = short, 2 = long) */
-	 32,	                /* bitsize */
-	 false,	                /* pc_relative */
-	 0,	                /* bitpos */
-	 complain_overflow_bitfield, /* complain_on_overflow */
-	 bfd_elf_generic_reloc, /* special_function */
-	 "R_ARC_32",		/* name */
-	 false,	                /* partial_inplace */
-	 0xffffffff,	        /* src_mask */
-	 0xffffffff,   		/* dst_mask */
-	 false),                /* pcrel_offset */
+  HOWTO (R_ARC_32,		/* type  */
+	 0,	                /* rightshift  */
+	 2,	                /* size (0 = byte, 1 = short, 2 = long)  */
+	 32,	                /* bitsize  */
+	 false,	                /* pc_relative  */
+	 0,	                /* bitpos  */
+	 complain_overflow_bitfield, /* complain_on_overflow  */
+	 bfd_elf_generic_reloc, /* special_function  */
+	 "R_ARC_32",		/* name  */
+	 false,	                /* partial_inplace  */
+	 0xffffffff,	        /* src_mask  */
+	 0xffffffff,   		/* dst_mask  */
+	 false),                /* pcrel_offset  */
 
   /* A 26 bit absolute branch, right shifted by 2.  */
-  HOWTO (R_ARC_B26,		/* type */
-	 2,			/* rightshift */
-	 2,			/* size (0 = byte, 1 = short, 2 = long) */
-	 26,			/* bitsize */
-	 false,			/* pc_relative */
-	 0,			/* bitpos */
-	 complain_overflow_bitfield, /* complain_on_overflow */
-	 bfd_elf_generic_reloc,	/* special_function */
-	 "R_ARC_B26",		/* name */
-	 false,			/* partial_inplace */
-	 0x00ffffff,		/* src_mask */
-	 0x00ffffff,		/* dst_mask */
-	 false),		/* pcrel_offset */
+  HOWTO (R_ARC_B26,		/* type  */
+	 2,			/* rightshift  */
+	 2,			/* size (0 = byte, 1 = short, 2 = long)  */
+	 26,			/* bitsize  */
+	 false,			/* pc_relative  */
+	 0,			/* bitpos  */
+	 complain_overflow_bitfield, /* complain_on_overflow  */
+	 bfd_elf_generic_reloc,	/* special_function  */
+	 "R_ARC_B26",		/* name  */
+	 false,			/* partial_inplace  */
+	 0x00ffffff,		/* src_mask  */
+	 0x00ffffff,		/* dst_mask  */
+	 false),		/* pcrel_offset  */
 
   /* A relative 22 bit branch; bits 21-2 are stored in bits 26-7.  */
-  HOWTO (R_ARC_B22_PCREL,	/* type */
-	 2,			/* rightshift */
-	 2,			/* size (0 = byte, 1 = short, 2 = long) */
-	 22,			/* bitsize */
-	 true,			/* pc_relative */
-	 7,			/* bitpos */
-	 complain_overflow_signed, /* complain_on_overflow */
-	 bfd_elf_generic_reloc,	/* special_function */
-	 "R_ARC_B22_PCREL",	/* name */
-	 false,			/* partial_inplace */
-	 0x07ffff80,		/* src_mask */
-	 0x07ffff80,		/* dst_mask */
-	 true),			/* pcrel_offset */
+  HOWTO (R_ARC_B22_PCREL,	/* type  */
+	 2,			/* rightshift  */
+	 2,			/* size (0 = byte, 1 = short, 2 = long)  */
+	 22,			/* bitsize  */
+	 true,			/* pc_relative  */
+	 7,			/* bitpos  */
+	 complain_overflow_signed, /* complain_on_overflow  */
+	 bfd_elf_generic_reloc,	/* special_function  */
+	 "R_ARC_B22_PCREL",	/* name  */
+	 false,			/* partial_inplace  */
+	 0x07ffff80,		/* src_mask  */
+	 0x07ffff80,		/* dst_mask  */
+	 true),			/* pcrel_offset  */
 
 };
 
@@ -123,14 +126,11 @@ bfd_elf32_bfd_reloc_type_lookup (abfd, code)
 {
   unsigned int i;
 
-  for (i = 0;
-       i < sizeof (arc_reloc_map) / sizeof (struct arc_reloc_map);
-       i++)
+  for (i = 0; i < sizeof (arc_reloc_map) / sizeof (struct arc_reloc_map); i++)
     {
       if (arc_reloc_map[i].bfd_reloc_val == code)
 	return &elf_arc_howto_table[arc_reloc_map[i].elf_reloc_val];
     }
-
   return NULL;
 }
 
@@ -155,21 +155,30 @@ static boolean
 arc_elf_object_p (abfd)
      bfd *abfd;
 {
-  int mach;
-  unsigned long arch = elf_elfheader (abfd)->e_flags & EF_ARC_MACH;
+  int mach = bfd_mach_arc_5;
 
-  switch (arch)
+  if (elf_elfheader(abfd)->e_machine == EM_ARC)
     {
-    case E_ARC_MACH_BASE:
-      mach = bfd_mach_arc_base;
-      break;
-    default:
-      /* Unknown cpu type.  ??? What to do?  */
-      return false;
+      unsigned long arch = elf_elfheader (abfd)->e_flags & EF_ARC_MACH;
+
+      switch (arch)
+	{
+	default:
+	case E_ARC_MACH_ARC5:
+	  mach = bfd_mach_arc_5;
+	  break;
+	case E_ARC_MACH_ARC6:
+	  mach = bfd_mach_arc_6;
+	  break;
+	case E_ARC_MACH_ARC7:
+	  mach = bfd_mach_arc_7;
+	  break;
+	case E_ARC_MACH_ARC8:
+	  mach = bfd_mach_arc_8;
+	  break;
+	}
     }
-
-  (void) bfd_default_set_arch_mach (abfd, bfd_arch_arc, mach);
-  return true;
+  return bfd_default_set_arch_mach (abfd, bfd_arch_arc, mach);
 }
 
 /* The final processing done just before writing out an ARC ELF object file.
@@ -180,34 +189,40 @@ arc_elf_final_write_processing (abfd, linker)
      bfd *abfd;
      boolean linker ATTRIBUTE_UNUSED;
 {
-  int mach;
   unsigned long val;
 
-  switch (mach = bfd_get_mach (abfd))
+  switch (bfd_get_mach (abfd))
     {
-    case bfd_mach_arc_base:
-      val = E_ARC_MACH_BASE;
-      break;
     default:
-      return;
+    case bfd_mach_arc_5:
+      val = E_ARC_MACH_ARC5;
+      break;
+    case bfd_mach_arc_6:
+      val = E_ARC_MACH_ARC6;
+      break;
+    case bfd_mach_arc_7:
+      val = E_ARC_MACH_ARC7;
+      break;
+    case bfd_mach_arc_8:
+      val = E_ARC_MACH_ARC8;
+      break;
     }
-
+  elf_elfheader (abfd)->e_machine = EM_ARC;
   elf_elfheader (abfd)->e_flags &=~ EF_ARC_MACH;
   elf_elfheader (abfd)->e_flags |= val;
 }
 
-#define TARGET_LITTLE_SYM	bfd_elf32_littlearc_vec
-#define TARGET_LITTLE_NAME	"elf32-littlearc"
-#define TARGET_BIG_SYM		bfd_elf32_bigarc_vec
-#define TARGET_BIG_NAME		"elf32-bigarc"
-#define ELF_ARCH		bfd_arch_arc
-#define ELF_MACHINE_CODE	EM_CYGNUS_ARC
-#define ELF_MAXPAGESIZE		0x1000
-
-#define elf_info_to_howto	0
-#define elf_info_to_howto_rel	arc_info_to_howto_rel
-#define elf_backend_object_p	arc_elf_object_p
-#define elf_backend_final_write_processing \
-				arc_elf_final_write_processing
+#define TARGET_LITTLE_SYM bfd_elf32_littlearc_vec
+#define TARGET_LITTLE_NAME "elf32-littlearc"
+#define TARGET_BIG_SYM bfd_elf32_bigarc_vec
+#define TARGET_BIG_NAME	"elf32-bigarc"
+#define ELF_ARCH bfd_arch_arc
+#define ELF_MACHINE_CODE EM_ARC
+#define ELF_MAXPAGESIZE	0x1000
+
+#define elf_info_to_howto 0
+#define elf_info_to_howto_rel arc_info_to_howto_rel
+#define elf_backend_object_p arc_elf_object_p
+#define elf_backend_final_write_processing arc_elf_final_write_processing
 
 #include "elf32-target.h"
diff --git a/bfd/po/bfd.pot b/bfd/po/bfd.pot
index bf17e1d..e77b05d 100644
--- a/bfd/po/bfd.pot
+++ b/bfd/po/bfd.pot
@@ -6,7 +6,7 @@
 msgid ""
 msgstr ""
 "Project-Id-Version: PACKAGE VERSION\n"
-"POT-Creation-Date: 2000-12-21 10:38-0800\n"
+"POT-Creation-Date: 2001-01-11 11:54-0800\n"
 "PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n"
 "Last-Translator: FULL NAME <EMAIL@ADDRESS>\n"
 "Language-Team: LANGUAGE <LL@li.org>\n"
@@ -375,7 +375,7 @@ msgstr ""
 msgid "uncertain calling convention for non-COFF symbol"
 msgstr ""
 
-#: cofflink.c:526 elflink.h:1649
+#: cofflink.c:526 elflink.h:1648
 #, c-format
 msgid "Warning: type of symbol `%s' changed from %d to %d in %s"
 msgstr ""
@@ -1276,7 +1276,7 @@ msgstr ""
 msgid "%s: unsupported relocation type %s"
 msgstr ""
 
-#: elfcode.h:1076
+#: elfcode.h:1084
 #, c-format
 msgid "%s: version count (%ld) does not match symbol count (%ld)"
 msgstr ""
@@ -1286,37 +1286,37 @@ msgstr ""
 msgid "%s: Section %s is already to large to put hole of %ld bytes in"
 msgstr ""
 
-#: elflink.h:1466
+#: elflink.h:1465
 #, c-format
 msgid "%s: %s: invalid version %u (max %d)"
 msgstr ""
 
-#: elflink.h:1507
+#: elflink.h:1506
 #, c-format
 msgid "%s: %s: invalid needed version %d"
 msgstr ""
 
-#: elflink.h:1627
+#: elflink.h:1626
 #, c-format
 msgid "Warning: size of symbol `%s' changed from %lu to %lu in %s"
 msgstr ""
 
-#: elflink.h:1873
+#: elflink.h:1872
 #, c-format
 msgid "%s: warning: unexpected redefinition of `%s'"
 msgstr ""
 
-#: elflink.h:3660
+#: elflink.h:3659
 #, c-format
 msgid "warning: type and size of dynamic symbol `%s' are not defined"
 msgstr ""
 
-#: elflink.h:3932
+#: elflink.h:3931
 #, c-format
 msgid "%s: undefined versioned symbol name %s"
 msgstr ""
 
-#: elflink.h:5181
+#: elflink.h:5180
 #, c-format
 msgid "%s: could not find output section %s for input section %s"
 msgstr ""
@@ -1416,26 +1416,26 @@ msgstr ""
 msgid "%s: address 0x%s out of range for Intex Hex file"
 msgstr ""
 
-#: libbfd.c:484
+#: libbfd.c:471
 #, c-format
 msgid "not mapping: data=%lx mapped=%d\n"
 msgstr ""
 
-#: libbfd.c:487
+#: libbfd.c:474
 msgid "not mapping: env var not set\n"
 msgstr ""
 
-#: libbfd.c:1383
+#: libbfd.c:1370
 #, c-format
 msgid "%s: compiled for a big endian system and target is little endian"
 msgstr ""
 
-#: libbfd.c:1385
+#: libbfd.c:1372
 #, c-format
 msgid "%s: compiled for a little endian system and target is big endian"
 msgstr ""
 
-#: linker.c:2679
+#: linker.c:2678
 #, c-format
 msgid "Attempt to do relocateable link with %s input and %s output"
 msgstr ""
@@ -1451,39 +1451,39 @@ msgid "Unhandled OSF/1 core file section type %d\n"
 msgstr ""
 
 #. XXX code yet to be written.
-#: peicode.h:809
+#: peicode.h:807
 #, c-format
 msgid "%s: Unhandled import type; %x"
 msgstr ""
 
-#: peicode.h:814
+#: peicode.h:812
 #, c-format
 msgid "%s: Unrecognised import type; %x"
 msgstr ""
 
-#: peicode.h:828
+#: peicode.h:826
 #, c-format
 msgid "%s: Unrecognised import name type; %x"
 msgstr ""
 
-#: peicode.h:1185
+#: peicode.h:1183
 #, c-format
 msgid "%s: Unrecognised machine type (0x%x) in Import Library Format archive"
 msgstr ""
 
-#: peicode.h:1197
+#: peicode.h:1195
 #, c-format
 msgid ""
 "%s: Recognised but unhandled machine type (0x%x) in Import Library Format "
 "archive"
 msgstr ""
 
-#: peicode.h:1214
+#: peicode.h:1212
 #, c-format
 msgid "%s: size field is zero in Import Library Format header"
 msgstr ""
 
-#: peicode.h:1242
+#: peicode.h:1240
 #, c-format
 msgid "%s: string not null terminated in ILF object file."
 msgstr ""
@@ -1787,7 +1787,7 @@ msgid ""
 "Characteristics 0x%x\n"
 msgstr ""
 
-#: pe-mips.c:657
+#: pe-mips.c:653
 #, c-format
 msgid "%s: `ld -r' not supported with PE MIPS objects\n"
 msgstr ""
@@ -1797,17 +1797,17 @@ msgstr ""
 #. mem = pointer to memory we're fixing up
 #. val = VMA of what we need to refer to
 #.
-#: pe-mips.c:794
+#: pe-mips.c:789
 #, c-format
 msgid "%s: unimplemented %s\n"
 msgstr ""
 
-#: pe-mips.c:820
+#: pe-mips.c:815
 #, c-format
 msgid "%s: jump too far away\n"
 msgstr ""
 
-#: pe-mips.c:847
+#: pe-mips.c:842
 #, c-format
 msgid "%s: bad pair/reflo after refhi\n"
 msgstr ""
@@ -1860,7 +1860,7 @@ msgstr ""
 msgid "Partition[%d] length = 0x%.8lx (%ld)\n"
 msgstr ""
 
-#: som.c:5365
+#: som.c:5355
 msgid "som_sizeof_headers unimplemented"
 msgstr ""
 
@@ -1873,149 +1873,149 @@ msgstr ""
 msgid "Unsupported .stab relocation"
 msgstr ""
 
-#: vms-gsd.c:357
+#: vms-gsd.c:354
 #, c-format
 msgid "bfd_make_section (%s) failed"
 msgstr ""
 
-#: vms-gsd.c:371
+#: vms-gsd.c:368
 #, c-format
 msgid "bfd_set_section_flags (%s, %x) failed"
 msgstr ""
 
-#: vms-gsd.c:407
+#: vms-gsd.c:404
 #, c-format
 msgid "Size mismatch section %s=%lx, %s=%lx"
 msgstr ""
 
-#: vms-gsd.c:702
+#: vms-gsd.c:699
 #, c-format
 msgid "unknown gsd/egsd subtype %d"
 msgstr ""
 
-#: vms-hdr.c:408
+#: vms-hdr.c:403
 msgid "Object module NOT error-free !\n"
 msgstr ""
 
-#: vms-misc.c:545
+#: vms-misc.c:539
 #, c-format
 msgid "Stack overflow (%d) in _bfd_vms_push"
 msgstr ""
 
-#: vms-misc.c:564
+#: vms-misc.c:557
 msgid "Stack underflow in _bfd_vms_pop"
 msgstr ""
 
-#: vms-misc.c:935
+#: vms-misc.c:915
 msgid "_bfd_vms_output_counted called with zero bytes"
 msgstr ""
 
-#: vms-misc.c:940
+#: vms-misc.c:920
 msgid "_bfd_vms_output_counted called with too many bytes"
 msgstr ""
 
-#: vms-misc.c:1073
+#: vms-misc.c:1051
 #, c-format
 msgid "Symbol %s replaced by %s\n"
 msgstr ""
 
-#: vms-misc.c:1137
+#: vms-misc.c:1113
 #, c-format
 msgid "failed to enter %s"
 msgstr ""
 
-#: vms-tir.c:69
+#: vms-tir.c:68
 msgid "No Mem !"
 msgstr ""
 
-#: vms-tir.c:309
+#: vms-tir.c:302
 msgid "Bad section index in ETIR_S_C_STA_PQ"
 msgstr ""
 
-#: vms-tir.c:324
+#: vms-tir.c:317
 #, c-format
 msgid "Unsupported STA cmd %d"
 msgstr ""
 
-#: vms-tir.c:329 vms-tir.c:1287
+#: vms-tir.c:322 vms-tir.c:1274
 #, c-format
 msgid "Reserved STA cmd %d"
 msgstr ""
 
-#: vms-tir.c:436
+#: vms-tir.c:428
 #, c-format
 msgid "ETIR_S_C_STO_GBL: no symbol \"%s\""
 msgstr ""
 
-#: vms-tir.c:457
+#: vms-tir.c:449
 #, c-format
 msgid "ETIR_S_C_STO_CA: no symbol \"%s\""
 msgstr ""
 
-#: vms-tir.c:470
+#: vms-tir.c:462
 msgid "ETIR_S_C_STO_RB/AB: Not supported"
 msgstr ""
 
-#: vms-tir.c:528
+#: vms-tir.c:520
 msgid "ETIR_S_C_STO_LP_PSB: Not supported"
 msgstr ""
 
-#: vms-tir.c:534
+#: vms-tir.c:526
 msgid "ETIR_S_C_STO_HINT_GBL: not implemented"
 msgstr ""
 
-#: vms-tir.c:540
+#: vms-tir.c:532
 msgid "ETIR_S_C_STO_HINT_PS: not implemented"
 msgstr ""
 
-#: vms-tir.c:544 vms-tir.c:1460
+#: vms-tir.c:536 vms-tir.c:1446
 #, c-format
 msgid "Reserved STO cmd %d"
 msgstr ""
 
-#: vms-tir.c:657
+#: vms-tir.c:649
 msgid "ETIR_S_C_OPR_INSV: Not supported"
 msgstr ""
 
-#: vms-tir.c:675
+#: vms-tir.c:667
 msgid "ETIR_S_C_OPR_USH: Not supported"
 msgstr ""
 
-#: vms-tir.c:681
+#: vms-tir.c:673
 msgid "ETIR_S_C_OPR_ROT: Not supported"
 msgstr ""
 
-#: vms-tir.c:700
+#: vms-tir.c:692
 msgid "ETIR_S_C_OPR_REDEF: Not supported"
 msgstr ""
 
-#: vms-tir.c:706
+#: vms-tir.c:698
 msgid "ETIR_S_C_OPR_DFLIT: Not supported"
 msgstr ""
 
-#: vms-tir.c:710 vms-tir.c:1656
+#: vms-tir.c:702 vms-tir.c:1641
 #, c-format
 msgid "Reserved OPR cmd %d"
 msgstr ""
 
-#: vms-tir.c:779 vms-tir.c:1726
+#: vms-tir.c:770 vms-tir.c:1710
 #, c-format
 msgid "Reserved CTL cmd %d"
 msgstr ""
 
-#: vms-tir.c:808
+#: vms-tir.c:798
 msgid "ETIR_S_C_STC_LP: not supported"
 msgstr ""
 
-#: vms-tir.c:826
+#: vms-tir.c:816
 msgid "ETIR_S_C_STC_GBL: not supported"
 msgstr ""
 
-#: vms-tir.c:834
+#: vms-tir.c:824
 msgid "ETIR_S_C_STC_GCA: not supported"
 msgstr ""
 
-#: vms-tir.c:843
+#: vms-tir.c:833
 msgid "ETIR_S_C_STC_PS: not supported"
 msgstr ""
 
@@ -2024,11 +2024,11 @@ msgstr ""
 #. * arg: -
 #. *
 #.
-#: vms-tir.c:1187
+#: vms-tir.c:1174
 msgid "Stack-from-image not implemented"
 msgstr ""
 
-#: vms-tir.c:1207
+#: vms-tir.c:1194
 msgid "Stack-entry-mask not fully implemented"
 msgstr ""
 
@@ -2041,76 +2041,76 @@ msgstr ""
 #. * compare argument descriptor with symbol argument (ARG$V_PASSMECH)
 #. * and stack TRUE (args match) or FALSE (args dont match) value
 #.
-#: vms-tir.c:1223
+#: vms-tir.c:1210
 msgid "PASSMECH not fully implemented"
 msgstr ""
 
-#: vms-tir.c:1243
+#: vms-tir.c:1230
 msgid "Stack-local-symbol not fully implemented"
 msgstr ""
 
-#: vms-tir.c:1258
+#: vms-tir.c:1245
 msgid "Stack-literal not fully implemented"
 msgstr ""
 
-#: vms-tir.c:1280
+#: vms-tir.c:1267
 msgid "Stack-local-symbol-entry-point-mask not fully implemented"
 msgstr ""
 
-#: vms-tir.c:1456
+#: vms-tir.c:1442
 #, c-format
 msgid "Unimplemented STO cmd %d"
 msgstr ""
 
-#: vms-tir.c:1596
+#: vms-tir.c:1581
 msgid "TIR_S_C_OPR_ASH incomplete"
 msgstr ""
 
-#: vms-tir.c:1610
+#: vms-tir.c:1595
 msgid "TIR_S_C_OPR_USH incomplete"
 msgstr ""
 
-#: vms-tir.c:1624
+#: vms-tir.c:1609
 msgid "TIR_S_C_OPR_ROT incomplete"
 msgstr ""
 
 #.
 #. * redefine symbol to current location
 #.
-#: vms-tir.c:1645
+#: vms-tir.c:1630
 msgid "TIR_S_C_OPR_REDEF not supported"
 msgstr ""
 
 #.
 #. * define a literal
 #.
-#: vms-tir.c:1652
+#: vms-tir.c:1637
 msgid "TIR_S_C_OPR_DFLIT not supported"
 msgstr ""
 
-#: vms-tir.c:1707
+#: vms-tir.c:1691
 msgid "TIR_S_C_CTL_DFLOC not fully implemented"
 msgstr ""
 
-#: vms-tir.c:1715
+#: vms-tir.c:1699
 msgid "TIR_S_C_CTL_STLOC not fully implemented"
 msgstr ""
 
-#: vms-tir.c:1723
+#: vms-tir.c:1707
 msgid "TIR_S_C_CTL_STKDL not fully implemented"
 msgstr ""
 
-#: vms-tir.c:1778
+#: vms-tir.c:1761
 #, c-format
 msgid "Obj code %d not found"
 msgstr ""
 
-#: vms-tir.c:2127
+#: vms-tir.c:2102
 #, c-format
 msgid "SEC_RELOC with no relocs in section %s"
 msgstr ""
 
-#: vms-tir.c:2401
+#: vms-tir.c:2376
 #, c-format
 msgid "Unhandled relocation %s"
 msgstr ""
diff --git a/bfd/reloc.c b/bfd/reloc.c
index f3ac667..f37a6a9 100644
--- a/bfd/reloc.c
+++ b/bfd/reloc.c
@@ -2336,7 +2336,7 @@ ENUMDOC
 ENUM
   BFD_RELOC_ARC_B22_PCREL
 ENUMDOC
-  Argonaut RISC Core (ARC) relocs.
+  ARC Cores relocs.
   ARC 22 bit pc-relative branch.  The lowest two bits must be zero and are
   not stored in the instruction.  The high 20 bits are installed in bits 26
   through 7 of the instruction.