aboutsummaryrefslogtreecommitdiff
path: root/bfd/cpu-avr.c
diff options
context:
space:
mode:
authorBarney Stratford <barney_stratford@fastmail.fm>2014-07-01 10:20:17 +0100
committerNick Clifton <nickc@redhat.com>2014-07-01 10:20:17 +0100
commitf36e88862f94c15a88fa27df7af906ad75a42e7f (patch)
tree9add52ee9bff834949cac235d41b733efd326d4e /bfd/cpu-avr.c
parentba8e7d1e24bc53269b5814c99a321783dab3812a (diff)
downloadfsf-binutils-gdb-f36e88862f94c15a88fa27df7af906ad75a42e7f.zip
fsf-binutils-gdb-f36e88862f94c15a88fa27df7af906ad75a42e7f.tar.gz
fsf-binutils-gdb-f36e88862f94c15a88fa27df7af906ad75a42e7f.tar.bz2
Add support for the AVR Tiny series of microcontrollers.
* archures.c: add avrtiny architecture for avr target. * bfd-in2.h: Regenerate. * cpu-avr.c (arch_info_struct): add avrtiny arch info. * elf32-avr.c (elf_avr_howto_table): new relocation R_AVR_LDS_STS_16 added for 16 bit LDS/STS instruction of avrtiny arch. (avr_reloc_map): reloc R_AVR_LDS_STS_16 is mapped to BFD_RELOC_AVR_LDS_STS_16. (bfd_elf_avr_final_write_processing): select machine number avrtiny arch. (elf32_avr_object_p): set machine number for avrtiny arch. * libbfd.h: Regenerate. * reloc.c: Add documentation for BFD_RELOC_AVR_LDS_STS_16 reloc. * config/tc-avr.c (mcu_types): Add avrtiny arch. Add avrtiny arch devices attiny4, attiny5, attiny9, attiny10, attiny20 and attiny40. (md_show_usage): Add avrtiny arch in usage message. (avr_operand): validate and issue error for invalid register for avrtiny. add new reloc exp for 16 bit lds/sts instruction. (md_apply_fix): check 16 bit lds/sts operand for out of range and encode. (md_assemble): check ISA for arch and issue diagnostic. * include/elf/avr.h (E_AVR_MACH_AVRTINY): define avrtiny machine number. (R_AVR_LDS_STS_16): define 16 bit lds/sts reloc number. * include/opcode/avr.h (AVR_ISA_TINY): define avrtiny specific ISA. (AVR_ISA_2xxxa): define ISA without LPM. (AVR_ISA_AVRTINY): define avrtiny arch ISA. Add doc for contraint used in 16 bit lds/sts. Adjust ISA group for icall, ijmp, pop and push. Add 16 bit lds/sts encoding and update 32 bit lds/sts constraints. * opcodes/avr-dis.c (avr_operand): Handle constraint j for 16 bit lds/sts. (print_insn_avr): do not select opcode if insn ISA is avrtiny and machine is not avrtiny. * Makefile.am (ALL_EMULATION_SOURCES): add avrtiny emulation source. (eavrtiny.c): add rules for avrtiny emulation source. * Makefile.in: Regenerate. * configure.tgt: Add avrtiny to avr target emulations. * scripttempl/avrtiny.sc: New file. linker script template for avrtiny arch. * emulparams/avrtiny.sh: New file. emulation parameters for avrtiny arch.
Diffstat (limited to 'bfd/cpu-avr.c')
-rw-r--r--bfd/cpu-avr.c43
1 files changed, 22 insertions, 21 deletions
diff --git a/bfd/cpu-avr.c b/bfd/cpu-avr.c
index 060c9a2..d3da25a 100644
--- a/bfd/cpu-avr.c
+++ b/bfd/cpu-avr.c
@@ -67,7 +67,6 @@ compatible (const bfd_arch_info_type * a,
return a;
if (a->mach == bfd_mach_avr31 && b->mach == bfd_mach_avr3)
return b;
-
if (a->mach == bfd_mach_avr3 && b->mach == bfd_mach_avr35)
return a;
if (a->mach == bfd_mach_avr35 && b->mach == bfd_mach_avr3)
@@ -78,7 +77,6 @@ compatible (const bfd_arch_info_type * a,
if (a->mach == bfd_mach_avr51 && b->mach == bfd_mach_avr5)
return b;
-
return NULL;
}
@@ -135,25 +133,28 @@ static const bfd_arch_info_type arch_info_struct[] =
/* 3-Byte PC. */
N (22, bfd_mach_avr6, "avr:6", FALSE, & arch_info_struct[10]),
- /* Xmega 1 */
- N (24, bfd_mach_avrxmega1, "avr:101", FALSE, & arch_info_struct[11]),
-
- /* Xmega 2 */
- N (24, bfd_mach_avrxmega2, "avr:102", FALSE, & arch_info_struct[12]),
-
- /* Xmega 3 */
- N (24, bfd_mach_avrxmega3, "avr:103", FALSE, & arch_info_struct[13]),
-
- /* Xmega 4 */
- N (24, bfd_mach_avrxmega4, "avr:104", FALSE, & arch_info_struct[14]),
-
- /* Xmega 5 */
- N (24, bfd_mach_avrxmega5, "avr:105", FALSE, & arch_info_struct[15]),
-
- /* Xmega 6 */
- N (24, bfd_mach_avrxmega6, "avr:106", FALSE, & arch_info_struct[16]),
-
- /* Xmega 7 */
+ /* Tiny core (AVR Tiny). */
+ N (16, bfd_mach_avrtiny, "avr:100", FALSE, & arch_info_struct[11]),
+
+ /* Xmega 1. */
+ N (24, bfd_mach_avrxmega1, "avr:101", FALSE, & arch_info_struct[12]),
+
+ /* Xmega 2. */
+ N (24, bfd_mach_avrxmega2, "avr:102", FALSE, & arch_info_struct[13]),
+
+ /* Xmega 3. */
+ N (24, bfd_mach_avrxmega3, "avr:103", FALSE, & arch_info_struct[14]),
+
+ /* Xmega 4. */
+ N (24, bfd_mach_avrxmega4, "avr:104", FALSE, & arch_info_struct[15]),
+
+ /* Xmega 5. */
+ N (24, bfd_mach_avrxmega5, "avr:105", FALSE, & arch_info_struct[16]),
+
+ /* Xmega 6. */
+ N (24, bfd_mach_avrxmega6, "avr:106", FALSE, & arch_info_struct[17]),
+
+ /* Xmega 7. */
N (24, bfd_mach_avrxmega7, "avr:107", FALSE, NULL)
};