BFD whitespace fixes

Binutils is supposed to use tabs.  In my git config I have
whitespace = indent-with-non-tab,space-before-tab,trailing-space
and I got annoyed enough seeing red in "git diff" output to fix
the problems.

	* doc/header.sed: Trim trailing space when splitting lines.
	* aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c,
	* aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h,
	* arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c,
	* archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c,
	* bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c,
	* coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c,
	* coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c,
	* coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c,
	* coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c,
	* coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c,
	* coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c,
	* coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c,
	* cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c,
	* cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c,
	* cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c,
	* cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c,
	* cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c,
	* cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c,
	* cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c,
	* ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c,
	* elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c,
	* elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c,
	* elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h,
	* elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c,
	* elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c,
	* elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c,
	* elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c,
	* elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c,
	* elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c,
	* elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c,
	* elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c,
	* elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c,
	* elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c,
	* elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c,
	* elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h,
	* elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c,
	* elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c,
	* elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c,
	* elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c,
	* elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c,
	* elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c,
	* elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c,
	* elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h,
	* elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c,
	* elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c,
	* elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c,
	* elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c,
	* host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c,
	* i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c,
	* i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h,
	* libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h,
	* libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c,
	* m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c,
	* mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c,
	* mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h,
	* netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c,
	* nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c,
	* opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c,
	* pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c,
	* pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c,
	* peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c,
	* riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h,
	* sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c,
	* syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c,
	* vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c,
	* vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c,
	* xsym.c, * xsym.h: Whitespace fixes.
	* bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.

1 files changed, 269 insertions, 269 deletions

diff --git a/bfd/archures.c b/bfd/archures.c
index bd5f933..4b3aef6 100644
--- a/bfd/archures.c
+++ b/bfd/archures.c
@@ -70,62 +70,62 @@ DESCRIPTION
 .{
 .  bfd_arch_unknown,   {* File arch not known.  *}
 .  bfd_arch_obscure,   {* Arch known, not one of these.  *}
-.  bfd_arch_m68k,      {* Motorola 68xxx *}
-.#define bfd_mach_m68000 1
-.#define bfd_mach_m68008 2
-.#define bfd_mach_m68010 3
-.#define bfd_mach_m68020 4
-.#define bfd_mach_m68030 5
-.#define bfd_mach_m68040 6
-.#define bfd_mach_m68060 7
-.#define bfd_mach_cpu32  8
-.#define bfd_mach_fido   9
-.#define bfd_mach_mcf_isa_a_nodiv 10
-.#define bfd_mach_mcf_isa_a 11
-.#define bfd_mach_mcf_isa_a_mac 12
-.#define bfd_mach_mcf_isa_a_emac 13
-.#define bfd_mach_mcf_isa_aplus 14
-.#define bfd_mach_mcf_isa_aplus_mac 15
-.#define bfd_mach_mcf_isa_aplus_emac 16
-.#define bfd_mach_mcf_isa_b_nousp 17
-.#define bfd_mach_mcf_isa_b_nousp_mac 18
-.#define bfd_mach_mcf_isa_b_nousp_emac 19
-.#define bfd_mach_mcf_isa_b 20
-.#define bfd_mach_mcf_isa_b_mac 21
-.#define bfd_mach_mcf_isa_b_emac 22
-.#define bfd_mach_mcf_isa_b_float 23
-.#define bfd_mach_mcf_isa_b_float_mac 24
-.#define bfd_mach_mcf_isa_b_float_emac 25
-.#define bfd_mach_mcf_isa_c 26
-.#define bfd_mach_mcf_isa_c_mac 27
-.#define bfd_mach_mcf_isa_c_emac 28
-.#define bfd_mach_mcf_isa_c_nodiv 29
-.#define bfd_mach_mcf_isa_c_nodiv_mac 30
-.#define bfd_mach_mcf_isa_c_nodiv_emac 31
-.  bfd_arch_vax,       {* DEC Vax *}
-.  bfd_arch_i960,      {* Intel 960 *}
+.  bfd_arch_m68k,      {* Motorola 68xxx.  *}
+.#define bfd_mach_m68000		1
+.#define bfd_mach_m68008		2
+.#define bfd_mach_m68010		3
+.#define bfd_mach_m68020		4
+.#define bfd_mach_m68030		5
+.#define bfd_mach_m68040		6
+.#define bfd_mach_m68060		7
+.#define bfd_mach_cpu32			8
+.#define bfd_mach_fido			9
+.#define bfd_mach_mcf_isa_a_nodiv	10
+.#define bfd_mach_mcf_isa_a		11
+.#define bfd_mach_mcf_isa_a_mac		12
+.#define bfd_mach_mcf_isa_a_emac	13
+.#define bfd_mach_mcf_isa_aplus		14
+.#define bfd_mach_mcf_isa_aplus_mac	15
+.#define bfd_mach_mcf_isa_aplus_emac	16
+.#define bfd_mach_mcf_isa_b_nousp	17
+.#define bfd_mach_mcf_isa_b_nousp_mac	18
+.#define bfd_mach_mcf_isa_b_nousp_emac	19
+.#define bfd_mach_mcf_isa_b		20
+.#define bfd_mach_mcf_isa_b_mac		21
+.#define bfd_mach_mcf_isa_b_emac	22
+.#define bfd_mach_mcf_isa_b_float	23
+.#define bfd_mach_mcf_isa_b_float_mac	24
+.#define bfd_mach_mcf_isa_b_float_emac	25
+.#define bfd_mach_mcf_isa_c		26
+.#define bfd_mach_mcf_isa_c_mac		27
+.#define bfd_mach_mcf_isa_c_emac	28
+.#define bfd_mach_mcf_isa_c_nodiv	29
+.#define bfd_mach_mcf_isa_c_nodiv_mac	30
+.#define bfd_mach_mcf_isa_c_nodiv_emac	31
+.  bfd_arch_vax,       {* DEC Vax.  *}
+.  bfd_arch_i960,      {* Intel 960.  *}
 .    {* The order of the following is important.
-.       lower number indicates a machine type that
-.       only accepts a subset of the instructions
-.       available to machines with higher numbers.
-.       The exception is the "ca", which is
-.       incompatible with all other machines except
-.       "core".  *}
+.	lower number indicates a machine type that
+.	only accepts a subset of the instructions
+.	available to machines with higher numbers.
+.	The exception is the "ca", which is
+.	incompatible with all other machines except
+.	"core".  *}
 .
-.#define bfd_mach_i960_core      1
-.#define bfd_mach_i960_ka_sa     2
-.#define bfd_mach_i960_kb_sb     3
-.#define bfd_mach_i960_mc        4
-.#define bfd_mach_i960_xa        5
-.#define bfd_mach_i960_ca        6
-.#define bfd_mach_i960_jx	 7
-.#define bfd_mach_i960_hx        8
+.#define bfd_mach_i960_core	1
+.#define bfd_mach_i960_ka_sa	2
+.#define bfd_mach_i960_kb_sb	3
+.#define bfd_mach_i960_mc	4
+.#define bfd_mach_i960_xa	5
+.#define bfd_mach_i960_ca	6
+.#define bfd_mach_i960_jx	7
+.#define bfd_mach_i960_hx	8
 .
-.  bfd_arch_or1k,      {* OpenRISC 1000 *}
-.#define bfd_mach_or1k           1
-.#define bfd_mach_or1knd         2
+.  bfd_arch_or1k,      {* OpenRISC 1000.  *}
+.#define bfd_mach_or1k		1
+.#define bfd_mach_or1knd	2
 .
-.  bfd_arch_sparc,     {* SPARC *}
+.  bfd_arch_sparc,     {* SPARC.  *}
 .#define bfd_mach_sparc			1
 .{* The difference between v8plus and v9 is that v9 is a true 64 bit env.  *}
 .#define bfd_mach_sparc_sparclet	2
@@ -163,9 +163,9 @@ DESCRIPTION
 .   && (mach) != bfd_mach_sparc_v8plusv \
 .   && (mach) != bfd_mach_sparc_v8plusm \
 .   && (mach) != bfd_mach_sparc_v8plusm8)
-.  bfd_arch_spu,       {* PowerPC SPU *}
+.  bfd_arch_spu,       {* PowerPC SPU.  *}
 .#define bfd_mach_spu		256
-.  bfd_arch_mips,      {* MIPS Rxxxx *}
+.  bfd_arch_mips,      {* MIPS Rxxxx.  *}
 .#define bfd_mach_mips3000		3000
 .#define bfd_mach_mips3900		3900
 .#define bfd_mach_mips4000		4000
@@ -190,29 +190,29 @@ DESCRIPTION
 .#define bfd_mach_mips14000		14000
 .#define bfd_mach_mips16000		16000
 .#define bfd_mach_mips16		16
-.#define bfd_mach_mips5                 5
-.#define bfd_mach_mips_loongson_2e      3001
-.#define bfd_mach_mips_loongson_2f      3002
-.#define bfd_mach_mips_loongson_3a      3003
-.#define bfd_mach_mips_sb1              12310201 {* octal 'SB', 01 *}
+.#define bfd_mach_mips5			5
+.#define bfd_mach_mips_loongson_2e	3001
+.#define bfd_mach_mips_loongson_2f	3002
+.#define bfd_mach_mips_loongson_3a	3003
+.#define bfd_mach_mips_sb1		12310201 {* octal 'SB', 01.  *}
 .#define bfd_mach_mips_octeon		6501
 .#define bfd_mach_mips_octeonp		6601
 .#define bfd_mach_mips_octeon2		6502
-.#define bfd_mach_mips_octeon3          6503
-.#define bfd_mach_mips_xlr              887682   {* decimal 'XLR'  *}
-.#define bfd_mach_mips_interaptiv_mr2   736550   {* decimal 'IA2'  *}
-.#define bfd_mach_mipsisa32             32
-.#define bfd_mach_mipsisa32r2           33
-.#define bfd_mach_mipsisa32r3           34
-.#define bfd_mach_mipsisa32r5           36
-.#define bfd_mach_mipsisa32r6           37
-.#define bfd_mach_mipsisa64             64
-.#define bfd_mach_mipsisa64r2           65
-.#define bfd_mach_mipsisa64r3           66
-.#define bfd_mach_mipsisa64r5           68
-.#define bfd_mach_mipsisa64r6           69
-.#define bfd_mach_mips_micromips        96
-.  bfd_arch_i386,      {* Intel 386 *}
+.#define bfd_mach_mips_octeon3		6503
+.#define bfd_mach_mips_xlr		887682	 {* decimal 'XLR'.  *}
+.#define bfd_mach_mips_interaptiv_mr2	736550	 {* decimal 'IA2'.  *}
+.#define bfd_mach_mipsisa32		32
+.#define bfd_mach_mipsisa32r2		33
+.#define bfd_mach_mipsisa32r3		34
+.#define bfd_mach_mipsisa32r5		36
+.#define bfd_mach_mipsisa32r6		37
+.#define bfd_mach_mipsisa64		64
+.#define bfd_mach_mipsisa64r2		65
+.#define bfd_mach_mipsisa64r3		66
+.#define bfd_mach_mipsisa64r5		68
+.#define bfd_mach_mipsisa64r6		69
+.#define bfd_mach_mips_micromips	96
+.  bfd_arch_i386,      {* Intel 386.  *}
 .#define bfd_mach_i386_intel_syntax	(1 << 0)
 .#define bfd_mach_i386_i8086		(1 << 1)
 .#define bfd_mach_i386_i386		(1 << 2)
@@ -221,40 +221,40 @@ DESCRIPTION
 .#define bfd_mach_i386_i386_intel_syntax (bfd_mach_i386_i386 | bfd_mach_i386_intel_syntax)
 .#define bfd_mach_x86_64_intel_syntax	(bfd_mach_x86_64 | bfd_mach_i386_intel_syntax)
 .#define bfd_mach_x64_32_intel_syntax	(bfd_mach_x64_32 | bfd_mach_i386_intel_syntax)
-.  bfd_arch_l1om,   {* Intel L1OM *}
+.  bfd_arch_l1om,      {* Intel L1OM.  *}
 .#define bfd_mach_l1om			(1 << 5)
 .#define bfd_mach_l1om_intel_syntax	(bfd_mach_l1om | bfd_mach_i386_intel_syntax)
-.  bfd_arch_k1om,   {* Intel K1OM *}
+.  bfd_arch_k1om,      {* Intel K1OM.  *}
 .#define bfd_mach_k1om			(1 << 6)
 .#define bfd_mach_k1om_intel_syntax	(bfd_mach_k1om | bfd_mach_i386_intel_syntax)
 .#define bfd_mach_i386_nacl		(1 << 7)
 .#define bfd_mach_i386_i386_nacl	(bfd_mach_i386_i386 | bfd_mach_i386_nacl)
 .#define bfd_mach_x86_64_nacl		(bfd_mach_x86_64 | bfd_mach_i386_nacl)
 .#define bfd_mach_x64_32_nacl		(bfd_mach_x64_32 | bfd_mach_i386_nacl)
-.  bfd_arch_iamcu,   {* Intel MCU *}
+.  bfd_arch_iamcu,     {* Intel MCU.  *}
 .#define bfd_mach_iamcu			(1 << 8)
 .#define bfd_mach_i386_iamcu		(bfd_mach_i386_i386 | bfd_mach_iamcu)
 .#define bfd_mach_i386_iamcu_intel_syntax (bfd_mach_i386_iamcu | bfd_mach_i386_intel_syntax)
-.  bfd_arch_we32k,     {* AT&T WE32xxx *}
-.  bfd_arch_tahoe,     {* CCI/Harris Tahoe *}
-.  bfd_arch_i860,      {* Intel 860 *}
-.  bfd_arch_i370,      {* IBM 360/370 Mainframes *}
-.  bfd_arch_romp,      {* IBM ROMP PC/RT *}
-.  bfd_arch_convex,    {* Convex *}
-.  bfd_arch_m88k,      {* Motorola 88xxx *}
-.  bfd_arch_m98k,      {* Motorola 98xxx *}
-.  bfd_arch_pyramid,   {* Pyramid Technology *}
-.  bfd_arch_h8300,     {* Renesas H8/300 (formerly Hitachi H8/300) *}
-.#define bfd_mach_h8300    1
-.#define bfd_mach_h8300h   2
-.#define bfd_mach_h8300s   3
-.#define bfd_mach_h8300hn  4
-.#define bfd_mach_h8300sn  5
-.#define bfd_mach_h8300sx  6
-.#define bfd_mach_h8300sxn 7
-.  bfd_arch_pdp11,     {* DEC PDP-11 *}
+.  bfd_arch_we32k,     {* AT&T WE32xxx.  *}
+.  bfd_arch_tahoe,     {* CCI/Harris Tahoe.  *}
+.  bfd_arch_i860,      {* Intel 860.  *}
+.  bfd_arch_i370,      {* IBM 360/370 Mainframes.  *}
+.  bfd_arch_romp,      {* IBM ROMP PC/RT.  *}
+.  bfd_arch_convex,    {* Convex.  *}
+.  bfd_arch_m88k,      {* Motorola 88xxx.  *}
+.  bfd_arch_m98k,      {* Motorola 98xxx.  *}
+.  bfd_arch_pyramid,   {* Pyramid Technology.  *}
+.  bfd_arch_h8300,     {* Renesas H8/300 (formerly Hitachi H8/300).  *}
+.#define bfd_mach_h8300		1
+.#define bfd_mach_h8300h	2
+.#define bfd_mach_h8300s	3
+.#define bfd_mach_h8300hn	4
+.#define bfd_mach_h8300sn	5
+.#define bfd_mach_h8300sx	6
+.#define bfd_mach_h8300sxn	7
+.  bfd_arch_pdp11,     {* DEC PDP-11.  *}
 .  bfd_arch_plugin,
-.  bfd_arch_powerpc,   {* PowerPC *}
+.  bfd_arch_powerpc,   {* PowerPC.  *}
 .#define bfd_mach_ppc		32
 .#define bfd_mach_ppc64		64
 .#define bfd_mach_ppc_403	403
@@ -274,121 +274,121 @@ DESCRIPTION
 .#define bfd_mach_ppc_rs64ii	642
 .#define bfd_mach_ppc_rs64iii	643
 .#define bfd_mach_ppc_7400	7400
-.#define bfd_mach_ppc_e500      500
-.#define bfd_mach_ppc_e500mc    5001
-.#define bfd_mach_ppc_e500mc64  5005
-.#define bfd_mach_ppc_e5500     5006
-.#define bfd_mach_ppc_e6500     5007
-.#define bfd_mach_ppc_titan     83
-.#define bfd_mach_ppc_vle       84
-.  bfd_arch_rs6000,    {* IBM RS/6000 *}
+.#define bfd_mach_ppc_e500	500
+.#define bfd_mach_ppc_e500mc	5001
+.#define bfd_mach_ppc_e500mc64	5005
+.#define bfd_mach_ppc_e5500	5006
+.#define bfd_mach_ppc_e6500	5007
+.#define bfd_mach_ppc_titan	83
+.#define bfd_mach_ppc_vle	84
+.  bfd_arch_rs6000,    {* IBM RS/6000.  *}
 .#define bfd_mach_rs6k		6000
 .#define bfd_mach_rs6k_rs1	6001
 .#define bfd_mach_rs6k_rsc	6003
 .#define bfd_mach_rs6k_rs2	6002
-.  bfd_arch_hppa,      {* HP PA RISC *}
+.  bfd_arch_hppa,      {* HP PA RISC.  *}
 .#define bfd_mach_hppa10	10
 .#define bfd_mach_hppa11	11
 .#define bfd_mach_hppa20	20
 .#define bfd_mach_hppa20w	25
-.  bfd_arch_d10v,      {* Mitsubishi D10V *}
+.  bfd_arch_d10v,      {* Mitsubishi D10V.  *}
 .#define bfd_mach_d10v		1
 .#define bfd_mach_d10v_ts2	2
 .#define bfd_mach_d10v_ts3	3
-.  bfd_arch_d30v,      {* Mitsubishi D30V *}
-.  bfd_arch_dlx,       {* DLX *}
-.  bfd_arch_m68hc11,   {* Motorola 68HC11 *}
-.  bfd_arch_m68hc12,   {* Motorola 68HC12 *}
+.  bfd_arch_d30v,      {* Mitsubishi D30V.  *}
+.  bfd_arch_dlx,       {* DLX.  *}
+.  bfd_arch_m68hc11,   {* Motorola 68HC11.  *}
+.  bfd_arch_m68hc12,   {* Motorola 68HC12.  *}
 .#define bfd_mach_m6812_default 0
-.#define bfd_mach_m6812         1
-.#define bfd_mach_m6812s        2
-.  bfd_arch_m9s12x,   {* Freescale S12X *}
-.  bfd_arch_m9s12xg,  {* Freescale XGATE *}
-.  bfd_arch_z8k,       {* Zilog Z8000 *}
+.#define bfd_mach_m6812		1
+.#define bfd_mach_m6812s	2
+.  bfd_arch_m9s12x,    {* Freescale S12X.  *}
+.  bfd_arch_m9s12xg,   {* Freescale XGATE.  *}
+.  bfd_arch_z8k,       {* Zilog Z8000.  *}
 .#define bfd_mach_z8001		1
 .#define bfd_mach_z8002		2
-.  bfd_arch_h8500,     {* Renesas H8/500 (formerly Hitachi H8/500) *}
-.  bfd_arch_sh,        {* Renesas / SuperH SH (formerly Hitachi SH) *}
-.#define bfd_mach_sh            1
-.#define bfd_mach_sh2        0x20
-.#define bfd_mach_sh_dsp     0x2d
-.#define bfd_mach_sh2a       0x2a
-.#define bfd_mach_sh2a_nofpu 0x2b
+.  bfd_arch_h8500,     {* Renesas H8/500 (formerly Hitachi H8/500).  *}
+.  bfd_arch_sh,	       {* Renesas / SuperH SH (formerly Hitachi SH).  *}
+.#define bfd_mach_sh				1
+.#define bfd_mach_sh2				0x20
+.#define bfd_mach_sh_dsp			0x2d
+.#define bfd_mach_sh2a				0x2a
+.#define bfd_mach_sh2a_nofpu			0x2b
 .#define bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu 0x2a1
-.#define bfd_mach_sh2a_nofpu_or_sh3_nommu 0x2a2
-.#define bfd_mach_sh2a_or_sh4  0x2a3
-.#define bfd_mach_sh2a_or_sh3e 0x2a4
-.#define bfd_mach_sh2e       0x2e
-.#define bfd_mach_sh3        0x30
-.#define bfd_mach_sh3_nommu  0x31
-.#define bfd_mach_sh3_dsp    0x3d
-.#define bfd_mach_sh3e       0x3e
-.#define bfd_mach_sh4        0x40
-.#define bfd_mach_sh4_nofpu  0x41
-.#define bfd_mach_sh4_nommu_nofpu  0x42
-.#define bfd_mach_sh4a       0x4a
-.#define bfd_mach_sh4a_nofpu 0x4b
-.#define bfd_mach_sh4al_dsp  0x4d
-.#define bfd_mach_sh5        0x50
-.  bfd_arch_alpha,     {* Dec Alpha *}
-.#define bfd_mach_alpha_ev4  0x10
-.#define bfd_mach_alpha_ev5  0x20
-.#define bfd_mach_alpha_ev6  0x30
+.#define bfd_mach_sh2a_nofpu_or_sh3_nommu	0x2a2
+.#define bfd_mach_sh2a_or_sh4			0x2a3
+.#define bfd_mach_sh2a_or_sh3e			0x2a4
+.#define bfd_mach_sh2e				0x2e
+.#define bfd_mach_sh3				0x30
+.#define bfd_mach_sh3_nommu			0x31
+.#define bfd_mach_sh3_dsp			0x3d
+.#define bfd_mach_sh3e				0x3e
+.#define bfd_mach_sh4				0x40
+.#define bfd_mach_sh4_nofpu			0x41
+.#define bfd_mach_sh4_nommu_nofpu		0x42
+.#define bfd_mach_sh4a				0x4a
+.#define bfd_mach_sh4a_nofpu			0x4b
+.#define bfd_mach_sh4al_dsp			0x4d
+.#define bfd_mach_sh5				0x50
+.  bfd_arch_alpha,     {* Dec Alpha.  *}
+.#define bfd_mach_alpha_ev4	0x10
+.#define bfd_mach_alpha_ev5	0x20
+.#define bfd_mach_alpha_ev6	0x30
 .  bfd_arch_arm,       {* Advanced Risc Machines ARM.  *}
 .#define bfd_mach_arm_unknown	0
 .#define bfd_mach_arm_2		1
 .#define bfd_mach_arm_2a	2
 .#define bfd_mach_arm_3		3
-.#define bfd_mach_arm_3M 	4
-.#define bfd_mach_arm_4 	5
-.#define bfd_mach_arm_4T 	6
-.#define bfd_mach_arm_5 	7
+.#define bfd_mach_arm_3M	4
+.#define bfd_mach_arm_4		5
+.#define bfd_mach_arm_4T	6
+.#define bfd_mach_arm_5		7
 .#define bfd_mach_arm_5T	8
 .#define bfd_mach_arm_5TE	9
 .#define bfd_mach_arm_XScale	10
 .#define bfd_mach_arm_ep9312	11
 .#define bfd_mach_arm_iWMMXt	12
 .#define bfd_mach_arm_iWMMXt2	13
-.  bfd_arch_nds32,     {* Andes NDS32 *}
-.#define bfd_mach_n1            1
-.#define bfd_mach_n1h           2
-.#define bfd_mach_n1h_v2        3
-.#define bfd_mach_n1h_v3        4
-.#define bfd_mach_n1h_v3m       5
-.  bfd_arch_ns32k,     {* National Semiconductors ns32000 *}
-.  bfd_arch_w65,       {* WDC 65816 *}
-.  bfd_arch_tic30,     {* Texas Instruments TMS320C30 *}
-.  bfd_arch_tic4x,     {* Texas Instruments TMS320C3X/4X *}
-.#define bfd_mach_tic3x         30
-.#define bfd_mach_tic4x         40
-.  bfd_arch_tic54x,    {* Texas Instruments TMS320C54X *}
-.  bfd_arch_tic6x,     {* Texas Instruments TMS320C6X *}
-.  bfd_arch_tic80,     {* TI TMS320c80 (MVP) *}
-.  bfd_arch_v850,      {* NEC V850 *}
-.  bfd_arch_v850_rh850,{* NEC V850 (using RH850 ABI) *}
-.#define bfd_mach_v850          1
-.#define bfd_mach_v850e 	'E'
-.#define bfd_mach_v850e1        '1'
-.#define bfd_mach_v850e2        0x4532
-.#define bfd_mach_v850e2v3      0x45325633
-.#define bfd_mach_v850e3v5      0x45335635 {* ('E'|'3'|'V'|'5') *}
-.  bfd_arch_arc,       {* ARC Cores *}
-.#define bfd_mach_arc_a4        0
-.#define bfd_mach_arc_a5        1
-.#define bfd_mach_arc_arc600    2
-.#define bfd_mach_arc_arc601    4
-.#define bfd_mach_arc_arc700    3
-.#define bfd_mach_arc_arcv2     5
-. bfd_arch_m32c,     {* Renesas M16C/M32C.  *}
-.#define bfd_mach_m16c        0x75
-.#define bfd_mach_m32c        0x78
-.  bfd_arch_m32r,      {* Renesas M32R (formerly Mitsubishi M32R/D) *}
+.  bfd_arch_nds32,     {* Andes NDS32.  *}
+.#define bfd_mach_n1		1
+.#define bfd_mach_n1h		2
+.#define bfd_mach_n1h_v2	3
+.#define bfd_mach_n1h_v3	4
+.#define bfd_mach_n1h_v3m	5
+.  bfd_arch_ns32k,     {* National Semiconductors ns32000.  *}
+.  bfd_arch_w65,       {* WDC 65816.  *}
+.  bfd_arch_tic30,     {* Texas Instruments TMS320C30.  *}
+.  bfd_arch_tic4x,     {* Texas Instruments TMS320C3X/4X.  *}
+.#define bfd_mach_tic3x		30
+.#define bfd_mach_tic4x		40
+.  bfd_arch_tic54x,    {* Texas Instruments TMS320C54X.  *}
+.  bfd_arch_tic6x,     {* Texas Instruments TMS320C6X.  *}
+.  bfd_arch_tic80,     {* TI TMS320c80 (MVP).  *}
+.  bfd_arch_v850,      {* NEC V850.  *}
+.  bfd_arch_v850_rh850,{* NEC V850 (using RH850 ABI).  *}
+.#define bfd_mach_v850		1
+.#define bfd_mach_v850e		'E'
+.#define bfd_mach_v850e1	'1'
+.#define bfd_mach_v850e2	0x4532
+.#define bfd_mach_v850e2v3	0x45325633
+.#define bfd_mach_v850e3v5	0x45335635 {* ('E'|'3'|'V'|'5').  *}
+.  bfd_arch_arc,       {* ARC Cores.  *}
+.#define bfd_mach_arc_a4	0
+.#define bfd_mach_arc_a5	1
+.#define bfd_mach_arc_arc600	2
+.#define bfd_mach_arc_arc601	4
+.#define bfd_mach_arc_arc700	3
+.#define bfd_mach_arc_arcv2	5
+. bfd_arch_m32c,       {* Renesas M16C/M32C.  *}
+.#define bfd_mach_m16c		0x75
+.#define bfd_mach_m32c		0x78
+.  bfd_arch_m32r,      {* Renesas M32R (formerly Mitsubishi M32R/D).  *}
 .#define bfd_mach_m32r		1 {* For backwards compatibility.  *}
 .#define bfd_mach_m32rx		'x'
 .#define bfd_mach_m32r2		'2'
-.  bfd_arch_mn10200,   {* Matsushita MN10200 *}
-.  bfd_arch_mn10300,   {* Matsushita MN10300 *}
-.#define bfd_mach_mn10300		300
+.  bfd_arch_mn10200,   {* Matsushita MN10200.  *}
+.  bfd_arch_mn10300,   {* Matsushita MN10300.  *}
+.#define bfd_mach_mn10300	300
 .#define bfd_mach_am33		330
 .#define bfd_mach_am33_2	332
 .  bfd_arch_fr30,
@@ -399,12 +399,12 @@ DESCRIPTION
 .#define bfd_mach_fr300		300
 .#define bfd_mach_fr400		400
 .#define bfd_mach_fr450		450
-.#define bfd_mach_frvtomcat	499	{* fr500 prototype *}
+.#define bfd_mach_frvtomcat	499	{* fr500 prototype.  *}
 .#define bfd_mach_fr500		500
 .#define bfd_mach_fr550		550
-.  bfd_arch_moxie,       {* The moxie processor *}
+.  bfd_arch_moxie,     {* The moxie processor.  *}
 .#define bfd_mach_moxie		1
-.  bfd_arch_ft32,       {* The ft32 processor *}
+.  bfd_arch_ft32,      {* The ft32 processor.  *}
 .#define bfd_mach_ft32		1
 .#define bfd_mach_ft32b		2
 .  bfd_arch_mcore,
@@ -414,22 +414,22 @@ DESCRIPTION
 .#define bfd_mach_mep_c5	0x6335
 .  bfd_arch_metag,
 .#define bfd_mach_metag		1
-.  bfd_arch_ia64,      {* HP/Intel ia64 *}
+.  bfd_arch_ia64,      {* HP/Intel ia64.  *}
 .#define bfd_mach_ia64_elf64	64
 .#define bfd_mach_ia64_elf32	32
 .  bfd_arch_ip2k,      {* Ubicom IP2K microcontrollers. *}
 .#define bfd_mach_ip2022	1
 .#define bfd_mach_ip2022ext	2
 . bfd_arch_iq2000,     {* Vitesse IQ2000.  *}
-.#define bfd_mach_iq2000        1
-.#define bfd_mach_iq10          2
-.  bfd_arch_epiphany,	{* Adapteva EPIPHANY *}
+.#define bfd_mach_iq2000	1
+.#define bfd_mach_iq10		2
+.  bfd_arch_epiphany,  {* Adapteva EPIPHANY.  *}
 .#define bfd_mach_epiphany16	1
 .#define bfd_mach_epiphany32	2
 .  bfd_arch_mt,
-.#define bfd_mach_ms1           1
-.#define bfd_mach_mrisc2        2
-.#define bfd_mach_ms2           3
+.#define bfd_mach_ms1		1
+.#define bfd_mach_mrisc2	2
+.#define bfd_mach_ms2		3
 .  bfd_arch_pj,
 .  bfd_arch_avr,       {* Atmel AVR microcontrollers.  *}
 .#define bfd_mach_avr1		1
@@ -442,23 +442,23 @@ DESCRIPTION
 .#define bfd_mach_avr5		5
 .#define bfd_mach_avr51		51
 .#define bfd_mach_avr6		6
-.#define bfd_mach_avrtiny   100
-.#define bfd_mach_avrxmega1 101
-.#define bfd_mach_avrxmega2 102
-.#define bfd_mach_avrxmega3 103
-.#define bfd_mach_avrxmega4 104
-.#define bfd_mach_avrxmega5 105
-.#define bfd_mach_avrxmega6 106
-.#define bfd_mach_avrxmega7 107
-.  bfd_arch_bfin,        {* ADI Blackfin *}
-.#define bfd_mach_bfin          1
-.  bfd_arch_cr16,       {* National Semiconductor CompactRISC (ie CR16). *}
+.#define bfd_mach_avrtiny	100
+.#define bfd_mach_avrxmega1	101
+.#define bfd_mach_avrxmega2	102
+.#define bfd_mach_avrxmega3	103
+.#define bfd_mach_avrxmega4	104
+.#define bfd_mach_avrxmega5	105
+.#define bfd_mach_avrxmega6	106
+.#define bfd_mach_avrxmega7	107
+.  bfd_arch_bfin,      {* ADI Blackfin.  *}
+.#define bfd_mach_bfin		1
+.  bfd_arch_cr16,      {* National Semiconductor CompactRISC (ie CR16).  *}
 .#define bfd_mach_cr16		1
-.  bfd_arch_cr16c,       {* National Semiconductor CompactRISC. *}
+.  bfd_arch_cr16c,     {* National Semiconductor CompactRISC.  *}
 .#define bfd_mach_cr16c		1
 .  bfd_arch_crx,       {*  National Semiconductor CRX.  *}
 .#define bfd_mach_crx		1
-.  bfd_arch_cris,      {* Axis CRIS *}
+.  bfd_arch_cris,      {* Axis CRIS.  *}
 .#define bfd_mach_cris_v0_v10	255
 .#define bfd_mach_cris_v32	32
 .#define bfd_mach_cris_v10_v32	1032
@@ -466,77 +466,77 @@ DESCRIPTION
 .#define bfd_mach_riscv32	132
 .#define bfd_mach_riscv64	164
 .  bfd_arch_rl78,
-.#define bfd_mach_rl78	0x75
-.  bfd_arch_rx,        {* Renesas RX.  *}
-.#define bfd_mach_rx            0x75
-.  bfd_arch_s390,      {* IBM s390 *}
-.#define bfd_mach_s390_31       31
-.#define bfd_mach_s390_64       64
-.  bfd_arch_score,     {* Sunplus score *}
-.#define bfd_mach_score3         3
-.#define bfd_mach_score7         7
+.#define bfd_mach_rl78		0x75
+.  bfd_arch_rx,	       {* Renesas RX.  *}
+.#define bfd_mach_rx		0x75
+.  bfd_arch_s390,      {* IBM s390.  *}
+.#define bfd_mach_s390_31	31
+.#define bfd_mach_s390_64	64
+.  bfd_arch_score,     {* Sunplus score.  *}
+.#define bfd_mach_score3	3
+.#define bfd_mach_score7	7
 .  bfd_arch_mmix,      {* Donald Knuth's educational processor.  *}
 .  bfd_arch_xstormy16,
 .#define bfd_mach_xstormy16	1
 .  bfd_arch_msp430,    {* Texas Instruments MSP430 architecture.  *}
-.#define bfd_mach_msp11          11
-.#define bfd_mach_msp110         110
-.#define bfd_mach_msp12          12
-.#define bfd_mach_msp13          13
-.#define bfd_mach_msp14          14
-.#define bfd_mach_msp15          15
-.#define bfd_mach_msp16          16
-.#define bfd_mach_msp20          20
-.#define bfd_mach_msp21          21
-.#define bfd_mach_msp22          22
-.#define bfd_mach_msp23          23
-.#define bfd_mach_msp24          24
-.#define bfd_mach_msp26          26
-.#define bfd_mach_msp31          31
-.#define bfd_mach_msp32          32
-.#define bfd_mach_msp33          33
-.#define bfd_mach_msp41          41
-.#define bfd_mach_msp42          42
-.#define bfd_mach_msp43          43
-.#define bfd_mach_msp44          44
-.#define bfd_mach_msp430x        45
-.#define bfd_mach_msp46          46
-.#define bfd_mach_msp47          47
-.#define bfd_mach_msp54          54
-.  bfd_arch_xc16x,     {* Infineon's XC16X Series.               *}
-.#define bfd_mach_xc16x         1
-.#define bfd_mach_xc16xl        2
-.#define bfd_mach_xc16xs        3
-.  bfd_arch_xgate,   {* Freescale XGATE *}
-.#define bfd_mach_xgate         1
+.#define bfd_mach_msp11		11
+.#define bfd_mach_msp110	110
+.#define bfd_mach_msp12		12
+.#define bfd_mach_msp13		13
+.#define bfd_mach_msp14		14
+.#define bfd_mach_msp15		15
+.#define bfd_mach_msp16		16
+.#define bfd_mach_msp20		20
+.#define bfd_mach_msp21		21
+.#define bfd_mach_msp22		22
+.#define bfd_mach_msp23		23
+.#define bfd_mach_msp24		24
+.#define bfd_mach_msp26		26
+.#define bfd_mach_msp31		31
+.#define bfd_mach_msp32		32
+.#define bfd_mach_msp33		33
+.#define bfd_mach_msp41		41
+.#define bfd_mach_msp42		42
+.#define bfd_mach_msp43		43
+.#define bfd_mach_msp44		44
+.#define bfd_mach_msp430x	45
+.#define bfd_mach_msp46		46
+.#define bfd_mach_msp47		47
+.#define bfd_mach_msp54		54
+.  bfd_arch_xc16x,     {* Infineon's XC16X Series.  *}
+.#define bfd_mach_xc16x		1
+.#define bfd_mach_xc16xl	2
+.#define bfd_mach_xc16xs	3
+.  bfd_arch_xgate,     {* Freescale XGATE.  *}
+.#define bfd_mach_xgate		1
 .  bfd_arch_xtensa,    {* Tensilica's Xtensa cores.  *}
 .#define bfd_mach_xtensa	1
 .  bfd_arch_z80,
-.#define bfd_mach_z80strict      1 {* No undocumented opcodes.  *}
-.#define bfd_mach_z80            3 {* With ixl, ixh, iyl, and iyh.  *}
-.#define bfd_mach_z80full        7 {* All undocumented instructions.  *}
-.#define bfd_mach_r800           11 {* R800: successor with multiplication.  *}
-.  bfd_arch_lm32,      {* Lattice Mico32 *}
-.#define bfd_mach_lm32      1
-.  bfd_arch_microblaze,{* Xilinx MicroBlaze. *}
-.  bfd_arch_tilepro,   {* Tilera TILEPro *}
-.  bfd_arch_tilegx, {* Tilera TILE-Gx *}
-.#define bfd_mach_tilepro   1
-.#define bfd_mach_tilegx    1
-.#define bfd_mach_tilegx32  2
-.  bfd_arch_aarch64,   {* AArch64  *}
+.#define bfd_mach_z80strict	1 {* No undocumented opcodes.  *}
+.#define bfd_mach_z80		3 {* With ixl, ixh, iyl, and iyh.  *}
+.#define bfd_mach_z80full	7 {* All undocumented instructions.  *}
+.#define bfd_mach_r800		11 {* R800: successor with multiplication.  *}
+.  bfd_arch_lm32,      {* Lattice Mico32.  *}
+.#define bfd_mach_lm32		1
+.  bfd_arch_microblaze,{* Xilinx MicroBlaze.  *}
+.  bfd_arch_tilepro,   {* Tilera TILEPro.  *}
+.  bfd_arch_tilegx,    {* Tilera TILE-Gx.  *}
+.#define bfd_mach_tilepro	1
+.#define bfd_mach_tilegx	1
+.#define bfd_mach_tilegx32	2
+.  bfd_arch_aarch64,   {* AArch64.  *}
 .#define bfd_mach_aarch64 0
 .#define bfd_mach_aarch64_ilp32	32
-.  bfd_arch_nios2,	{* Nios II *}
+.  bfd_arch_nios2,     {* Nios II.  *}
 .#define bfd_mach_nios2		0
 .#define bfd_mach_nios2r1	1
 .#define bfd_mach_nios2r2	2
-.  bfd_arch_visium,	{* Visium *}
+.  bfd_arch_visium,    {* Visium.  *}
 .#define bfd_mach_visium	1
-.  bfd_arch_wasm32,     {* WebAssembly *}
-.#define bfd_mach_wasm32        1
-.  bfd_arch_pru,	{* PRU *}
-.#define bfd_mach_pru	0
+.  bfd_arch_wasm32,    {* WebAssembly.  *}
+.#define bfd_mach_wasm32	1
+.  bfd_arch_pru,       {* PRU.  *}
+.#define bfd_mach_pru		0
 .  bfd_arch_last
 .  };
 */
@@ -564,8 +564,8 @@ DESCRIPTION
 .     The default arch should be the first entry for an arch so that
 .     all the entries for that arch can be accessed via <<next>>.  *}
 .  bfd_boolean the_default;
-.  const struct bfd_arch_info * (*compatible)
-.    (const struct bfd_arch_info *a, const struct bfd_arch_info *b);
+.  const struct bfd_arch_info * (*compatible) (const struct bfd_arch_info *,
+.					       const struct bfd_arch_info *);
 .
 .  bfd_boolean (*scan) (const struct bfd_arch_info *, const char *);
 .
@@ -1390,8 +1390,8 @@ SYNOPSIS
 
 DESCRIPTION
 	Return the number of octets (8-bit quantities) per target byte
-        (minimum addressable unit).  In most cases, this will be one, but some
-        DSP targets have 16, 32, or even 48 bits per byte.
+	(minimum addressable unit).  In most cases, this will be one, but some
+	DSP targets have 16, 32, or even 48 bits per byte.
 */
 
 unsigned int
@@ -1412,8 +1412,8 @@ SYNOPSIS
 DESCRIPTION
 	See bfd_octets_per_byte.
 
-        This routine is provided for those cases where a bfd * is not
-        available
+	This routine is provided for those cases where a bfd * is not
+	available
 */
 
 unsigned int