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author | Neal Frager <neal.frager@amd.com> | 2023-10-13 08:28:55 +0100 |
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committer | Michael J. Eager <eager@eagercon.com> | 2023-10-15 09:28:10 -0700 |
commit | bb0d05ff74fda6b8f3f83712ebba3ea36bff1426 (patch) | |
tree | dfecd08258769f1477bf787da7009d39a314dc2e /Makefile.def | |
parent | 30ebc4310b0ec608bc7e34e153340935147c45d5 (diff) | |
download | fsf-binutils-gdb-bb0d05ff74fda6b8f3f83712ebba3ea36bff1426.zip fsf-binutils-gdb-bb0d05ff74fda6b8f3f83712ebba3ea36bff1426.tar.gz fsf-binutils-gdb-bb0d05ff74fda6b8f3f83712ebba3ea36bff1426.tar.bz2 |
opcodes: microblaze: Add new bit-field instructions
This patches adds new bsefi and bsifi instructions.
BSEFI- The instruction shall extract a bit field from a
register and place it right-adjusted in the destination register.
The other bits in the destination register shall be set to zero.
BSIFI- The instruction shall insert a right-adjusted bit field
from a register at another position in the destination register.
The rest of the bits in the destination register shall be unchanged.
Further documentation of these instructions can be found here:
https://docs.xilinx.com/v/u/en-US/ug984-vivado-microblaze-ref
With version 6 of the patch, no new relocation types are added as
this was unnecessary for adding the bsefi and bsifi instructions.
FIXED: Segfault caused by incorrect termination of microblaze_opcodes.
Signed-off-by: nagaraju <nagaraju.mekala@amd.com>
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@amd.com>
Signed-off-by: Neal Frager <neal.frager@amd.com>
Signed-off-by: Michael J. Eager <eager@eagercon.com>
Diffstat (limited to 'Makefile.def')
0 files changed, 0 insertions, 0 deletions