Support Intel AVX10.2 media instructions

In disassembler part, for vnni instructions, we extended previous
VEX part using %XE in disassembler to promote them to EVEX by reusing
the original VEX table. For vmpsadbw, we will also use %XE. However,
it is hard to reuse the VEX table, so we are using new ones.

In assmbler part, we put the vnni table entries with previous vnni
instructions since they are just promotion from AVX-VNNI-INT{8,16}.
Since we will prefer VEX encoding, we need to use the different table
order in template <vnni>, which prefers EVEX due to earlier introduction
for AVX512_VNNI than AVX_VNNI. This means a new <vnni>. For vdpphps
and vmpsadbw, we put them at the end of the table, with future AVX10.2
instructions.

Nit: I will remove the arch requirement for avx_vnni_int{8,16} in
evex-promote testcases after AVX10.2 implies AVX-VNNI-INT{8,16}.

gas/Changelog:

	* testsuite/gas/i386/i386.exp: Add AVX10.2 tests.
	* testsuite/gas/i386/x86-64.exp: Ditto.
	* testsuite/gas/i386/avx10_2-256-1-intel.d: New.
	* testsuite/gas/i386/avx10_2-256-1.d: Ditto.
	* testsuite/gas/i386/avx10_2-256-1.s: Ditto.
	* testsuite/gas/i386/avx10_2-512-1-intel.d: Ditto.
	* testsuite/gas/i386/avx10_2-512-1.d: Ditto.
	* testsuite/gas/i386/avx10_2-512-1.s: Ditto.
	* testsuite/gas/i386/avx10_2-promote.d: Ditto.
	* testsuite/gas/i386/avx10_2-promote.s: Ditto.
	* testsuite/gas/i386/x86-64-avx10_2-256-1-intel.d: Ditto.
	* testsuite/gas/i386/x86-64-avx10_2-256-1.d: Ditto.
	* testsuite/gas/i386/x86-64-avx10_2-256-1.s: Ditto.
	* testsuite/gas/i386/x86-64-avx10_2-512-1-intel.d: Ditto.
	* testsuite/gas/i386/x86-64-avx10_2-512-1.d: Ditto.
	* testsuite/gas/i386/x86-64-avx10_2-512-1.s: Ditto.
	* testsuite/gas/i386/x86-64-avx10_2-promote.d: Ditto.
	* testsuite/gas/i386/x86-64-avx10_2-promote.s: Ditto.

opcodes/Changelog:

	* i386-dis-evex-prefix.h: Adjust PREFIX_EVEX_0F3852.
	Add PREFIX_EVEX_0F3A42_W_0.
	* i386-dis-evex-w.h: Adjust EVEX_W_0F3A42.
	* i386-dis-evex.h: Add table pass for AVX10.2
	instructions.
	* i386-dis.c: Adjust PREFIX_VEX_0F3850_W_0, PREFIX_VEX_0F3851_W_0,
	PREFIX_VEX_0F38D2_W_0 and PREFIX_VEX_0F38D3_W_0.
	* i386-opc.tbl: Add AVX10.2 instructions.
	* i386-mnem.h: Regenerated.
	* i386-tbl.h: Ditto.

Co-authored-by: Lili Cui <lili.cui@intel.com>

25 files changed, 2497 insertions, 702 deletions

diff --git a/gas/testsuite/gas/i386/avx10_2-256-1-intel.d b/gas/testsuite/gas/i386/avx10_2-256-1-intel.d
new file mode 100644
index 0000000..9aad8f8
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx10_2-256-1-intel.d
@@ -0,0 +1,151 @@
+#objdump: -dw -Mintel
+#name: i386 AVX10.2/256 media insns (Intel disassembly)
+#source: avx10_2-256-1.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+#...
+[a-f0-9]+ <_intel>:
+\s*[a-f0-9]+:\s*62 f2 57 2f 50 f4\s+vpdpbssd ymm6\{k7\},ymm5,ymm4
+\s*[a-f0-9]+:\s*62 f2 57 0f 50 f4\s+vpdpbssd xmm6\{k7\},xmm5,xmm4
+\s*[a-f0-9]+:\s*62 f2 57 2f 50 b4 f4 00 00 00 10\s+vpdpbssd ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 57 38 50 31\s+vpdpbssd ymm6,ymm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 57 2f 50 71 7f\s+vpdpbssd ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 f2 57 bf 50 72 80\s+vpdpbssd ymm6\{k7\}\{z\},ymm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 57 0f 50 b4 f4 00 00 00 10\s+vpdpbssd xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 57 18 50 31\s+vpdpbssd xmm6,xmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 57 0f 50 71 7f\s+vpdpbssd xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 f2 57 9f 50 72 80\s+vpdpbssd xmm6\{k7\}\{z\},xmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 57 2f 51 f4\s+vpdpbssds ymm6\{k7\},ymm5,ymm4
+\s*[a-f0-9]+:\s*62 f2 57 0f 51 f4\s+vpdpbssds xmm6\{k7\},xmm5,xmm4
+\s*[a-f0-9]+:\s*62 f2 57 2f 51 b4 f4 00 00 00 10\s+vpdpbssds ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 57 38 51 31\s+vpdpbssds ymm6,ymm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 57 2f 51 71 7f\s+vpdpbssds ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 f2 57 bf 51 72 80\s+vpdpbssds ymm6\{k7\}\{z\},ymm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 57 0f 51 b4 f4 00 00 00 10\s+vpdpbssds xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 57 18 51 31\s+vpdpbssds xmm6,xmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 57 0f 51 71 7f\s+vpdpbssds xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 f2 57 9f 51 72 80\s+vpdpbssds xmm6\{k7\}\{z\},xmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 56 2f 50 f4\s+vpdpbsud ymm6\{k7\},ymm5,ymm4
+\s*[a-f0-9]+:\s*62 f2 56 0f 50 f4\s+vpdpbsud xmm6\{k7\},xmm5,xmm4
+\s*[a-f0-9]+:\s*62 f2 56 2f 50 b4 f4 00 00 00 10\s+vpdpbsud ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 56 38 50 31\s+vpdpbsud ymm6,ymm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 56 2f 50 71 7f\s+vpdpbsud ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 f2 56 bf 50 72 80\s+vpdpbsud ymm6\{k7\}\{z\},ymm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 56 0f 50 b4 f4 00 00 00 10\s+vpdpbsud xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 56 18 50 31\s+vpdpbsud xmm6,xmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 56 0f 50 71 7f\s+vpdpbsud xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 f2 56 9f 50 72 80\s+vpdpbsud xmm6\{k7\}\{z\},xmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 56 2f 51 f4\s+vpdpbsuds ymm6\{k7\},ymm5,ymm4
+\s*[a-f0-9]+:\s*62 f2 56 0f 51 f4\s+vpdpbsuds xmm6\{k7\},xmm5,xmm4
+\s*[a-f0-9]+:\s*62 f2 56 2f 51 b4 f4 00 00 00 10\s+vpdpbsuds ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 56 38 51 31\s+vpdpbsuds ymm6,ymm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 56 2f 51 71 7f\s+vpdpbsuds ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 f2 56 bf 51 72 80\s+vpdpbsuds ymm6\{k7\}\{z\},ymm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 56 0f 51 b4 f4 00 00 00 10\s+vpdpbsuds xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 56 18 51 31\s+vpdpbsuds xmm6,xmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 56 0f 51 71 7f\s+vpdpbsuds xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 f2 56 9f 51 72 80\s+vpdpbsuds xmm6\{k7\}\{z\},xmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 54 2f 50 f4\s+vpdpbuud ymm6\{k7\},ymm5,ymm4
+\s*[a-f0-9]+:\s*62 f2 54 0f 50 f4\s+vpdpbuud xmm6\{k7\},xmm5,xmm4
+\s*[a-f0-9]+:\s*62 f2 54 2f 50 b4 f4 00 00 00 10\s+vpdpbuud ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 54 38 50 31\s+vpdpbuud ymm6,ymm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 54 2f 50 71 7f\s+vpdpbuud ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 f2 54 bf 50 72 80\s+vpdpbuud ymm6\{k7\}\{z\},ymm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 54 0f 50 b4 f4 00 00 00 10\s+vpdpbuud xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 54 18 50 31\s+vpdpbuud xmm6,xmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 54 0f 50 71 7f\s+vpdpbuud xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 f2 54 9f 50 72 80\s+vpdpbuud xmm6\{k7\}\{z\},xmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 54 2f 51 f4\s+vpdpbuuds ymm6\{k7\},ymm5,ymm4
+\s*[a-f0-9]+:\s*62 f2 54 0f 51 f4\s+vpdpbuuds xmm6\{k7\},xmm5,xmm4
+\s*[a-f0-9]+:\s*62 f2 54 2f 51 b4 f4 00 00 00 10\s+vpdpbuuds ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 54 38 51 31\s+vpdpbuuds ymm6,ymm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 54 2f 51 71 7f\s+vpdpbuuds ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 f2 54 bf 51 72 80\s+vpdpbuuds ymm6\{k7\}\{z\},ymm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 54 0f 51 b4 f4 00 00 00 10\s+vpdpbuuds xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 54 18 51 31\s+vpdpbuuds xmm6,xmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 54 0f 51 71 7f\s+vpdpbuuds xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 f2 54 9f 51 72 80\s+vpdpbuuds xmm6\{k7\}\{z\},xmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 56 2f d2 f4\s+vpdpwsud ymm6\{k7\},ymm5,ymm4
+\s*[a-f0-9]+:\s*62 f2 56 0f d2 f4\s+vpdpwsud xmm6\{k7\},xmm5,xmm4
+\s*[a-f0-9]+:\s*62 f2 56 2f d2 b4 f4 00 00 00 10\s+vpdpwsud ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 56 38 d2 31\s+vpdpwsud ymm6,ymm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 56 2f d2 71 7f\s+vpdpwsud ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 f2 56 bf d2 72 80\s+vpdpwsud ymm6\{k7\}\{z\},ymm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 56 0f d2 b4 f4 00 00 00 10\s+vpdpwsud xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 56 18 d2 31\s+vpdpwsud xmm6,xmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 56 0f d2 71 7f\s+vpdpwsud xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 f2 56 9f d2 72 80\s+vpdpwsud xmm6\{k7\}\{z\},xmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 56 2f d3 f4\s+vpdpwsuds ymm6\{k7\},ymm5,ymm4
+\s*[a-f0-9]+:\s*62 f2 56 0f d3 f4\s+vpdpwsuds xmm6\{k7\},xmm5,xmm4
+\s*[a-f0-9]+:\s*62 f2 56 2f d3 b4 f4 00 00 00 10\s+vpdpwsuds ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 56 38 d3 31\s+vpdpwsuds ymm6,ymm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 56 2f d3 71 7f\s+vpdpwsuds ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 f2 56 bf d3 72 80\s+vpdpwsuds ymm6\{k7\}\{z\},ymm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 56 0f d3 b4 f4 00 00 00 10\s+vpdpwsuds xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 56 18 d3 31\s+vpdpwsuds xmm6,xmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 56 0f d3 71 7f\s+vpdpwsuds xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 f2 56 9f d3 72 80\s+vpdpwsuds xmm6\{k7\}\{z\},xmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 55 2f d2 f4\s+vpdpwusd ymm6\{k7\},ymm5,ymm4
+\s*[a-f0-9]+:\s*62 f2 55 0f d2 f4\s+vpdpwusd xmm6\{k7\},xmm5,xmm4
+\s*[a-f0-9]+:\s*62 f2 55 2f d2 b4 f4 00 00 00 10\s+vpdpwusd ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 55 38 d2 31\s+vpdpwusd ymm6,ymm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 55 2f d2 71 7f\s+vpdpwusd ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 f2 55 bf d2 72 80\s+vpdpwusd ymm6\{k7\}\{z\},ymm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 55 0f d2 b4 f4 00 00 00 10\s+vpdpwusd xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 55 18 d2 31\s+vpdpwusd xmm6,xmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 55 0f d2 71 7f\s+vpdpwusd xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 f2 55 9f d2 72 80\s+vpdpwusd xmm6\{k7\}\{z\},xmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 55 2f d3 f4\s+vpdpwusds ymm6\{k7\},ymm5,ymm4
+\s*[a-f0-9]+:\s*62 f2 55 0f d3 f4\s+vpdpwusds xmm6\{k7\},xmm5,xmm4
+\s*[a-f0-9]+:\s*62 f2 55 2f d3 b4 f4 00 00 00 10\s+vpdpwusds ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 55 38 d3 31\s+vpdpwusds ymm6,ymm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 55 2f d3 71 7f\s+vpdpwusds ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 f2 55 bf d3 72 80\s+vpdpwusds ymm6\{k7\}\{z\},ymm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 55 0f d3 b4 f4 00 00 00 10\s+vpdpwusds xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 55 18 d3 31\s+vpdpwusds xmm6,xmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 55 0f d3 71 7f\s+vpdpwusds xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 f2 55 9f d3 72 80\s+vpdpwusds xmm6\{k7\}\{z\},xmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 54 2f d2 f4\s+vpdpwuud ymm6\{k7\},ymm5,ymm4
+\s*[a-f0-9]+:\s*62 f2 54 0f d2 f4\s+vpdpwuud xmm6\{k7\},xmm5,xmm4
+\s*[a-f0-9]+:\s*62 f2 54 2f d2 b4 f4 00 00 00 10\s+vpdpwuud ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 54 38 d2 31\s+vpdpwuud ymm6,ymm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 54 2f d2 71 7f\s+vpdpwuud ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 f2 54 bf d2 72 80\s+vpdpwuud ymm6\{k7\}\{z\},ymm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 54 0f d2 b4 f4 00 00 00 10\s+vpdpwuud xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 54 18 d2 31\s+vpdpwuud xmm6,xmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 54 0f d2 71 7f\s+vpdpwuud xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 f2 54 9f d2 72 80\s+vpdpwuud xmm6\{k7\}\{z\},xmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 54 2f d3 f4\s+vpdpwuuds ymm6\{k7\},ymm5,ymm4
+\s*[a-f0-9]+:\s*62 f2 54 0f d3 f4\s+vpdpwuuds xmm6\{k7\},xmm5,xmm4
+\s*[a-f0-9]+:\s*62 f2 54 2f d3 b4 f4 00 00 00 10\s+vpdpwuuds ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 54 38 d3 31\s+vpdpwuuds ymm6,ymm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 54 2f d3 71 7f\s+vpdpwuuds ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 f2 54 bf d3 72 80\s+vpdpwuuds ymm6\{k7\}\{z\},ymm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 54 0f d3 b4 f4 00 00 00 10\s+vpdpwuuds xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 54 18 d3 31\s+vpdpwuuds xmm6,xmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 54 0f d3 71 7f\s+vpdpwuuds xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 f2 54 9f d3 72 80\s+vpdpwuuds xmm6\{k7\}\{z\},xmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 54 2f 52 f4\s+vdpphps ymm6\{k7\},ymm5,ymm4
+\s*[a-f0-9]+:\s*62 f2 54 0f 52 f4\s+vdpphps xmm6\{k7\},xmm5,xmm4
+\s*[a-f0-9]+:\s*62 f2 54 2f 52 b4 f4 00 00 00 10\s+vdpphps ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 54 38 52 31\s+vdpphps ymm6,ymm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 54 2f 52 71 7f\s+vdpphps ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 f2 54 bf 52 72 80\s+vdpphps ymm6\{k7\}\{z\},ymm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 54 0f 52 b4 f4 00 00 00 10\s+vdpphps xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 54 18 52 31\s+vdpphps xmm6,xmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 54 0f 52 71 7f\s+vdpphps xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 f2 54 9f 52 72 80\s+vdpphps xmm6\{k7\}\{z\},xmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f3 56 0f 42 f4 7b\s+vmpsadbw xmm6\{k7\},xmm5,xmm4,0x7b
+\s*[a-f0-9]+:\s*62 f3 56 2f 42 f4 7b\s+vmpsadbw ymm6\{k7\},ymm5,ymm4,0x7b
+\s*[a-f0-9]+:\s*62 f3 56 2f 42 b4 f4 00 00 00 10 7b\s+vmpsadbw ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*62 f3 56 2f 42 31 7b\s+vmpsadbw ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\],0x7b
+\s*[a-f0-9]+:\s*62 f3 56 2f 42 71 7f 7b\s+vmpsadbw ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\+0xfe0\],0x7b
+\s*[a-f0-9]+:\s*62 f3 56 af 42 72 80 7b\s+vmpsadbw ymm6\{k7\}\{z\},ymm5,YMMWORD PTR \[edx-0x1000\],0x7b
+\s*[a-f0-9]+:\s*62 f3 56 0f 42 b4 f4 00 00 00 10 7b\s+vmpsadbw xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*62 f3 56 0f 42 31 7b\s+vmpsadbw xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\],0x7b
+\s*[a-f0-9]+:\s*62 f3 56 0f 42 71 7f 7b\s+vmpsadbw xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\+0x7f0\],0x7b
+\s*[a-f0-9]+:\s*62 f3 56 8f 42 72 80 7b\s+vmpsadbw xmm6\{k7\}\{z\},xmm5,XMMWORD PTR \[edx-0x800\],0x7b
+#pass
diff --git a/gas/testsuite/gas/i386/avx10_2-256-1.d b/gas/testsuite/gas/i386/avx10_2-256-1.d
new file mode 100644
index 0000000..b3485e6
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx10_2-256-1.d
@@ -0,0 +1,149 @@
+#objdump: -dw
+#name: i386 AVX10.2/256 media insns
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*62 f2 57 2f 50 f4\s+vpdpbssd %ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 57 0f 50 f4\s+vpdpbssd %xmm4,%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 57 2f 50 b4 f4 00 00 00 10\s+vpdpbssd 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 57 38 50 31\s+vpdpbssd \(%ecx\)\{1to8\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 57 2f 50 71 7f\s+vpdpbssd 0xfe0\(%ecx\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 57 bf 50 72 80\s+vpdpbssd -0x200\(%edx\)\{1to8\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 57 0f 50 b4 f4 00 00 00 10\s+vpdpbssd 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 57 18 50 31\s+vpdpbssd \(%ecx\)\{1to4\},%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 57 0f 50 71 7f\s+vpdpbssd 0x7f0\(%ecx\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 57 9f 50 72 80\s+vpdpbssd -0x200\(%edx\)\{1to4\},%xmm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 57 2f 51 f4\s+vpdpbssds %ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 57 0f 51 f4\s+vpdpbssds %xmm4,%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 57 2f 51 b4 f4 00 00 00 10\s+vpdpbssds 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 57 38 51 31\s+vpdpbssds \(%ecx\)\{1to8\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 57 2f 51 71 7f\s+vpdpbssds 0xfe0\(%ecx\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 57 bf 51 72 80\s+vpdpbssds -0x200\(%edx\)\{1to8\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 57 0f 51 b4 f4 00 00 00 10\s+vpdpbssds 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 57 18 51 31\s+vpdpbssds \(%ecx\)\{1to4\},%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 57 0f 51 71 7f\s+vpdpbssds 0x7f0\(%ecx\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 57 9f 51 72 80\s+vpdpbssds -0x200\(%edx\)\{1to4\},%xmm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 56 2f 50 f4\s+vpdpbsud %ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 0f 50 f4\s+vpdpbsud %xmm4,%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 2f 50 b4 f4 00 00 00 10\s+vpdpbsud 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 38 50 31\s+vpdpbsud \(%ecx\)\{1to8\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 56 2f 50 71 7f\s+vpdpbsud 0xfe0\(%ecx\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 bf 50 72 80\s+vpdpbsud -0x200\(%edx\)\{1to8\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 56 0f 50 b4 f4 00 00 00 10\s+vpdpbsud 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 18 50 31\s+vpdpbsud \(%ecx\)\{1to4\},%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 56 0f 50 71 7f\s+vpdpbsud 0x7f0\(%ecx\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 9f 50 72 80\s+vpdpbsud -0x200\(%edx\)\{1to4\},%xmm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 56 2f 51 f4\s+vpdpbsuds %ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 0f 51 f4\s+vpdpbsuds %xmm4,%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 2f 51 b4 f4 00 00 00 10\s+vpdpbsuds 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 38 51 31\s+vpdpbsuds \(%ecx\)\{1to8\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 56 2f 51 71 7f\s+vpdpbsuds 0xfe0\(%ecx\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 bf 51 72 80\s+vpdpbsuds -0x200\(%edx\)\{1to8\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 56 0f 51 b4 f4 00 00 00 10\s+vpdpbsuds 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 18 51 31\s+vpdpbsuds \(%ecx\)\{1to4\},%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 56 0f 51 71 7f\s+vpdpbsuds 0x7f0\(%ecx\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 9f 51 72 80\s+vpdpbsuds -0x200\(%edx\)\{1to4\},%xmm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 54 2f 50 f4\s+vpdpbuud %ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 0f 50 f4\s+vpdpbuud %xmm4,%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 2f 50 b4 f4 00 00 00 10\s+vpdpbuud 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 38 50 31\s+vpdpbuud \(%ecx\)\{1to8\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 54 2f 50 71 7f\s+vpdpbuud 0xfe0\(%ecx\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 bf 50 72 80\s+vpdpbuud -0x200\(%edx\)\{1to8\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 54 0f 50 b4 f4 00 00 00 10\s+vpdpbuud 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 18 50 31\s+vpdpbuud \(%ecx\)\{1to4\},%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 54 0f 50 71 7f\s+vpdpbuud 0x7f0\(%ecx\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 9f 50 72 80\s+vpdpbuud -0x200\(%edx\)\{1to4\},%xmm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 54 2f 51 f4\s+vpdpbuuds %ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 0f 51 f4\s+vpdpbuuds %xmm4,%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 2f 51 b4 f4 00 00 00 10\s+vpdpbuuds 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 38 51 31\s+vpdpbuuds \(%ecx\)\{1to8\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 54 2f 51 71 7f\s+vpdpbuuds 0xfe0\(%ecx\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 bf 51 72 80\s+vpdpbuuds -0x200\(%edx\)\{1to8\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 54 0f 51 b4 f4 00 00 00 10\s+vpdpbuuds 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 18 51 31\s+vpdpbuuds \(%ecx\)\{1to4\},%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 54 0f 51 71 7f\s+vpdpbuuds 0x7f0\(%ecx\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 9f 51 72 80\s+vpdpbuuds -0x200\(%edx\)\{1to4\},%xmm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 56 2f d2 f4\s+vpdpwsud %ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 0f d2 f4\s+vpdpwsud %xmm4,%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 2f d2 b4 f4 00 00 00 10\s+vpdpwsud 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 38 d2 31\s+vpdpwsud \(%ecx\)\{1to8\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 56 2f d2 71 7f\s+vpdpwsud 0xfe0\(%ecx\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 bf d2 72 80\s+vpdpwsud -0x200\(%edx\)\{1to8\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 56 0f d2 b4 f4 00 00 00 10\s+vpdpwsud 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 18 d2 31\s+vpdpwsud \(%ecx\)\{1to4\},%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 56 0f d2 71 7f\s+vpdpwsud 0x7f0\(%ecx\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 9f d2 72 80\s+vpdpwsud -0x200\(%edx\)\{1to4\},%xmm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 56 2f d3 f4\s+vpdpwsuds %ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 0f d3 f4\s+vpdpwsuds %xmm4,%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 2f d3 b4 f4 00 00 00 10\s+vpdpwsuds 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 38 d3 31\s+vpdpwsuds \(%ecx\)\{1to8\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 56 2f d3 71 7f\s+vpdpwsuds 0xfe0\(%ecx\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 bf d3 72 80\s+vpdpwsuds -0x200\(%edx\)\{1to8\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 56 0f d3 b4 f4 00 00 00 10\s+vpdpwsuds 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 18 d3 31\s+vpdpwsuds \(%ecx\)\{1to4\},%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 56 0f d3 71 7f\s+vpdpwsuds 0x7f0\(%ecx\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 9f d3 72 80\s+vpdpwsuds -0x200\(%edx\)\{1to4\},%xmm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 55 2f d2 f4\s+vpdpwusd %ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 55 0f d2 f4\s+vpdpwusd %xmm4,%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 55 2f d2 b4 f4 00 00 00 10\s+vpdpwusd 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 55 38 d2 31\s+vpdpwusd \(%ecx\)\{1to8\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 55 2f d2 71 7f\s+vpdpwusd 0xfe0\(%ecx\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 55 bf d2 72 80\s+vpdpwusd -0x200\(%edx\)\{1to8\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 55 0f d2 b4 f4 00 00 00 10\s+vpdpwusd 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 55 18 d2 31\s+vpdpwusd \(%ecx\)\{1to4\},%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 55 0f d2 71 7f\s+vpdpwusd 0x7f0\(%ecx\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 55 9f d2 72 80\s+vpdpwusd -0x200\(%edx\)\{1to4\},%xmm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 55 2f d3 f4\s+vpdpwusds %ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 55 0f d3 f4\s+vpdpwusds %xmm4,%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 55 2f d3 b4 f4 00 00 00 10\s+vpdpwusds 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 55 38 d3 31\s+vpdpwusds \(%ecx\)\{1to8\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 55 2f d3 71 7f\s+vpdpwusds 0xfe0\(%ecx\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 55 bf d3 72 80\s+vpdpwusds -0x200\(%edx\)\{1to8\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 55 0f d3 b4 f4 00 00 00 10\s+vpdpwusds 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 55 18 d3 31\s+vpdpwusds \(%ecx\)\{1to4\},%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 55 0f d3 71 7f\s+vpdpwusds 0x7f0\(%ecx\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 55 9f d3 72 80\s+vpdpwusds -0x200\(%edx\)\{1to4\},%xmm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 54 2f d2 f4\s+vpdpwuud %ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 0f d2 f4\s+vpdpwuud %xmm4,%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 2f d2 b4 f4 00 00 00 10\s+vpdpwuud 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 38 d2 31\s+vpdpwuud \(%ecx\)\{1to8\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 54 2f d2 71 7f\s+vpdpwuud 0xfe0\(%ecx\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 bf d2 72 80\s+vpdpwuud -0x200\(%edx\)\{1to8\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 54 0f d2 b4 f4 00 00 00 10\s+vpdpwuud 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 18 d2 31\s+vpdpwuud \(%ecx\)\{1to4\},%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 54 0f d2 71 7f\s+vpdpwuud 0x7f0\(%ecx\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 9f d2 72 80\s+vpdpwuud -0x200\(%edx\)\{1to4\},%xmm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 54 2f d3 f4\s+vpdpwuuds %ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 0f d3 f4\s+vpdpwuuds %xmm4,%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 2f d3 b4 f4 00 00 00 10\s+vpdpwuuds 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 38 d3 31\s+vpdpwuuds \(%ecx\)\{1to8\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 54 2f d3 71 7f\s+vpdpwuuds 0xfe0\(%ecx\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 bf d3 72 80\s+vpdpwuuds -0x200\(%edx\)\{1to8\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 54 0f d3 b4 f4 00 00 00 10\s+vpdpwuuds 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 18 d3 31\s+vpdpwuuds \(%ecx\)\{1to4\},%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 54 0f d3 71 7f\s+vpdpwuuds 0x7f0\(%ecx\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 9f d3 72 80\s+vpdpwuuds -0x200\(%edx\)\{1to4\},%xmm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 54 2f 52 f4\s+vdpphps %ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 0f 52 f4\s+vdpphps %xmm4,%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 2f 52 b4 f4 00 00 00 10\s+vdpphps 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 38 52 31\s+vdpphps \(%ecx\)\{1to8\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 54 2f 52 71 7f\s+vdpphps 0xfe0\(%ecx\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 bf 52 72 80\s+vdpphps -0x200\(%edx\)\{1to8\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 54 0f 52 b4 f4 00 00 00 10\s+vdpphps 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 18 52 31\s+vdpphps \(%ecx\)\{1to4\},%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 54 0f 52 71 7f\s+vdpphps 0x7f0\(%ecx\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 9f 52 72 80\s+vdpphps -0x200\(%edx\)\{1to4\},%xmm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f3 56 0f 42 f4 7b\s+vmpsadbw \$0x7b,%xmm4,%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 56 2f 42 f4 7b\s+vmpsadbw \$0x7b,%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 56 2f 42 b4 f4 00 00 00 10 7b\s+vmpsadbw \$0x7b,0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 56 2f 42 31 7b\s+vmpsadbw \$0x7b,\(%ecx\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 56 2f 42 71 7f 7b\s+vmpsadbw \$0x7b,0xfe0\(%ecx\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 56 af 42 72 80 7b\s+vmpsadbw \$0x7b,-0x1000\(%edx\),%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f3 56 0f 42 b4 f4 00 00 00 10 7b\s+vmpsadbw \$0x7b,0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 56 0f 42 31 7b\s+vmpsadbw \$0x7b,\(%ecx\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 56 0f 42 71 7f 7b\s+vmpsadbw \$0x7b,0x7f0\(%ecx\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 56 8f 42 72 80 7b\s+vmpsadbw \$0x7b,-0x800\(%edx\),%xmm5,%xmm6\{%k7\}\{z\}
+#pass
diff --git a/gas/testsuite/gas/i386/avx10_2-256-1.s b/gas/testsuite/gas/i386/avx10_2-256-1.s
new file mode 100644
index 0000000..b1b30bd
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx10_2-256-1.s
@@ -0,0 +1,111 @@
+# Check 32bit AVX10.2/256 instructions
+
+	.arch generic32
+	.arch .avx10.2/256
+	.text
+_start:
+	.irp m, ss, su, uu
+	.irp s, "", s
+	vpdpb\m\()d\s	%ymm4, %ymm5, %ymm6{%k7}
+	vpdpb\m\()d\s	%xmm4, %xmm5, %xmm6{%k7}
+	vpdpb\m\()d\s	0x10000000(%esp, %esi, 8), %ymm5, %ymm6{%k7}
+	vpdpb\m\()d\s	(%ecx){1to8}, %ymm5, %ymm6
+	vpdpb\m\()d\s	4064(%ecx), %ymm5, %ymm6{%k7}
+	vpdpb\m\()d\s	-512(%edx){1to8}, %ymm5, %ymm6{%k7}{z}
+	vpdpb\m\()d\s	0x10000000(%esp, %esi, 8), %xmm5, %xmm6{%k7}
+	vpdpb\m\()d\s	(%ecx){1to4}, %xmm5, %xmm6
+	vpdpb\m\()d\s	2032(%ecx), %xmm5, %xmm6{%k7}
+	vpdpb\m\()d\s	-512(%edx){1to4}, %xmm5, %xmm6{%k7}{z}
+	.endr
+	.endr
+
+	.irp m, su, us, uu
+	.irp s, "", s
+	vpdpw\m\()d\s	%ymm4, %ymm5, %ymm6{%k7}
+	vpdpw\m\()d\s	%xmm4, %xmm5, %xmm6{%k7}
+	vpdpw\m\()d\s	0x10000000(%esp, %esi, 8), %ymm5, %ymm6{%k7}
+	vpdpw\m\()d\s	(%ecx){1to8}, %ymm5, %ymm6
+	vpdpw\m\()d\s	4064(%ecx), %ymm5, %ymm6{%k7}
+	vpdpw\m\()d\s	-512(%edx){1to8}, %ymm5, %ymm6{%k7}{z}
+	vpdpw\m\()d\s	0x10000000(%esp, %esi, 8), %xmm5, %xmm6{%k7}
+	vpdpw\m\()d\s	(%ecx){1to4}, %xmm5, %xmm6
+	vpdpw\m\()d\s	2032(%ecx), %xmm5, %xmm6{%k7}
+	vpdpw\m\()d\s	-512(%edx){1to4}, %xmm5, %xmm6{%k7}{z}
+	.endr
+	.endr
+
+	vdpphps	%ymm4, %ymm5, %ymm6{%k7}
+	vdpphps	%xmm4, %xmm5, %xmm6{%k7}
+	vdpphps	0x10000000(%esp, %esi, 8), %ymm5, %ymm6{%k7}
+	vdpphps	(%ecx){1to8}, %ymm5, %ymm6
+	vdpphps	4064(%ecx), %ymm5, %ymm6{%k7}
+	vdpphps	-512(%edx){1to8}, %ymm5, %ymm6{%k7}{z}
+	vdpphps	0x10000000(%esp, %esi, 8), %xmm5, %xmm6{%k7}
+	vdpphps	(%ecx){1to4}, %xmm5, %xmm6
+	vdpphps	2032(%ecx), %xmm5, %xmm6{%k7}
+	vdpphps	-512(%edx){1to4}, %xmm5, %xmm6{%k7}{z}
+
+	vmpsadbw	$123, %xmm4, %xmm5, %xmm6{%k7}
+	vmpsadbw	$123, %ymm4, %ymm5, %ymm6{%k7}
+	vmpsadbw	$123, 0x10000000(%esp, %esi, 8), %ymm5, %ymm6{%k7}
+	vmpsadbw	$123, (%ecx), %ymm5, %ymm6{%k7}
+	vmpsadbw	$123, 4064(%ecx), %ymm5, %ymm6{%k7}
+	vmpsadbw	$123, -4096(%edx), %ymm5, %ymm6{%k7}{z}
+	vmpsadbw	$123, 0x10000000(%esp, %esi, 8), %xmm5, %xmm6{%k7}
+	vmpsadbw	$123, (%ecx), %xmm5, %xmm6{%k7}
+	vmpsadbw	$123, 2032(%ecx), %xmm5, %xmm6{%k7}
+	vmpsadbw	$123, -2048(%edx), %xmm5, %xmm6{%k7}{z}
+
+_intel:
+	.intel_syntax noprefix
+	.irp m, ss, su, uu
+	.irp s, "", s
+	vpdpb\m\()d\s	ymm6{k7}, ymm5, ymm4
+	vpdpb\m\()d\s	xmm6{k7}, xmm5, xmm4
+	vpdpb\m\()d\s	ymm6{k7}, ymm5, YMMWORD PTR [esp+esi*8+0x10000000]
+	vpdpb\m\()d\s	ymm6, ymm5, DWORD PTR [ecx]{1to8}
+	vpdpb\m\()d\s	ymm6{k7}, ymm5, YMMWORD PTR [ecx+4064]
+	vpdpb\m\()d\s	ymm6{k7}{z}, ymm5, DWORD PTR [edx-512]{1to8}
+	vpdpb\m\()d\s	xmm6{k7}, xmm5, XMMWORD PTR [esp+esi*8+0x10000000]
+	vpdpb\m\()d\s	xmm6, xmm5, DWORD PTR [ecx]{1to4}
+	vpdpb\m\()d\s	xmm6{k7}, xmm5, XMMWORD PTR [ecx+2032]
+	vpdpb\m\()d\s	xmm6{k7}{z}, xmm5, DWORD PTR [edx-512]{1to4}
+	.endr
+	.endr
+
+	.irp m, su, us, uu
+	.irp s, "", s
+	vpdpw\m\()d\s	ymm6{k7}, ymm5, ymm4
+	vpdpw\m\()d\s	xmm6{k7}, xmm5, xmm4
+	vpdpw\m\()d\s	ymm6{k7}, ymm5, YMMWORD PTR [esp+esi*8+0x10000000]
+	vpdpw\m\()d\s	ymm6, ymm5, DWORD PTR [ecx]{1to8}
+	vpdpw\m\()d\s	ymm6{k7}, ymm5, YMMWORD PTR [ecx+4064]
+	vpdpw\m\()d\s	ymm6{k7}{z}, ymm5, DWORD PTR [edx-512]{1to8}
+	vpdpw\m\()d\s	xmm6{k7}, xmm5, XMMWORD PTR [esp+esi*8+0x10000000]
+	vpdpw\m\()d\s	xmm6, xmm5, DWORD PTR [ecx]{1to4}
+	vpdpw\m\()d\s	xmm6{k7}, xmm5, XMMWORD PTR [ecx+2032]
+	vpdpw\m\()d\s	xmm6{k7}{z}, xmm5, DWORD PTR [edx-512]{1to4}
+	.endr
+	.endr
+
+	vdpphps	ymm6{k7}, ymm5, ymm4
+	vdpphps	xmm6{k7}, xmm5, xmm4
+	vdpphps	ymm6{k7}, ymm5, YMMWORD PTR [esp+esi*8+0x10000000]
+	vdpphps	ymm6, ymm5, DWORD PTR [ecx]{1to8}
+	vdpphps	ymm6{k7}, ymm5, YMMWORD PTR [ecx+4064]
+	vdpphps	ymm6{k7}{z}, ymm5, DWORD PTR [edx-512]{1to8}
+	vdpphps	xmm6{k7}, xmm5, XMMWORD PTR [esp+esi*8+0x10000000]
+	vdpphps	xmm6, xmm5, DWORD PTR [ecx]{1to4}
+	vdpphps	xmm6{k7}, xmm5, XMMWORD PTR [ecx+2032]
+	vdpphps	xmm6{k7}{z}, xmm5, DWORD PTR [edx-512]{1to4}
+
+	vmpsadbw	xmm6{k7}, xmm5, xmm4, 123
+	vmpsadbw	ymm6{k7}, ymm5, ymm4, 123
+	vmpsadbw	ymm6{k7}, ymm5, YMMWORD PTR [esp+esi*8+0x10000000], 123
+	vmpsadbw	ymm6{k7}, ymm5, YMMWORD PTR [ecx], 123
+	vmpsadbw	ymm6{k7}, ymm5, YMMWORD PTR [ecx+4064], 123
+	vmpsadbw	ymm6{k7}{z}, ymm5, YMMWORD PTR [edx-4096], 123
+	vmpsadbw	xmm6{k7}, xmm5, XMMWORD PTR [esp+esi*8+0x10000000], 123
+	vmpsadbw	xmm6{k7}, xmm5, XMMWORD PTR [ecx], 123
+	vmpsadbw	xmm6{k7}, xmm5, XMMWORD PTR [ecx+2032], 123
+	vmpsadbw	xmm6{k7}{z}, xmm5, XMMWORD PTR [edx-2048], 123
diff --git a/gas/testsuite/gas/i386/avx10_2-512-1-intel.d b/gas/testsuite/gas/i386/avx10_2-512-1-intel.d
new file mode 100644
index 0000000..27a36d2
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx10_2-512-1-intel.d
@@ -0,0 +1,81 @@
+#objdump: -dw -Mintel
+#name: i386 AVX10.2/512 media insns (Intel disassembly)
+#source: avx10_2-512-1.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+#...
+[a-f0-9]+ <_intel>:
+\s*[a-f0-9]+:\s*62 f2 57 48 50 f4\s+vpdpbssd zmm6,zmm5,zmm4
+\s*[a-f0-9]+:\s*62 f2 57 4f 50 b4 f4 00 00 00 10\s+vpdpbssd zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 57 58 50 31\s+vpdpbssd zmm6,zmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 57 48 50 71 7f\s+vpdpbssd zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 f2 57 df 50 72 80\s+vpdpbssd zmm6\{k7\}\{z\},zmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 57 48 51 f4\s+vpdpbssds zmm6,zmm5,zmm4
+\s*[a-f0-9]+:\s*62 f2 57 4f 51 b4 f4 00 00 00 10\s+vpdpbssds zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 57 58 51 31\s+vpdpbssds zmm6,zmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 57 48 51 71 7f\s+vpdpbssds zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 f2 57 df 51 72 80\s+vpdpbssds zmm6\{k7\}\{z\},zmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 56 48 50 f4\s+vpdpbsud zmm6,zmm5,zmm4
+\s*[a-f0-9]+:\s*62 f2 56 4f 50 b4 f4 00 00 00 10\s+vpdpbsud zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 56 58 50 31\s+vpdpbsud zmm6,zmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 56 48 50 71 7f\s+vpdpbsud zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 f2 56 df 50 72 80\s+vpdpbsud zmm6\{k7\}\{z\},zmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 56 48 51 f4\s+vpdpbsuds zmm6,zmm5,zmm4
+\s*[a-f0-9]+:\s*62 f2 56 4f 51 b4 f4 00 00 00 10\s+vpdpbsuds zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 56 58 51 31\s+vpdpbsuds zmm6,zmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 56 48 51 71 7f\s+vpdpbsuds zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 f2 56 df 51 72 80\s+vpdpbsuds zmm6\{k7\}\{z\},zmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 54 48 50 f4\s+vpdpbuud zmm6,zmm5,zmm4
+\s*[a-f0-9]+:\s*62 f2 54 4f 50 b4 f4 00 00 00 10\s+vpdpbuud zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 54 58 50 31\s+vpdpbuud zmm6,zmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 54 48 50 71 7f\s+vpdpbuud zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 f2 54 df 50 72 80\s+vpdpbuud zmm6\{k7\}\{z\},zmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 54 48 51 f4\s+vpdpbuuds zmm6,zmm5,zmm4
+\s*[a-f0-9]+:\s*62 f2 54 4f 51 b4 f4 00 00 00 10\s+vpdpbuuds zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 54 58 51 31\s+vpdpbuuds zmm6,zmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 54 48 51 71 7f\s+vpdpbuuds zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 f2 54 df 51 72 80\s+vpdpbuuds zmm6\{k7\}\{z\},zmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 56 48 d2 f4\s+vpdpwsud zmm6,zmm5,zmm4
+\s*[a-f0-9]+:\s*62 f2 56 4f d2 b4 f4 00 00 00 10\s+vpdpwsud zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 56 58 d2 31\s+vpdpwsud zmm6,zmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 56 48 d2 71 7f\s+vpdpwsud zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 f2 56 df d2 72 80\s+vpdpwsud zmm6\{k7\}\{z\},zmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 56 48 d3 f4\s+vpdpwsuds zmm6,zmm5,zmm4
+\s*[a-f0-9]+:\s*62 f2 56 4f d3 b4 f4 00 00 00 10\s+vpdpwsuds zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 56 58 d3 31\s+vpdpwsuds zmm6,zmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 56 48 d3 71 7f\s+vpdpwsuds zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 f2 56 df d3 72 80\s+vpdpwsuds zmm6\{k7\}\{z\},zmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 55 48 d2 f4\s+vpdpwusd zmm6,zmm5,zmm4
+\s*[a-f0-9]+:\s*62 f2 55 4f d2 b4 f4 00 00 00 10\s+vpdpwusd zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 55 58 d2 31\s+vpdpwusd zmm6,zmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 55 48 d2 71 7f\s+vpdpwusd zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 f2 55 df d2 72 80\s+vpdpwusd zmm6\{k7\}\{z\},zmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 55 48 d3 f4\s+vpdpwusds zmm6,zmm5,zmm4
+\s*[a-f0-9]+:\s*62 f2 55 4f d3 b4 f4 00 00 00 10\s+vpdpwusds zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 55 58 d3 31\s+vpdpwusds zmm6,zmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 55 48 d3 71 7f\s+vpdpwusds zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 f2 55 df d3 72 80\s+vpdpwusds zmm6\{k7\}\{z\},zmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 54 48 d2 f4\s+vpdpwuud zmm6,zmm5,zmm4
+\s*[a-f0-9]+:\s*62 f2 54 4f d2 b4 f4 00 00 00 10\s+vpdpwuud zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 54 58 d2 31\s+vpdpwuud zmm6,zmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 54 48 d2 71 7f\s+vpdpwuud zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 f2 54 df d2 72 80\s+vpdpwuud zmm6\{k7\}\{z\},zmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 54 48 d3 f4\s+vpdpwuuds zmm6,zmm5,zmm4
+\s*[a-f0-9]+:\s*62 f2 54 4f d3 b4 f4 00 00 00 10\s+vpdpwuuds zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 54 58 d3 31\s+vpdpwuuds zmm6,zmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 54 48 d3 71 7f\s+vpdpwuuds zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 f2 54 df d3 72 80\s+vpdpwuuds zmm6\{k7\}\{z\},zmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 54 48 52 f4\s+vdpphps zmm6,zmm5,zmm4
+\s*[a-f0-9]+:\s*62 f2 54 4f 52 b4 f4 00 00 00 10\s+vdpphps zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 54 58 52 31\s+vdpphps zmm6,zmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 54 48 52 71 7f\s+vdpphps zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 f2 54 df 52 72 80\s+vdpphps zmm6\{k7\}\{z\},zmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f3 56 48 42 f4 7b\s+vmpsadbw zmm6,zmm5,zmm4,0x7b
+\s*[a-f0-9]+:\s*62 f3 56 4f 42 b4 f4 00 00 00 10 7b\s+vmpsadbw zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*62 f3 56 48 42 31 7b\s+vmpsadbw zmm6,zmm5,ZMMWORD PTR \[ecx\],0x7b
+\s*[a-f0-9]+:\s*62 f3 56 48 42 71 7f 7b\s+vmpsadbw zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\],0x7b
+\s*[a-f0-9]+:\s*62 f3 56 cf 42 72 80 7b\s+vmpsadbw zmm6\{k7\}\{z\},zmm5,ZMMWORD PTR \[edx-0x2000\],0x7b
+#pass
diff --git a/gas/testsuite/gas/i386/avx10_2-512-1.d b/gas/testsuite/gas/i386/avx10_2-512-1.d
new file mode 100644
index 0000000..746c77a
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx10_2-512-1.d
@@ -0,0 +1,79 @@
+#objdump: -dw
+#name: i386 AVX10.2/512 media insns
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*62 f2 57 48 50 f4\s+vpdpbssd %zmm4,%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 57 4f 50 b4 f4 00 00 00 10\s+vpdpbssd 0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 57 58 50 31\s+vpdpbssd \(%ecx\)\{1to16\},%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 57 48 50 71 7f\s+vpdpbssd 0x1fc0\(%ecx\),%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 57 df 50 72 80\s+vpdpbssd -0x200\(%edx\)\{1to16\},%zmm5,%zmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 57 48 51 f4\s+vpdpbssds %zmm4,%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 57 4f 51 b4 f4 00 00 00 10\s+vpdpbssds 0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 57 58 51 31\s+vpdpbssds \(%ecx\)\{1to16\},%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 57 48 51 71 7f\s+vpdpbssds 0x1fc0\(%ecx\),%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 57 df 51 72 80\s+vpdpbssds -0x200\(%edx\)\{1to16\},%zmm5,%zmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 56 48 50 f4\s+vpdpbsud %zmm4,%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 56 4f 50 b4 f4 00 00 00 10\s+vpdpbsud 0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 58 50 31\s+vpdpbsud \(%ecx\)\{1to16\},%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 56 48 50 71 7f\s+vpdpbsud 0x1fc0\(%ecx\),%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 56 df 50 72 80\s+vpdpbsud -0x200\(%edx\)\{1to16\},%zmm5,%zmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 56 48 51 f4\s+vpdpbsuds %zmm4,%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 56 4f 51 b4 f4 00 00 00 10\s+vpdpbsuds 0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 58 51 31\s+vpdpbsuds \(%ecx\)\{1to16\},%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 56 48 51 71 7f\s+vpdpbsuds 0x1fc0\(%ecx\),%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 56 df 51 72 80\s+vpdpbsuds -0x200\(%edx\)\{1to16\},%zmm5,%zmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 54 48 50 f4\s+vpdpbuud %zmm4,%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 54 4f 50 b4 f4 00 00 00 10\s+vpdpbuud 0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 58 50 31\s+vpdpbuud \(%ecx\)\{1to16\},%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 54 48 50 71 7f\s+vpdpbuud 0x1fc0\(%ecx\),%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 54 df 50 72 80\s+vpdpbuud -0x200\(%edx\)\{1to16\},%zmm5,%zmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 54 48 51 f4\s+vpdpbuuds %zmm4,%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 54 4f 51 b4 f4 00 00 00 10\s+vpdpbuuds 0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 58 51 31\s+vpdpbuuds \(%ecx\)\{1to16\},%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 54 48 51 71 7f\s+vpdpbuuds 0x1fc0\(%ecx\),%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 54 df 51 72 80\s+vpdpbuuds -0x200\(%edx\)\{1to16\},%zmm5,%zmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 56 48 d2 f4\s+vpdpwsud %zmm4,%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 56 4f d2 b4 f4 00 00 00 10\s+vpdpwsud 0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 58 d2 31\s+vpdpwsud \(%ecx\)\{1to16\},%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 56 48 d2 71 7f\s+vpdpwsud 0x1fc0\(%ecx\),%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 56 df d2 72 80\s+vpdpwsud -0x200\(%edx\)\{1to16\},%zmm5,%zmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 56 48 d3 f4\s+vpdpwsuds %zmm4,%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 56 4f d3 b4 f4 00 00 00 10\s+vpdpwsuds 0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 58 d3 31\s+vpdpwsuds \(%ecx\)\{1to16\},%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 56 48 d3 71 7f\s+vpdpwsuds 0x1fc0\(%ecx\),%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 56 df d3 72 80\s+vpdpwsuds -0x200\(%edx\)\{1to16\},%zmm5,%zmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 55 48 d2 f4\s+vpdpwusd %zmm4,%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 55 4f d2 b4 f4 00 00 00 10\s+vpdpwusd 0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 55 58 d2 31\s+vpdpwusd \(%ecx\)\{1to16\},%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 55 48 d2 71 7f\s+vpdpwusd 0x1fc0\(%ecx\),%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 55 df d2 72 80\s+vpdpwusd -0x200\(%edx\)\{1to16\},%zmm5,%zmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 55 48 d3 f4\s+vpdpwusds %zmm4,%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 55 4f d3 b4 f4 00 00 00 10\s+vpdpwusds 0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 55 58 d3 31\s+vpdpwusds \(%ecx\)\{1to16\},%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 55 48 d3 71 7f\s+vpdpwusds 0x1fc0\(%ecx\),%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 55 df d3 72 80\s+vpdpwusds -0x200\(%edx\)\{1to16\},%zmm5,%zmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 54 48 d2 f4\s+vpdpwuud %zmm4,%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 54 4f d2 b4 f4 00 00 00 10\s+vpdpwuud 0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 58 d2 31\s+vpdpwuud \(%ecx\)\{1to16\},%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 54 48 d2 71 7f\s+vpdpwuud 0x1fc0\(%ecx\),%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 54 df d2 72 80\s+vpdpwuud -0x200\(%edx\)\{1to16\},%zmm5,%zmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 54 48 d3 f4\s+vpdpwuuds %zmm4,%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 54 4f d3 b4 f4 00 00 00 10\s+vpdpwuuds 0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 58 d3 31\s+vpdpwuuds \(%ecx\)\{1to16\},%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 54 48 d3 71 7f\s+vpdpwuuds 0x1fc0\(%ecx\),%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 54 df d3 72 80\s+vpdpwuuds -0x200\(%edx\)\{1to16\},%zmm5,%zmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 54 48 52 f4\s+vdpphps %zmm4,%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 54 4f 52 b4 f4 00 00 00 10\s+vdpphps 0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 58 52 31\s+vdpphps \(%ecx\)\{1to16\},%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 54 48 52 71 7f\s+vdpphps 0x1fc0\(%ecx\),%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 54 df 52 72 80\s+vdpphps -0x200\(%edx\)\{1to16\},%zmm5,%zmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f3 56 48 42 f4 7b\s+vmpsadbw \$0x7b,%zmm4,%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f3 56 4f 42 b4 f4 00 00 00 10 7b\s+vmpsadbw \$0x7b,0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 56 48 42 31 7b\s+vmpsadbw \$0x7b,\(%ecx\),%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f3 56 48 42 71 7f 7b\s+vmpsadbw \$0x7b,0x1fc0\(%ecx\),%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f3 56 cf 42 72 80 7b\s+vmpsadbw \$0x7b,-0x2000\(%edx\),%zmm5,%zmm6\{%k7\}\{z\}
+#pass
diff --git a/gas/testsuite/gas/i386/avx10_2-512-1.s b/gas/testsuite/gas/i386/avx10_2-512-1.s
new file mode 100644
index 0000000..9133c03
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx10_2-512-1.s
@@ -0,0 +1,71 @@
+# Check 32bit AVX10.2/512 instructions
+
+	.arch generic32
+	.arch .avx10.2/512
+	.text
+_start:
+	.irp m, ss, su, uu
+	.irp s, "", s
+	vpdpb\m\()d\s	%zmm4, %zmm5, %zmm6
+	vpdpb\m\()d\s	0x10000000(%esp, %esi, 8), %zmm5, %zmm6{%k7}
+	vpdpb\m\()d\s	(%ecx){1to16}, %zmm5, %zmm6
+	vpdpb\m\()d\s	8128(%ecx), %zmm5, %zmm6
+	vpdpb\m\()d\s	-512(%edx){1to16}, %zmm5, %zmm6{%k7}{z}
+	.endr
+	.endr
+
+	.irp m, su, us, uu
+	.irp s, "", s
+	vpdpw\m\()d\s	%zmm4, %zmm5, %zmm6
+	vpdpw\m\()d\s	0x10000000(%esp, %esi, 8), %zmm5, %zmm6{%k7}
+	vpdpw\m\()d\s	(%ecx){1to16}, %zmm5, %zmm6
+	vpdpw\m\()d\s	8128(%ecx), %zmm5, %zmm6
+	vpdpw\m\()d\s	-512(%edx){1to16}, %zmm5, %zmm6{%k7}{z}
+	.endr
+	.endr
+
+	vdpphps	%zmm4, %zmm5, %zmm6
+	vdpphps	0x10000000(%esp, %esi, 8), %zmm5, %zmm6{%k7}
+	vdpphps	(%ecx){1to16}, %zmm5, %zmm6
+	vdpphps	8128(%ecx), %zmm5, %zmm6
+	vdpphps	-512(%edx){1to16}, %zmm5, %zmm6{%k7}{z}
+
+	vmpsadbw	$123, %zmm4, %zmm5, %zmm6
+	vmpsadbw	$123, 0x10000000(%esp, %esi, 8), %zmm5, %zmm6{%k7}
+	vmpsadbw	$123, (%ecx), %zmm5, %zmm6
+	vmpsadbw	$123, 8128(%ecx), %zmm5, %zmm6
+	vmpsadbw	$123, -8192(%edx), %zmm5, %zmm6{%k7}{z}
+
+_intel:
+	.intel_syntax noprefix
+	.irp m, ss, su, uu
+	.irp s, "", s
+	vpdpb\m\()d\s	zmm6, zmm5, zmm4
+	vpdpb\m\()d\s	zmm6{k7}, zmm5, ZMMWORD PTR [esp+esi*8+0x10000000]
+	vpdpb\m\()d\s	zmm6, zmm5, DWORD PTR [ecx]{1to16}
+	vpdpb\m\()d\s	zmm6, zmm5, ZMMWORD PTR [ecx+8128]
+	vpdpb\m\()d\s	zmm6{k7}{z}, zmm5, DWORD PTR [edx-512]{1to16}
+	.endr
+	.endr
+
+	.irp m, su, us, uu
+	.irp s, "", s
+	vpdpw\m\()d\s	zmm6, zmm5, zmm4
+	vpdpw\m\()d\s	zmm6{k7}, zmm5, ZMMWORD PTR [esp+esi*8+0x10000000]
+	vpdpw\m\()d\s	zmm6, zmm5, DWORD PTR [ecx]{1to16}
+	vpdpw\m\()d\s	zmm6, zmm5, ZMMWORD PTR [ecx+8128]
+	vpdpw\m\()d\s	zmm6{k7}{z}, zmm5, DWORD PTR [edx-512]{1to16}
+	.endr
+	.endr
+
+	vdpphps	zmm6, zmm5, zmm4
+	vdpphps	zmm6{k7}, zmm5, ZMMWORD PTR [esp+esi*8+0x10000000]
+	vdpphps	zmm6, zmm5, DWORD PTR [ecx]{1to16}
+	vdpphps	zmm6, zmm5, ZMMWORD PTR [ecx+8128]
+	vdpphps	zmm6{k7}{z}, zmm5, DWORD PTR [edx-512]{1to16}
+
+	vmpsadbw	zmm6, zmm5, zmm4, 123
+	vmpsadbw	zmm6{k7}, zmm5, ZMMWORD PTR [esp+esi*8+0x10000000], 123
+	vmpsadbw	zmm6, zmm5, ZMMWORD PTR [ecx], 123
+	vmpsadbw	zmm6, zmm5, ZMMWORD PTR [ecx+8128], 123
+	vmpsadbw	zmm6{k7}{z}, zmm5, ZMMWORD PTR [edx-8192], 123
diff --git a/gas/testsuite/gas/i386/avx10_2-evex-promote.d b/gas/testsuite/gas/i386/avx10_2-evex-promote.d
new file mode 100644
index 0000000..ba3ef92
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx10_2-evex-promote.d
@@ -0,0 +1,113 @@
+#objdump: -dw
+#name: i386 AVX10.2/256 evex promote insns
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*c4 e2 57 50 f4\s+vpdpbssd %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 53 50 f4\s+vpdpbssd %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 57 50 31\s+vpdpbssd \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 53 50 31\s+vpdpbssd \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 57 28 50 f4\s+\{evex\} vpdpbssd %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 57 08 50 f4\s+\{evex\} vpdpbssd %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 57 28 50 31\s+\{evex\} vpdpbssd \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 57 08 50 31\s+\{evex\} vpdpbssd \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 57 51 f4\s+vpdpbssds %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 53 51 f4\s+vpdpbssds %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 57 51 31\s+vpdpbssds \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 53 51 31\s+vpdpbssds \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 57 28 51 f4\s+\{evex\} vpdpbssds %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 57 08 51 f4\s+\{evex\} vpdpbssds %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 57 28 51 31\s+\{evex\} vpdpbssds \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 57 08 51 31\s+\{evex\} vpdpbssds \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 56 50 f4\s+vpdpbsud %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 52 50 f4\s+vpdpbsud %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 56 50 31\s+vpdpbsud \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 52 50 31\s+vpdpbsud \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 56 28 50 f4\s+\{evex\} vpdpbsud %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 56 08 50 f4\s+\{evex\} vpdpbsud %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 56 28 50 31\s+\{evex\} vpdpbsud \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 56 08 50 31\s+\{evex\} vpdpbsud \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 56 51 f4\s+vpdpbsuds %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 52 51 f4\s+vpdpbsuds %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 56 51 31\s+vpdpbsuds \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 52 51 31\s+vpdpbsuds \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 56 28 51 f4\s+\{evex\} vpdpbsuds %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 56 08 51 f4\s+\{evex\} vpdpbsuds %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 56 28 51 31\s+\{evex\} vpdpbsuds \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 56 08 51 31\s+\{evex\} vpdpbsuds \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 54 50 f4\s+vpdpbuud %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 50 50 f4\s+vpdpbuud %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 54 50 31\s+vpdpbuud \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 50 50 31\s+vpdpbuud \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 54 28 50 f4\s+\{evex\} vpdpbuud %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 54 08 50 f4\s+\{evex\} vpdpbuud %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 54 28 50 31\s+\{evex\} vpdpbuud \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 54 08 50 31\s+\{evex\} vpdpbuud \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 54 51 f4\s+vpdpbuuds %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 50 51 f4\s+vpdpbuuds %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 54 51 31\s+vpdpbuuds \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 50 51 31\s+vpdpbuuds \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 54 28 51 f4\s+\{evex\} vpdpbuuds %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 54 08 51 f4\s+\{evex\} vpdpbuuds %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 54 28 51 31\s+\{evex\} vpdpbuuds \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 54 08 51 31\s+\{evex\} vpdpbuuds \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 56 d2 f4\s+vpdpwsud %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 52 d2 f4\s+vpdpwsud %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 56 d2 31\s+vpdpwsud \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 52 d2 31\s+vpdpwsud \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 56 28 d2 f4\s+\{evex\} vpdpwsud %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 56 08 d2 f4\s+\{evex\} vpdpwsud %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 56 28 d2 31\s+\{evex\} vpdpwsud \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 56 08 d2 31\s+\{evex\} vpdpwsud \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 56 d3 f4\s+vpdpwsuds %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 52 d3 f4\s+vpdpwsuds %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 56 d3 31\s+vpdpwsuds \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 52 d3 31\s+vpdpwsuds \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 56 28 d3 f4\s+\{evex\} vpdpwsuds %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 56 08 d3 f4\s+\{evex\} vpdpwsuds %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 56 28 d3 31\s+\{evex\} vpdpwsuds \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 56 08 d3 31\s+\{evex\} vpdpwsuds \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 55 d2 f4\s+vpdpwusd %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 51 d2 f4\s+vpdpwusd %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 55 d2 31\s+vpdpwusd \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 51 d2 31\s+vpdpwusd \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 55 28 d2 f4\s+\{evex\} vpdpwusd %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 55 08 d2 f4\s+\{evex\} vpdpwusd %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 55 28 d2 31\s+\{evex\} vpdpwusd \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 55 08 d2 31\s+\{evex\} vpdpwusd \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 55 d3 f4\s+vpdpwusds %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 51 d3 f4\s+vpdpwusds %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 55 d3 31\s+vpdpwusds \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 51 d3 31\s+vpdpwusds \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 55 28 d3 f4\s+\{evex\} vpdpwusds %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 55 08 d3 f4\s+\{evex\} vpdpwusds %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 55 28 d3 31\s+\{evex\} vpdpwusds \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 55 08 d3 31\s+\{evex\} vpdpwusds \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 54 d2 f4\s+vpdpwuud %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 50 d2 f4\s+vpdpwuud %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 54 d2 31\s+vpdpwuud \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 50 d2 31\s+vpdpwuud \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 54 28 d2 f4\s+\{evex\} vpdpwuud %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 54 08 d2 f4\s+\{evex\} vpdpwuud %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 54 28 d2 31\s+\{evex\} vpdpwuud \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 54 08 d2 31\s+\{evex\} vpdpwuud \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 54 d3 f4\s+vpdpwuuds %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 50 d3 f4\s+vpdpwuuds %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 54 d3 31\s+vpdpwuuds \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 50 d3 31\s+vpdpwuuds \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 54 28 d3 f4\s+\{evex\} vpdpwuuds %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 54 08 d3 f4\s+\{evex\} vpdpwuuds %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 54 28 d3 31\s+\{evex\} vpdpwuuds \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 54 08 d3 31\s+\{evex\} vpdpwuuds \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e3 51 42 f4 7b\s+vmpsadbw \$0x7b,%xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e3 55 42 f4 7b\s+vmpsadbw \$0x7b,%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e3 51 42 31 7b\s+vmpsadbw \$0x7b,\(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e3 55 42 31 7b\s+vmpsadbw \$0x7b,\(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f3 56 08 42 f4 7b\s+\{evex\} vmpsadbw \$0x7b,%xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f3 56 28 42 f4 7b\s+\{evex\} vmpsadbw \$0x7b,%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f3 56 08 42 31 7b\s+\{evex\} vmpsadbw \$0x7b,\(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f3 56 28 42 31 7b\s+\{evex\} vmpsadbw \$0x7b,\(%ecx\),%ymm5,%ymm6
+#pass
diff --git a/gas/testsuite/gas/i386/avx10_2-evex-promote.s b/gas/testsuite/gas/i386/avx10_2-evex-promote.s
new file mode 100644
index 0000000..2f68815
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx10_2-evex-promote.s
@@ -0,0 +1,42 @@
+# Check AVX10.2/256 evex promoted instructions
+
+	.arch generic32
+	.arch .avx10.2/256
+	.arch .avx_vnni_int16
+	.arch .avx_vnni_int8
+	.text
+_start:
+	.irp m, ss, su, uu
+	.irp s, "", s
+	vpdpb\m\()d\s	%ymm4, %ymm5, %ymm6
+	vpdpb\m\()d\s	%xmm4, %xmm5, %xmm6
+	vpdpb\m\()d\s	(%ecx), %ymm5, %ymm6
+	vpdpb\m\()d\s	(%ecx), %xmm5, %xmm6
+	{evex} vpdpb\m\()d\s	%ymm4, %ymm5, %ymm6
+	{evex} vpdpb\m\()d\s	%xmm4, %xmm5, %xmm6
+	{evex} vpdpb\m\()d\s	(%ecx), %ymm5, %ymm6
+	{evex} vpdpb\m\()d\s	(%ecx), %xmm5, %xmm6
+	.endr
+	.endr
+
+	.irp m, su, us, uu
+	.irp s, "", s
+	vpdpw\m\()d\s	%ymm4, %ymm5, %ymm6
+	vpdpw\m\()d\s	%xmm4, %xmm5, %xmm6
+	vpdpw\m\()d\s	(%ecx), %ymm5, %ymm6
+	vpdpw\m\()d\s	(%ecx), %xmm5, %xmm6
+	{evex} vpdpw\m\()d\s	%ymm4, %ymm5, %ymm6
+	{evex} vpdpw\m\()d\s	%xmm4, %xmm5, %xmm6
+	{evex} vpdpw\m\()d\s	(%ecx), %ymm5, %ymm6
+	{evex} vpdpw\m\()d\s	(%ecx), %xmm5, %xmm6
+	.endr
+	.endr
+
+	vmpsadbw	$123, %xmm4, %xmm5, %xmm6
+	vmpsadbw	$123, %ymm4, %ymm5, %ymm6
+	vmpsadbw	$123, (%ecx), %xmm5, %xmm6
+	vmpsadbw	$123, (%ecx), %ymm5, %ymm6
+	{evex} vmpsadbw	$123, %xmm4, %xmm5, %xmm6
+	{evex} vmpsadbw	$123, %ymm4, %ymm5, %ymm6
+	{evex} vmpsadbw	$123, (%ecx), %xmm5, %xmm6
+	{evex} vmpsadbw	$123, (%ecx), %ymm5, %ymm6
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index 6710a56..699e200 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -522,6 +522,11 @@ if [gas_32_check] then {
     run_dump_test "avx10_2-rounding"
     run_dump_test "avx10_2-rounding-intel"
     run_list_test "avx10_2-rounding-inval"
+    run_dump_test "avx10_2-evex-promote"
+    run_dump_test "avx10_2-512-1"
+    run_dump_test "avx10_2-512-1-intel"
+    run_dump_test "avx10_2-256-1"
+    run_dump_test "avx10_2-256-1-intel"
     run_list_test "sg"
     run_dump_test "clzero"
     run_dump_test "invlpgb"
diff --git a/gas/testsuite/gas/i386/x86-64-avx10_2-256-1-intel.d b/gas/testsuite/gas/i386/x86-64-avx10_2-256-1-intel.d
new file mode 100644
index 0000000..5be75c6
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx10_2-256-1-intel.d
@@ -0,0 +1,151 @@
+#objdump: -dw -Mintel
+#name: x86_64 AVX10.2/256 media insns (Intel disassembly)
+#source: x86-64-avx10_2-256-1.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+#...
+[a-f0-9]+ <_intel>:
+\s*[a-f0-9]+:\s*62 02 17 20 50 f4\s+vpdpbssd ymm30,ymm29,ymm28
+\s*[a-f0-9]+:\s*62 02 17 00 50 f4\s+vpdpbssd xmm30,xmm29,xmm28
+\s*[a-f0-9]+:\s*62 22 17 27 50 b4 f5 00 00 00 10\s+vpdpbssd ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 17 30 50 31\s+vpdpbssd ymm30,ymm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 17 20 50 71 7f\s+vpdpbssd ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 62 17 b7 50 72 80\s+vpdpbssd ymm30\{k7\}\{z\},ymm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 22 17 07 50 b4 f5 00 00 00 10\s+vpdpbssd xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 17 10 50 31\s+vpdpbssd xmm30,xmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 17 00 50 71 7f\s+vpdpbssd xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 62 17 97 50 72 80\s+vpdpbssd xmm30\{k7\}\{z\},xmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 17 20 51 f4\s+vpdpbssds ymm30,ymm29,ymm28
+\s*[a-f0-9]+:\s*62 02 17 00 51 f4\s+vpdpbssds xmm30,xmm29,xmm28
+\s*[a-f0-9]+:\s*62 22 17 27 51 b4 f5 00 00 00 10\s+vpdpbssds ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 17 30 51 31\s+vpdpbssds ymm30,ymm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 17 20 51 71 7f\s+vpdpbssds ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 62 17 b7 51 72 80\s+vpdpbssds ymm30\{k7\}\{z\},ymm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 22 17 07 51 b4 f5 00 00 00 10\s+vpdpbssds xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 17 10 51 31\s+vpdpbssds xmm30,xmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 17 00 51 71 7f\s+vpdpbssds xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 62 17 97 51 72 80\s+vpdpbssds xmm30\{k7\}\{z\},xmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 16 20 50 f4\s+vpdpbsud ymm30,ymm29,ymm28
+\s*[a-f0-9]+:\s*62 02 16 00 50 f4\s+vpdpbsud xmm30,xmm29,xmm28
+\s*[a-f0-9]+:\s*62 22 16 27 50 b4 f5 00 00 00 10\s+vpdpbsud ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 16 30 50 31\s+vpdpbsud ymm30,ymm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 16 20 50 71 7f\s+vpdpbsud ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 62 16 b7 50 72 80\s+vpdpbsud ymm30\{k7\}\{z\},ymm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 22 16 07 50 b4 f5 00 00 00 10\s+vpdpbsud xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 16 10 50 31\s+vpdpbsud xmm30,xmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 16 00 50 71 7f\s+vpdpbsud xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 62 16 97 50 72 80\s+vpdpbsud xmm30\{k7\}\{z\},xmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 16 20 51 f4\s+vpdpbsuds ymm30,ymm29,ymm28
+\s*[a-f0-9]+:\s*62 02 16 00 51 f4\s+vpdpbsuds xmm30,xmm29,xmm28
+\s*[a-f0-9]+:\s*62 22 16 27 51 b4 f5 00 00 00 10\s+vpdpbsuds ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 16 30 51 31\s+vpdpbsuds ymm30,ymm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 16 20 51 71 7f\s+vpdpbsuds ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 62 16 b7 51 72 80\s+vpdpbsuds ymm30\{k7\}\{z\},ymm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 22 16 07 51 b4 f5 00 00 00 10\s+vpdpbsuds xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 16 10 51 31\s+vpdpbsuds xmm30,xmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 16 00 51 71 7f\s+vpdpbsuds xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 62 16 97 51 72 80\s+vpdpbsuds xmm30\{k7\}\{z\},xmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 14 20 50 f4\s+vpdpbuud ymm30,ymm29,ymm28
+\s*[a-f0-9]+:\s*62 02 14 00 50 f4\s+vpdpbuud xmm30,xmm29,xmm28
+\s*[a-f0-9]+:\s*62 22 14 27 50 b4 f5 00 00 00 10\s+vpdpbuud ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 14 30 50 31\s+vpdpbuud ymm30,ymm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 14 20 50 71 7f\s+vpdpbuud ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 62 14 b7 50 72 80\s+vpdpbuud ymm30\{k7\}\{z\},ymm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 22 14 07 50 b4 f5 00 00 00 10\s+vpdpbuud xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 14 10 50 31\s+vpdpbuud xmm30,xmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 14 00 50 71 7f\s+vpdpbuud xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 62 14 97 50 72 80\s+vpdpbuud xmm30\{k7\}\{z\},xmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 14 20 51 f4\s+vpdpbuuds ymm30,ymm29,ymm28
+\s*[a-f0-9]+:\s*62 02 14 00 51 f4\s+vpdpbuuds xmm30,xmm29,xmm28
+\s*[a-f0-9]+:\s*62 22 14 27 51 b4 f5 00 00 00 10\s+vpdpbuuds ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 14 30 51 31\s+vpdpbuuds ymm30,ymm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 14 20 51 71 7f\s+vpdpbuuds ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 62 14 b7 51 72 80\s+vpdpbuuds ymm30\{k7\}\{z\},ymm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 22 14 07 51 b4 f5 00 00 00 10\s+vpdpbuuds xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 14 10 51 31\s+vpdpbuuds xmm30,xmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 14 00 51 71 7f\s+vpdpbuuds xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 62 14 97 51 72 80\s+vpdpbuuds xmm30\{k7\}\{z\},xmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 16 20 d2 f4\s+vpdpwsud ymm30,ymm29,ymm28
+\s*[a-f0-9]+:\s*62 02 16 00 d2 f4\s+vpdpwsud xmm30,xmm29,xmm28
+\s*[a-f0-9]+:\s*62 22 16 27 d2 b4 f5 00 00 00 10\s+vpdpwsud ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 16 30 d2 31\s+vpdpwsud ymm30,ymm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 16 20 d2 71 7f\s+vpdpwsud ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 62 16 b7 d2 72 80\s+vpdpwsud ymm30\{k7\}\{z\},ymm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 22 16 07 d2 b4 f5 00 00 00 10\s+vpdpwsud xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 16 10 d2 31\s+vpdpwsud xmm30,xmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 16 00 d2 71 7f\s+vpdpwsud xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 62 16 97 d2 72 80\s+vpdpwsud xmm30\{k7\}\{z\},xmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 16 20 d3 f4\s+vpdpwsuds ymm30,ymm29,ymm28
+\s*[a-f0-9]+:\s*62 02 16 00 d3 f4\s+vpdpwsuds xmm30,xmm29,xmm28
+\s*[a-f0-9]+:\s*62 22 16 27 d3 b4 f5 00 00 00 10\s+vpdpwsuds ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 16 30 d3 31\s+vpdpwsuds ymm30,ymm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 16 20 d3 71 7f\s+vpdpwsuds ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 62 16 b7 d3 72 80\s+vpdpwsuds ymm30\{k7\}\{z\},ymm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 22 16 07 d3 b4 f5 00 00 00 10\s+vpdpwsuds xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 16 10 d3 31\s+vpdpwsuds xmm30,xmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 16 00 d3 71 7f\s+vpdpwsuds xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 62 16 97 d3 72 80\s+vpdpwsuds xmm30\{k7\}\{z\},xmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 15 20 d2 f4\s+vpdpwusd ymm30,ymm29,ymm28
+\s*[a-f0-9]+:\s*62 02 15 00 d2 f4\s+vpdpwusd xmm30,xmm29,xmm28
+\s*[a-f0-9]+:\s*62 22 15 27 d2 b4 f5 00 00 00 10\s+vpdpwusd ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 15 30 d2 31\s+vpdpwusd ymm30,ymm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 15 20 d2 71 7f\s+vpdpwusd ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 62 15 b7 d2 72 80\s+vpdpwusd ymm30\{k7\}\{z\},ymm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 22 15 07 d2 b4 f5 00 00 00 10\s+vpdpwusd xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 15 10 d2 31\s+vpdpwusd xmm30,xmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 15 00 d2 71 7f\s+vpdpwusd xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 62 15 97 d2 72 80\s+vpdpwusd xmm30\{k7\}\{z\},xmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 15 20 d3 f4\s+vpdpwusds ymm30,ymm29,ymm28
+\s*[a-f0-9]+:\s*62 02 15 00 d3 f4\s+vpdpwusds xmm30,xmm29,xmm28
+\s*[a-f0-9]+:\s*62 22 15 27 d3 b4 f5 00 00 00 10\s+vpdpwusds ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 15 30 d3 31\s+vpdpwusds ymm30,ymm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 15 20 d3 71 7f\s+vpdpwusds ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 62 15 b7 d3 72 80\s+vpdpwusds ymm30\{k7\}\{z\},ymm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 22 15 07 d3 b4 f5 00 00 00 10\s+vpdpwusds xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 15 10 d3 31\s+vpdpwusds xmm30,xmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 15 00 d3 71 7f\s+vpdpwusds xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 62 15 97 d3 72 80\s+vpdpwusds xmm30\{k7\}\{z\},xmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 14 20 d2 f4\s+vpdpwuud ymm30,ymm29,ymm28
+\s*[a-f0-9]+:\s*62 02 14 00 d2 f4\s+vpdpwuud xmm30,xmm29,xmm28
+\s*[a-f0-9]+:\s*62 22 14 27 d2 b4 f5 00 00 00 10\s+vpdpwuud ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 14 30 d2 31\s+vpdpwuud ymm30,ymm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 14 20 d2 71 7f\s+vpdpwuud ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 62 14 b7 d2 72 80\s+vpdpwuud ymm30\{k7\}\{z\},ymm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 22 14 07 d2 b4 f5 00 00 00 10\s+vpdpwuud xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 14 10 d2 31\s+vpdpwuud xmm30,xmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 14 00 d2 71 7f\s+vpdpwuud xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 62 14 97 d2 72 80\s+vpdpwuud xmm30\{k7\}\{z\},xmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 14 20 d3 f4\s+vpdpwuuds ymm30,ymm29,ymm28
+\s*[a-f0-9]+:\s*62 02 14 00 d3 f4\s+vpdpwuuds xmm30,xmm29,xmm28
+\s*[a-f0-9]+:\s*62 22 14 27 d3 b4 f5 00 00 00 10\s+vpdpwuuds ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 14 30 d3 31\s+vpdpwuuds ymm30,ymm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 14 20 d3 71 7f\s+vpdpwuuds ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 62 14 b7 d3 72 80\s+vpdpwuuds ymm30\{k7\}\{z\},ymm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 22 14 07 d3 b4 f5 00 00 00 10\s+vpdpwuuds xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 14 10 d3 31\s+vpdpwuuds xmm30,xmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 14 00 d3 71 7f\s+vpdpwuuds xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 62 14 97 d3 72 80\s+vpdpwuuds xmm30\{k7\}\{z\},xmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 14 20 52 f4\s+vdpphps ymm30,ymm29,ymm28
+\s*[a-f0-9]+:\s*62 02 14 00 52 f4\s+vdpphps xmm30,xmm29,xmm28
+\s*[a-f0-9]+:\s*62 22 14 27 52 b4 f5 00 00 00 10\s+vdpphps ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 14 30 52 31\s+vdpphps ymm30,ymm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 14 20 52 71 7f\s+vdpphps ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 62 14 b7 52 72 80\s+vdpphps ymm30\{k7\}\{z\},ymm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 22 14 07 52 b4 f5 00 00 00 10\s+vdpphps xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 14 10 52 31\s+vdpphps xmm30,xmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 14 00 52 71 7f\s+vdpphps xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 62 14 97 52 72 80\s+vdpphps xmm30\{k7\}\{z\},xmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 03 16 00 42 f4 7b\s+vmpsadbw xmm30,xmm29,xmm28,0x7b
+\s*[a-f0-9]+:\s*62 03 16 20 42 f4 7b\s+vmpsadbw ymm30,ymm29,ymm28,0x7b
+\s*[a-f0-9]+:\s*62 23 16 27 42 b4 f5 00 00 00 10 7b\s+vmpsadbw ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*62 43 16 20 42 31 7b\s+vmpsadbw ymm30,ymm29,YMMWORD PTR \[r9\],0x7b
+\s*[a-f0-9]+:\s*62 63 16 20 42 71 7f 7b\s+vmpsadbw ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\],0x7b
+\s*[a-f0-9]+:\s*62 63 16 a7 42 72 80 7b\s+vmpsadbw ymm30\{k7\}\{z\},ymm29,YMMWORD PTR \[rdx-0x1000\],0x7b
+\s*[a-f0-9]+:\s*62 23 16 07 42 b4 f5 00 00 00 10 7b\s+vmpsadbw xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*62 43 16 00 42 31 7b\s+vmpsadbw xmm30,xmm29,XMMWORD PTR \[r9\],0x7b
+\s*[a-f0-9]+:\s*62 63 16 00 42 71 7f 7b\s+vmpsadbw xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\],0x7b
+\s*[a-f0-9]+:\s*62 63 16 87 42 72 80 7b\s+vmpsadbw xmm30\{k7\}\{z\},xmm29,XMMWORD PTR \[rdx-0x800\],0x7b
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-avx10_2-256-1.d b/gas/testsuite/gas/i386/x86-64-avx10_2-256-1.d
new file mode 100644
index 0000000..a512a53
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx10_2-256-1.d
@@ -0,0 +1,149 @@
+#objdump: -dw
+#name: x86_64 AVX10.2/256 media insns
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*62 02 17 20 50 f4\s+vpdpbssd %ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 17 00 50 f4\s+vpdpbssd %xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 22 17 27 50 b4 f5 00 00 00 10\s+vpdpbssd 0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 17 30 50 31\s+vpdpbssd \(%r9\)\{1to8\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 17 20 50 71 7f\s+vpdpbssd 0xfe0\(%rcx\),%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 17 b7 50 72 80\s+vpdpbssd -0x200\(%rdx\)\{1to8\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 22 17 07 50 b4 f5 00 00 00 10\s+vpdpbssd 0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 17 10 50 31\s+vpdpbssd \(%r9\)\{1to4\},%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 17 00 50 71 7f\s+vpdpbssd 0x7f0\(%rcx\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 17 97 50 72 80\s+vpdpbssd -0x200\(%rdx\)\{1to4\},%xmm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 17 20 51 f4\s+vpdpbssds %ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 17 00 51 f4\s+vpdpbssds %xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 22 17 27 51 b4 f5 00 00 00 10\s+vpdpbssds 0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 17 30 51 31\s+vpdpbssds \(%r9\)\{1to8\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 17 20 51 71 7f\s+vpdpbssds 0xfe0\(%rcx\),%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 17 b7 51 72 80\s+vpdpbssds -0x200\(%rdx\)\{1to8\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 22 17 07 51 b4 f5 00 00 00 10\s+vpdpbssds 0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 17 10 51 31\s+vpdpbssds \(%r9\)\{1to4\},%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 17 00 51 71 7f\s+vpdpbssds 0x7f0\(%rcx\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 17 97 51 72 80\s+vpdpbssds -0x200\(%rdx\)\{1to4\},%xmm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 16 20 50 f4\s+vpdpbsud %ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 16 00 50 f4\s+vpdpbsud %xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 22 16 27 50 b4 f5 00 00 00 10\s+vpdpbsud 0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 16 30 50 31\s+vpdpbsud \(%r9\)\{1to8\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 16 20 50 71 7f\s+vpdpbsud 0xfe0\(%rcx\),%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 16 b7 50 72 80\s+vpdpbsud -0x200\(%rdx\)\{1to8\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 22 16 07 50 b4 f5 00 00 00 10\s+vpdpbsud 0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 16 10 50 31\s+vpdpbsud \(%r9\)\{1to4\},%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 16 00 50 71 7f\s+vpdpbsud 0x7f0\(%rcx\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 16 97 50 72 80\s+vpdpbsud -0x200\(%rdx\)\{1to4\},%xmm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 16 20 51 f4\s+vpdpbsuds %ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 16 00 51 f4\s+vpdpbsuds %xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 22 16 27 51 b4 f5 00 00 00 10\s+vpdpbsuds 0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 16 30 51 31\s+vpdpbsuds \(%r9\)\{1to8\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 16 20 51 71 7f\s+vpdpbsuds 0xfe0\(%rcx\),%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 16 b7 51 72 80\s+vpdpbsuds -0x200\(%rdx\)\{1to8\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 22 16 07 51 b4 f5 00 00 00 10\s+vpdpbsuds 0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 16 10 51 31\s+vpdpbsuds \(%r9\)\{1to4\},%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 16 00 51 71 7f\s+vpdpbsuds 0x7f0\(%rcx\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 16 97 51 72 80\s+vpdpbsuds -0x200\(%rdx\)\{1to4\},%xmm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 14 20 50 f4\s+vpdpbuud %ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 14 00 50 f4\s+vpdpbuud %xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 22 14 27 50 b4 f5 00 00 00 10\s+vpdpbuud 0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 14 30 50 31\s+vpdpbuud \(%r9\)\{1to8\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 14 20 50 71 7f\s+vpdpbuud 0xfe0\(%rcx\),%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 14 b7 50 72 80\s+vpdpbuud -0x200\(%rdx\)\{1to8\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 22 14 07 50 b4 f5 00 00 00 10\s+vpdpbuud 0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 14 10 50 31\s+vpdpbuud \(%r9\)\{1to4\},%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 14 00 50 71 7f\s+vpdpbuud 0x7f0\(%rcx\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 14 97 50 72 80\s+vpdpbuud -0x200\(%rdx\)\{1to4\},%xmm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 14 20 51 f4\s+vpdpbuuds %ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 14 00 51 f4\s+vpdpbuuds %xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 22 14 27 51 b4 f5 00 00 00 10\s+vpdpbuuds 0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 14 30 51 31\s+vpdpbuuds \(%r9\)\{1to8\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 14 20 51 71 7f\s+vpdpbuuds 0xfe0\(%rcx\),%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 14 b7 51 72 80\s+vpdpbuuds -0x200\(%rdx\)\{1to8\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 22 14 07 51 b4 f5 00 00 00 10\s+vpdpbuuds 0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 14 10 51 31\s+vpdpbuuds \(%r9\)\{1to4\},%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 14 00 51 71 7f\s+vpdpbuuds 0x7f0\(%rcx\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 14 97 51 72 80\s+vpdpbuuds -0x200\(%rdx\)\{1to4\},%xmm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 16 20 d2 f4\s+vpdpwsud %ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 16 00 d2 f4\s+vpdpwsud %xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 22 16 27 d2 b4 f5 00 00 00 10\s+vpdpwsud 0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 16 30 d2 31\s+vpdpwsud \(%r9\)\{1to8\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 16 20 d2 71 7f\s+vpdpwsud 0xfe0\(%rcx\),%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 16 b7 d2 72 80\s+vpdpwsud -0x200\(%rdx\)\{1to8\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 22 16 07 d2 b4 f5 00 00 00 10\s+vpdpwsud 0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 16 10 d2 31\s+vpdpwsud \(%r9\)\{1to4\},%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 16 00 d2 71 7f\s+vpdpwsud 0x7f0\(%rcx\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 16 97 d2 72 80\s+vpdpwsud -0x200\(%rdx\)\{1to4\},%xmm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 16 20 d3 f4\s+vpdpwsuds %ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 16 00 d3 f4\s+vpdpwsuds %xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 22 16 27 d3 b4 f5 00 00 00 10\s+vpdpwsuds 0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 16 30 d3 31\s+vpdpwsuds \(%r9\)\{1to8\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 16 20 d3 71 7f\s+vpdpwsuds 0xfe0\(%rcx\),%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 16 b7 d3 72 80\s+vpdpwsuds -0x200\(%rdx\)\{1to8\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 22 16 07 d3 b4 f5 00 00 00 10\s+vpdpwsuds 0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 16 10 d3 31\s+vpdpwsuds \(%r9\)\{1to4\},%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 16 00 d3 71 7f\s+vpdpwsuds 0x7f0\(%rcx\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 16 97 d3 72 80\s+vpdpwsuds -0x200\(%rdx\)\{1to4\},%xmm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 15 20 d2 f4\s+vpdpwusd %ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 15 00 d2 f4\s+vpdpwusd %xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 22 15 27 d2 b4 f5 00 00 00 10\s+vpdpwusd 0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 15 30 d2 31\s+vpdpwusd \(%r9\)\{1to8\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 15 20 d2 71 7f\s+vpdpwusd 0xfe0\(%rcx\),%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 15 b7 d2 72 80\s+vpdpwusd -0x200\(%rdx\)\{1to8\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 22 15 07 d2 b4 f5 00 00 00 10\s+vpdpwusd 0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 15 10 d2 31\s+vpdpwusd \(%r9\)\{1to4\},%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 15 00 d2 71 7f\s+vpdpwusd 0x7f0\(%rcx\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 15 97 d2 72 80\s+vpdpwusd -0x200\(%rdx\)\{1to4\},%xmm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 15 20 d3 f4\s+vpdpwusds %ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 15 00 d3 f4\s+vpdpwusds %xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 22 15 27 d3 b4 f5 00 00 00 10\s+vpdpwusds 0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 15 30 d3 31\s+vpdpwusds \(%r9\)\{1to8\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 15 20 d3 71 7f\s+vpdpwusds 0xfe0\(%rcx\),%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 15 b7 d3 72 80\s+vpdpwusds -0x200\(%rdx\)\{1to8\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 22 15 07 d3 b4 f5 00 00 00 10\s+vpdpwusds 0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 15 10 d3 31\s+vpdpwusds \(%r9\)\{1to4\},%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 15 00 d3 71 7f\s+vpdpwusds 0x7f0\(%rcx\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 15 97 d3 72 80\s+vpdpwusds -0x200\(%rdx\)\{1to4\},%xmm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 14 20 d2 f4\s+vpdpwuud %ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 14 00 d2 f4\s+vpdpwuud %xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 22 14 27 d2 b4 f5 00 00 00 10\s+vpdpwuud 0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 14 30 d2 31\s+vpdpwuud \(%r9\)\{1to8\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 14 20 d2 71 7f\s+vpdpwuud 0xfe0\(%rcx\),%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 14 b7 d2 72 80\s+vpdpwuud -0x200\(%rdx\)\{1to8\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 22 14 07 d2 b4 f5 00 00 00 10\s+vpdpwuud 0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 14 10 d2 31\s+vpdpwuud \(%r9\)\{1to4\},%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 14 00 d2 71 7f\s+vpdpwuud 0x7f0\(%rcx\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 14 97 d2 72 80\s+vpdpwuud -0x200\(%rdx\)\{1to4\},%xmm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 14 20 d3 f4\s+vpdpwuuds %ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 14 00 d3 f4\s+vpdpwuuds %xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 22 14 27 d3 b4 f5 00 00 00 10\s+vpdpwuuds 0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 14 30 d3 31\s+vpdpwuuds \(%r9\)\{1to8\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 14 20 d3 71 7f\s+vpdpwuuds 0xfe0\(%rcx\),%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 14 b7 d3 72 80\s+vpdpwuuds -0x200\(%rdx\)\{1to8\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 22 14 07 d3 b4 f5 00 00 00 10\s+vpdpwuuds 0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 14 10 d3 31\s+vpdpwuuds \(%r9\)\{1to4\},%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 14 00 d3 71 7f\s+vpdpwuuds 0x7f0\(%rcx\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 14 97 d3 72 80\s+vpdpwuuds -0x200\(%rdx\)\{1to4\},%xmm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 14 20 52 f4\s+vdpphps %ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 14 00 52 f4\s+vdpphps %xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 22 14 27 52 b4 f5 00 00 00 10\s+vdpphps 0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 14 30 52 31\s+vdpphps \(%r9\)\{1to8\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 14 20 52 71 7f\s+vdpphps 0xfe0\(%rcx\),%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 14 b7 52 72 80\s+vdpphps -0x200\(%rdx\)\{1to8\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 22 14 07 52 b4 f5 00 00 00 10\s+vdpphps 0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 14 10 52 31\s+vdpphps \(%r9\)\{1to4\},%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 14 00 52 71 7f\s+vdpphps 0x7f0\(%rcx\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 14 97 52 72 80\s+vdpphps -0x200\(%rdx\)\{1to4\},%xmm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 03 16 00 42 f4 7b\s+vmpsadbw \$0x7b,%xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 03 16 20 42 f4 7b\s+vmpsadbw \$0x7b,%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 23 16 27 42 b4 f5 00 00 00 10 7b\s+vmpsadbw \$0x7b,0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 43 16 20 42 31 7b\s+vmpsadbw \$0x7b,\(%r9\),%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 63 16 20 42 71 7f 7b\s+vmpsadbw \$0x7b,0xfe0\(%rcx\),%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 63 16 a7 42 72 80 7b\s+vmpsadbw \$0x7b,-0x1000\(%rdx\),%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 23 16 07 42 b4 f5 00 00 00 10 7b\s+vmpsadbw \$0x7b,0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 43 16 00 42 31 7b\s+vmpsadbw \$0x7b,\(%r9\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 63 16 00 42 71 7f 7b\s+vmpsadbw \$0x7b,0x7f0\(%rcx\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 63 16 87 42 72 80 7b\s+vmpsadbw \$0x7b,-0x800\(%rdx\),%xmm29,%xmm30\{%k7\}\{z\}
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-avx10_2-256-1.s b/gas/testsuite/gas/i386/x86-64-avx10_2-256-1.s
new file mode 100644
index 0000000..8f58d39
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx10_2-256-1.s
@@ -0,0 +1,111 @@
+# Check 64bit AVX10.2/256 instructions
+
+	.arch generic64
+	.arch .avx10.2/256
+	.text
+_start:
+	.irp m, ss, su, uu
+	.irp s, "", s
+	vpdpb\m\()d\s	%ymm28, %ymm29, %ymm30
+	vpdpb\m\()d\s	%xmm28, %xmm29, %xmm30
+	vpdpb\m\()d\s	0x10000000(%rbp, %r14, 8), %ymm29, %ymm30{%k7}
+	vpdpb\m\()d\s	(%r9){1to8}, %ymm29, %ymm30
+	vpdpb\m\()d\s	4064(%rcx), %ymm29, %ymm30
+	vpdpb\m\()d\s	-512(%rdx){1to8}, %ymm29, %ymm30{%k7}{z}
+	vpdpb\m\()d\s	0x10000000(%rbp, %r14, 8), %xmm29, %xmm30{%k7}
+	vpdpb\m\()d\s	(%r9){1to4}, %xmm29, %xmm30
+	vpdpb\m\()d\s	2032(%rcx), %xmm29, %xmm30
+	vpdpb\m\()d\s	-512(%rdx){1to4}, %xmm29, %xmm30{%k7}{z}
+	.endr
+	.endr
+
+	.irp m, su, us, uu
+	.irp s, "", s
+	vpdpw\m\()d\s	%ymm28, %ymm29, %ymm30
+	vpdpw\m\()d\s	%xmm28, %xmm29, %xmm30
+	vpdpw\m\()d\s	0x10000000(%rbp, %r14, 8), %ymm29, %ymm30{%k7}
+	vpdpw\m\()d\s	(%r9){1to8}, %ymm29, %ymm30
+	vpdpw\m\()d\s	4064(%rcx), %ymm29, %ymm30
+	vpdpw\m\()d\s	-512(%rdx){1to8}, %ymm29, %ymm30{%k7}{z}
+	vpdpw\m\()d\s	0x10000000(%rbp, %r14, 8), %xmm29, %xmm30{%k7}
+	vpdpw\m\()d\s	(%r9){1to4}, %xmm29, %xmm30
+	vpdpw\m\()d\s	2032(%rcx), %xmm29, %xmm30
+	vpdpw\m\()d\s	-512(%rdx){1to4}, %xmm29, %xmm30{%k7}{z}
+	.endr
+	.endr
+
+	vdpphps	%ymm28, %ymm29, %ymm30
+	vdpphps	%xmm28, %xmm29, %xmm30
+	vdpphps	0x10000000(%rbp, %r14, 8), %ymm29, %ymm30{%k7}
+	vdpphps	(%r9){1to8}, %ymm29, %ymm30
+	vdpphps	4064(%rcx), %ymm29, %ymm30
+	vdpphps	-512(%rdx){1to8}, %ymm29, %ymm30{%k7}{z}
+	vdpphps	0x10000000(%rbp, %r14, 8), %xmm29, %xmm30{%k7}
+	vdpphps	(%r9){1to4}, %xmm29, %xmm30
+	vdpphps	2032(%rcx), %xmm29, %xmm30
+	vdpphps	-512(%rdx){1to4}, %xmm29, %xmm30{%k7}{z}
+
+	vmpsadbw	$123, %xmm28, %xmm29, %xmm30
+	vmpsadbw	$123, %ymm28, %ymm29, %ymm30
+	vmpsadbw	$123, 0x10000000(%rbp, %r14, 8), %ymm29, %ymm30{%k7}
+	vmpsadbw	$123, (%r9), %ymm29, %ymm30
+	vmpsadbw	$123, 4064(%rcx), %ymm29, %ymm30
+	vmpsadbw	$123, -4096(%rdx), %ymm29, %ymm30{%k7}{z}
+	vmpsadbw	$123, 0x10000000(%rbp, %r14, 8), %xmm29, %xmm30{%k7}
+	vmpsadbw	$123, (%r9), %xmm29, %xmm30
+	vmpsadbw	$123, 2032(%rcx), %xmm29, %xmm30
+	vmpsadbw	$123, -2048(%rdx), %xmm29, %xmm30{%k7}{z}
+
+_intel:
+	.intel_syntax noprefix
+	.irp m, ss, su, uu
+	.irp s, "", s
+	vpdpb\m\()d\s	ymm30, ymm29, ymm28
+	vpdpb\m\()d\s	xmm30, xmm29, xmm28
+	vpdpb\m\()d\s	ymm30{k7}, ymm29, YMMWORD PTR [rbp+r14*8+0x10000000]
+	vpdpb\m\()d\s	ymm30, ymm29, DWORD PTR [r9]{1to8}
+	vpdpb\m\()d\s	ymm30, ymm29, YMMWORD PTR [rcx+4064]
+	vpdpb\m\()d\s	ymm30{k7}{z}, ymm29, DWORD PTR [rdx-512]{1to8}
+	vpdpb\m\()d\s	xmm30{k7}, xmm29, XMMWORD PTR [rbp+r14*8+0x10000000]
+	vpdpb\m\()d\s	xmm30, xmm29, DWORD PTR [r9]{1to4}
+	vpdpb\m\()d\s	xmm30, xmm29, XMMWORD PTR [rcx+2032]
+	vpdpb\m\()d\s	xmm30{k7}{z}, xmm29, DWORD PTR [rdx-512]{1to4}
+	.endr
+	.endr
+
+	.irp m, su, us, uu
+	.irp s, "", s
+	vpdpw\m\()d\s	ymm30, ymm29, ymm28
+	vpdpw\m\()d\s	xmm30, xmm29, xmm28
+	vpdpw\m\()d\s	ymm30{k7}, ymm29, YMMWORD PTR [rbp+r14*8+0x10000000]
+	vpdpw\m\()d\s	ymm30, ymm29, DWORD PTR [r9]{1to8}
+	vpdpw\m\()d\s	ymm30, ymm29, YMMWORD PTR [rcx+4064]
+	vpdpw\m\()d\s	ymm30{k7}{z}, ymm29, DWORD PTR [rdx-512]{1to8}
+	vpdpw\m\()d\s	xmm30{k7}, xmm29, XMMWORD PTR [rbp+r14*8+0x10000000]
+	vpdpw\m\()d\s	xmm30, xmm29, DWORD PTR [r9]{1to4}
+	vpdpw\m\()d\s	xmm30, xmm29, XMMWORD PTR [rcx+2032]
+	vpdpw\m\()d\s	xmm30{k7}{z}, xmm29, DWORD PTR [rdx-512]{1to4}
+	.endr
+	.endr
+
+	vdpphps	ymm30, ymm29, ymm28
+	vdpphps	xmm30, xmm29, xmm28
+	vdpphps	ymm30{k7}, ymm29, YMMWORD PTR [rbp+r14*8+0x10000000]
+	vdpphps	ymm30, ymm29, DWORD PTR [r9]{1to8}
+	vdpphps	ymm30, ymm29, YMMWORD PTR [rcx+4064]
+	vdpphps	ymm30{k7}{z}, ymm29, DWORD PTR [rdx-512]{1to8}
+	vdpphps	xmm30{k7}, xmm29, XMMWORD PTR [rbp+r14*8+0x10000000]
+	vdpphps	xmm30, xmm29, DWORD PTR [r9]{1to4}
+	vdpphps	xmm30, xmm29, XMMWORD PTR [rcx+2032]
+	vdpphps	xmm30{k7}{z}, xmm29, DWORD PTR [rdx-512]{1to4}
+
+	vmpsadbw	xmm30, xmm29, xmm28, 123
+	vmpsadbw	ymm30, ymm29, ymm28, 123
+	vmpsadbw	ymm30{k7}, ymm29, YMMWORD PTR [rbp+r14*8+0x10000000], 123
+	vmpsadbw	ymm30, ymm29, YMMWORD PTR [r9], 123
+	vmpsadbw	ymm30, ymm29, YMMWORD PTR [rcx+4064], 123
+	vmpsadbw	ymm30{k7}{z}, ymm29, YMMWORD PTR [rdx-4096], 123
+	vmpsadbw	xmm30{k7}, xmm29, XMMWORD PTR [rbp+r14*8+0x10000000], 123
+	vmpsadbw	xmm30, xmm29, XMMWORD PTR [r9], 123
+	vmpsadbw	xmm30, xmm29, XMMWORD PTR [rcx+2032], 123
+	vmpsadbw	xmm30{k7}{z}, xmm29, XMMWORD PTR [rdx-2048], 123
diff --git a/gas/testsuite/gas/i386/x86-64-avx10_2-512-1-intel.d b/gas/testsuite/gas/i386/x86-64-avx10_2-512-1-intel.d
new file mode 100644
index 0000000..0049b0a
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx10_2-512-1-intel.d
@@ -0,0 +1,81 @@
+#objdump: -dw -Mintel
+#name: x86_64 AVX10.2/512 media insns (Intel disassembly)
+#source: x86-64-avx10_2-512-1.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+#...
+[a-f0-9]+ <_intel>:
+\s*[a-f0-9]+:\s*62 02 17 40 50 f4\s+vpdpbssd zmm30,zmm29,zmm28
+\s*[a-f0-9]+:\s*62 22 17 47 50 b4 f5 00 00 00 10\s+vpdpbssd zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 17 50 50 31\s+vpdpbssd zmm30,zmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 17 40 50 71 7f\s+vpdpbssd zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 62 17 d7 50 72 80\s+vpdpbssd zmm30\{k7\}\{z\},zmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 17 40 51 f4\s+vpdpbssds zmm30,zmm29,zmm28
+\s*[a-f0-9]+:\s*62 22 17 47 51 b4 f5 00 00 00 10\s+vpdpbssds zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 17 50 51 31\s+vpdpbssds zmm30,zmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 17 40 51 71 7f\s+vpdpbssds zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 62 17 d7 51 72 80\s+vpdpbssds zmm30\{k7\}\{z\},zmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 16 40 50 f4\s+vpdpbsud zmm30,zmm29,zmm28
+\s*[a-f0-9]+:\s*62 22 16 47 50 b4 f5 00 00 00 10\s+vpdpbsud zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 16 50 50 31\s+vpdpbsud zmm30,zmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 16 40 50 71 7f\s+vpdpbsud zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 62 16 d7 50 72 80\s+vpdpbsud zmm30\{k7\}\{z\},zmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 16 40 51 f4\s+vpdpbsuds zmm30,zmm29,zmm28
+\s*[a-f0-9]+:\s*62 22 16 47 51 b4 f5 00 00 00 10\s+vpdpbsuds zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 16 50 51 31\s+vpdpbsuds zmm30,zmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 16 40 51 71 7f\s+vpdpbsuds zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 62 16 d7 51 72 80\s+vpdpbsuds zmm30\{k7\}\{z\},zmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 14 40 50 f4\s+vpdpbuud zmm30,zmm29,zmm28
+\s*[a-f0-9]+:\s*62 22 14 47 50 b4 f5 00 00 00 10\s+vpdpbuud zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 14 50 50 31\s+vpdpbuud zmm30,zmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 14 40 50 71 7f\s+vpdpbuud zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 62 14 d7 50 72 80\s+vpdpbuud zmm30\{k7\}\{z\},zmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 14 40 51 f4\s+vpdpbuuds zmm30,zmm29,zmm28
+\s*[a-f0-9]+:\s*62 22 14 47 51 b4 f5 00 00 00 10\s+vpdpbuuds zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 14 50 51 31\s+vpdpbuuds zmm30,zmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 14 40 51 71 7f\s+vpdpbuuds zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 62 14 d7 51 72 80\s+vpdpbuuds zmm30\{k7\}\{z\},zmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 16 40 d2 f4\s+vpdpwsud zmm30,zmm29,zmm28
+\s*[a-f0-9]+:\s*62 22 16 47 d2 b4 f5 00 00 00 10\s+vpdpwsud zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 16 50 d2 31\s+vpdpwsud zmm30,zmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 16 40 d2 71 7f\s+vpdpwsud zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 62 16 d7 d2 72 80\s+vpdpwsud zmm30\{k7\}\{z\},zmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 16 40 d3 f4\s+vpdpwsuds zmm30,zmm29,zmm28
+\s*[a-f0-9]+:\s*62 22 16 47 d3 b4 f5 00 00 00 10\s+vpdpwsuds zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 16 50 d3 31\s+vpdpwsuds zmm30,zmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 16 40 d3 71 7f\s+vpdpwsuds zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 62 16 d7 d3 72 80\s+vpdpwsuds zmm30\{k7\}\{z\},zmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 15 40 d2 f4\s+vpdpwusd zmm30,zmm29,zmm28
+\s*[a-f0-9]+:\s*62 22 15 47 d2 b4 f5 00 00 00 10\s+vpdpwusd zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 15 50 d2 31\s+vpdpwusd zmm30,zmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 15 40 d2 71 7f\s+vpdpwusd zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 62 15 d7 d2 72 80\s+vpdpwusd zmm30\{k7\}\{z\},zmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 15 40 d3 f4\s+vpdpwusds zmm30,zmm29,zmm28
+\s*[a-f0-9]+:\s*62 22 15 47 d3 b4 f5 00 00 00 10\s+vpdpwusds zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 15 50 d3 31\s+vpdpwusds zmm30,zmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 15 40 d3 71 7f\s+vpdpwusds zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 62 15 d7 d3 72 80\s+vpdpwusds zmm30\{k7\}\{z\},zmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 14 40 d2 f4\s+vpdpwuud zmm30,zmm29,zmm28
+\s*[a-f0-9]+:\s*62 22 14 47 d2 b4 f5 00 00 00 10\s+vpdpwuud zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 14 50 d2 31\s+vpdpwuud zmm30,zmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 14 40 d2 71 7f\s+vpdpwuud zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 62 14 d7 d2 72 80\s+vpdpwuud zmm30\{k7\}\{z\},zmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 14 40 d3 f4\s+vpdpwuuds zmm30,zmm29,zmm28
+\s*[a-f0-9]+:\s*62 22 14 47 d3 b4 f5 00 00 00 10\s+vpdpwuuds zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 14 50 d3 31\s+vpdpwuuds zmm30,zmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 14 40 d3 71 7f\s+vpdpwuuds zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 62 14 d7 d3 72 80\s+vpdpwuuds zmm30\{k7\}\{z\},zmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 14 40 52 f4\s+vdpphps zmm30,zmm29,zmm28
+\s*[a-f0-9]+:\s*62 22 14 47 52 b4 f5 00 00 00 10\s+vdpphps zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 14 50 52 31\s+vdpphps zmm30,zmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 14 40 52 71 7f\s+vdpphps zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 62 14 d7 52 72 80\s+vdpphps zmm30\{k7\}\{z\},zmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 03 16 40 42 f4 7b\s+vmpsadbw zmm30,zmm29,zmm28,0x7b
+\s*[a-f0-9]+:\s*62 23 16 47 42 b4 f5 00 00 00 10 7b\s+vmpsadbw zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*62 43 16 40 42 31 7b\s+vmpsadbw zmm30,zmm29,ZMMWORD PTR \[r9\],0x7b
+\s*[a-f0-9]+:\s*62 63 16 40 42 71 7f 7b\s+vmpsadbw zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\],0x7b
+\s*[a-f0-9]+:\s*62 63 16 c7 42 72 80 7b\s+vmpsadbw zmm30\{k7\}\{z\},zmm29,ZMMWORD PTR \[rdx-0x2000\],0x7b
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-avx10_2-512-1.d b/gas/testsuite/gas/i386/x86-64-avx10_2-512-1.d
new file mode 100644
index 0000000..4c41b19
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx10_2-512-1.d
@@ -0,0 +1,79 @@
+#objdump: -dw
+#name: x86_64 AVX10.2/512 media insns
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*62 02 17 40 50 f4\s+vpdpbssd %zmm28,%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 22 17 47 50 b4 f5 00 00 00 10\s+vpdpbssd 0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 17 50 50 31\s+vpdpbssd \(%r9\)\{1to16\},%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 17 40 50 71 7f\s+vpdpbssd 0x1fc0\(%rcx\),%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 17 d7 50 72 80\s+vpdpbssd -0x200\(%rdx\)\{1to16\},%zmm29,%zmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 17 40 51 f4\s+vpdpbssds %zmm28,%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 22 17 47 51 b4 f5 00 00 00 10\s+vpdpbssds 0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 17 50 51 31\s+vpdpbssds \(%r9\)\{1to16\},%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 17 40 51 71 7f\s+vpdpbssds 0x1fc0\(%rcx\),%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 17 d7 51 72 80\s+vpdpbssds -0x200\(%rdx\)\{1to16\},%zmm29,%zmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 16 40 50 f4\s+vpdpbsud %zmm28,%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 22 16 47 50 b4 f5 00 00 00 10\s+vpdpbsud 0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 16 50 50 31\s+vpdpbsud \(%r9\)\{1to16\},%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 16 40 50 71 7f\s+vpdpbsud 0x1fc0\(%rcx\),%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 16 d7 50 72 80\s+vpdpbsud -0x200\(%rdx\)\{1to16\},%zmm29,%zmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 16 40 51 f4\s+vpdpbsuds %zmm28,%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 22 16 47 51 b4 f5 00 00 00 10\s+vpdpbsuds 0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 16 50 51 31\s+vpdpbsuds \(%r9\)\{1to16\},%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 16 40 51 71 7f\s+vpdpbsuds 0x1fc0\(%rcx\),%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 16 d7 51 72 80\s+vpdpbsuds -0x200\(%rdx\)\{1to16\},%zmm29,%zmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 14 40 50 f4\s+vpdpbuud %zmm28,%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 22 14 47 50 b4 f5 00 00 00 10\s+vpdpbuud 0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 14 50 50 31\s+vpdpbuud \(%r9\)\{1to16\},%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 14 40 50 71 7f\s+vpdpbuud 0x1fc0\(%rcx\),%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 14 d7 50 72 80\s+vpdpbuud -0x200\(%rdx\)\{1to16\},%zmm29,%zmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 14 40 51 f4\s+vpdpbuuds %zmm28,%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 22 14 47 51 b4 f5 00 00 00 10\s+vpdpbuuds 0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 14 50 51 31\s+vpdpbuuds \(%r9\)\{1to16\},%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 14 40 51 71 7f\s+vpdpbuuds 0x1fc0\(%rcx\),%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 14 d7 51 72 80\s+vpdpbuuds -0x200\(%rdx\)\{1to16\},%zmm29,%zmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 16 40 d2 f4\s+vpdpwsud %zmm28,%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 22 16 47 d2 b4 f5 00 00 00 10\s+vpdpwsud 0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 16 50 d2 31\s+vpdpwsud \(%r9\)\{1to16\},%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 16 40 d2 71 7f\s+vpdpwsud 0x1fc0\(%rcx\),%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 16 d7 d2 72 80\s+vpdpwsud -0x200\(%rdx\)\{1to16\},%zmm29,%zmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 16 40 d3 f4\s+vpdpwsuds %zmm28,%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 22 16 47 d3 b4 f5 00 00 00 10\s+vpdpwsuds 0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 16 50 d3 31\s+vpdpwsuds \(%r9\)\{1to16\},%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 16 40 d3 71 7f\s+vpdpwsuds 0x1fc0\(%rcx\),%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 16 d7 d3 72 80\s+vpdpwsuds -0x200\(%rdx\)\{1to16\},%zmm29,%zmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 15 40 d2 f4\s+vpdpwusd %zmm28,%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 22 15 47 d2 b4 f5 00 00 00 10\s+vpdpwusd 0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 15 50 d2 31\s+vpdpwusd \(%r9\)\{1to16\},%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 15 40 d2 71 7f\s+vpdpwusd 0x1fc0\(%rcx\),%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 15 d7 d2 72 80\s+vpdpwusd -0x200\(%rdx\)\{1to16\},%zmm29,%zmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 15 40 d3 f4\s+vpdpwusds %zmm28,%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 22 15 47 d3 b4 f5 00 00 00 10\s+vpdpwusds 0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 15 50 d3 31\s+vpdpwusds \(%r9\)\{1to16\},%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 15 40 d3 71 7f\s+vpdpwusds 0x1fc0\(%rcx\),%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 15 d7 d3 72 80\s+vpdpwusds -0x200\(%rdx\)\{1to16\},%zmm29,%zmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 14 40 d2 f4\s+vpdpwuud %zmm28,%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 22 14 47 d2 b4 f5 00 00 00 10\s+vpdpwuud 0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 14 50 d2 31\s+vpdpwuud \(%r9\)\{1to16\},%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 14 40 d2 71 7f\s+vpdpwuud 0x1fc0\(%rcx\),%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 14 d7 d2 72 80\s+vpdpwuud -0x200\(%rdx\)\{1to16\},%zmm29,%zmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 14 40 d3 f4\s+vpdpwuuds %zmm28,%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 22 14 47 d3 b4 f5 00 00 00 10\s+vpdpwuuds 0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 14 50 d3 31\s+vpdpwuuds \(%r9\)\{1to16\},%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 14 40 d3 71 7f\s+vpdpwuuds 0x1fc0\(%rcx\),%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 14 d7 d3 72 80\s+vpdpwuuds -0x200\(%rdx\)\{1to16\},%zmm29,%zmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 14 40 52 f4\s+vdpphps %zmm28,%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 22 14 47 52 b4 f5 00 00 00 10\s+vdpphps 0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 14 50 52 31\s+vdpphps \(%r9\)\{1to16\},%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 14 40 52 71 7f\s+vdpphps 0x1fc0\(%rcx\),%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 14 d7 52 72 80\s+vdpphps -0x200\(%rdx\)\{1to16\},%zmm29,%zmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 03 16 40 42 f4 7b\s+vmpsadbw \$0x7b,%zmm28,%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 23 16 47 42 b4 f5 00 00 00 10 7b\s+vmpsadbw \$0x7b,0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 43 16 40 42 31 7b\s+vmpsadbw \$0x7b,\(%r9\),%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 63 16 40 42 71 7f 7b\s+vmpsadbw \$0x7b,0x1fc0\(%rcx\),%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 63 16 c7 42 72 80 7b\s+vmpsadbw \$0x7b,-0x2000\(%rdx\),%zmm29,%zmm30\{%k7\}\{z\}
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-avx10_2-512-1.s b/gas/testsuite/gas/i386/x86-64-avx10_2-512-1.s
new file mode 100644
index 0000000..c2bfa2a
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx10_2-512-1.s
@@ -0,0 +1,71 @@
+# Check 64bit AVX10.2/512 instructions
+
+	.arch generic64
+	.arch .avx10.2/512
+	.text
+_start:
+	.irp m, ss, su, uu
+	.irp s, "", s
+	vpdpb\m\()d\s	%zmm28, %zmm29, %zmm30
+	vpdpb\m\()d\s	0x10000000(%rbp, %r14, 8), %zmm29, %zmm30{%k7}
+	vpdpb\m\()d\s	(%r9){1to16}, %zmm29, %zmm30
+	vpdpb\m\()d\s	8128(%rcx), %zmm29, %zmm30
+	vpdpb\m\()d\s	-512(%rdx){1to16}, %zmm29, %zmm30{%k7}{z}
+	.endr
+	.endr
+
+	.irp m, su, us, uu
+	.irp s, "", s
+	vpdpw\m\()d\s	%zmm28, %zmm29, %zmm30
+	vpdpw\m\()d\s	0x10000000(%rbp, %r14, 8), %zmm29, %zmm30{%k7}
+	vpdpw\m\()d\s	(%r9){1to16}, %zmm29, %zmm30
+	vpdpw\m\()d\s	8128(%rcx), %zmm29, %zmm30
+	vpdpw\m\()d\s	-512(%rdx){1to16}, %zmm29, %zmm30{%k7}{z}
+	.endr
+	.endr
+
+	vdpphps	%zmm28, %zmm29, %zmm30
+	vdpphps	0x10000000(%rbp, %r14, 8), %zmm29, %zmm30{%k7}
+	vdpphps	(%r9){1to16}, %zmm29, %zmm30
+	vdpphps	8128(%rcx), %zmm29, %zmm30
+	vdpphps	-512(%rdx){1to16}, %zmm29, %zmm30{%k7}{z}
+
+	vmpsadbw	$123, %zmm28, %zmm29, %zmm30
+	vmpsadbw	$123, 0x10000000(%rbp, %r14, 8), %zmm29, %zmm30{%k7}
+	vmpsadbw	$123, (%r9), %zmm29, %zmm30
+	vmpsadbw	$123, 8128(%rcx), %zmm29, %zmm30
+	vmpsadbw	$123, -8192(%rdx), %zmm29, %zmm30{%k7}{z}
+
+_intel:
+	.intel_syntax noprefix
+	.irp m, ss, su, uu
+	.irp s, "", s
+	vpdpb\m\()d\s	zmm30, zmm29, zmm28
+	vpdpb\m\()d\s	zmm30{k7}, zmm29, ZMMWORD PTR [rbp+r14*8+0x10000000]
+	vpdpb\m\()d\s	zmm30, zmm29, DWORD PTR [r9]{1to16}
+	vpdpb\m\()d\s	zmm30, zmm29, ZMMWORD PTR [rcx+8128]
+	vpdpb\m\()d\s	zmm30{k7}{z}, zmm29, DWORD PTR [rdx-512]{1to16}
+	.endr
+	.endr
+
+	.irp m, su, us, uu
+	.irp s, "", s
+	vpdpw\m\()d\s	zmm30, zmm29, zmm28
+	vpdpw\m\()d\s	zmm30{k7}, zmm29, ZMMWORD PTR [rbp+r14*8+0x10000000]
+	vpdpw\m\()d\s	zmm30, zmm29, DWORD PTR [r9]{1to16}
+	vpdpw\m\()d\s	zmm30, zmm29, ZMMWORD PTR [rcx+8128]
+	vpdpw\m\()d\s	zmm30{k7}{z}, zmm29, DWORD PTR [rdx-512]{1to16}
+	.endr
+	.endr
+
+	vdpphps	zmm30, zmm29, zmm28
+	vdpphps	zmm30{k7}, zmm29, ZMMWORD PTR [rbp+r14*8+0x10000000]
+	vdpphps	zmm30, zmm29, DWORD PTR [r9]{1to16}
+	vdpphps	zmm30, zmm29, ZMMWORD PTR [rcx+8128]
+	vdpphps	zmm30{k7}{z}, zmm29, DWORD PTR [rdx-512]{1to16}
+
+	vmpsadbw	zmm30, zmm29, zmm28, 123
+	vmpsadbw	zmm30{k7}, zmm29, ZMMWORD PTR [rbp+r14*8+0x10000000], 123
+	vmpsadbw	zmm30, zmm29, ZMMWORD PTR [r9], 123
+	vmpsadbw	zmm30, zmm29, ZMMWORD PTR [rcx+8128], 123
+	vmpsadbw	zmm30{k7}{z}, zmm29, ZMMWORD PTR [rdx-8192], 123
diff --git a/gas/testsuite/gas/i386/x86-64-avx10_2-evex-promote.d b/gas/testsuite/gas/i386/x86-64-avx10_2-evex-promote.d
new file mode 100644
index 0000000..1af470e
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx10_2-evex-promote.d
@@ -0,0 +1,113 @@
+#objdump: -dw
+#name: x86_64 AVX10.2/256 evex promote insns
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*c4 c2 57 50 f6\s+vpdpbssd %ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 c2 53 50 f6\s+vpdpbssd %xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 57 50 31\s+vpdpbssd \(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 53 50 31\s+vpdpbssd \(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 d2 57 28 50 f6\s+\{evex\} vpdpbssd %ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 d2 57 08 50 f6\s+\{evex\} vpdpbssd %xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 57 28 50 31\s+\{evex\} vpdpbssd \(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 57 08 50 31\s+\{evex\} vpdpbssd \(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 c2 57 51 f6\s+vpdpbssds %ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 c2 53 51 f6\s+vpdpbssds %xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 57 51 31\s+vpdpbssds \(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 53 51 31\s+vpdpbssds \(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 d2 57 28 51 f6\s+\{evex\} vpdpbssds %ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 d2 57 08 51 f6\s+\{evex\} vpdpbssds %xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 57 28 51 31\s+\{evex\} vpdpbssds \(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 57 08 51 31\s+\{evex\} vpdpbssds \(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 c2 56 50 f6\s+vpdpbsud %ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 c2 52 50 f6\s+vpdpbsud %xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 56 50 31\s+vpdpbsud \(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 52 50 31\s+vpdpbsud \(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 d2 56 28 50 f6\s+\{evex\} vpdpbsud %ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 d2 56 08 50 f6\s+\{evex\} vpdpbsud %xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 56 28 50 31\s+\{evex\} vpdpbsud \(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 56 08 50 31\s+\{evex\} vpdpbsud \(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 c2 56 51 f6\s+vpdpbsuds %ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 c2 52 51 f6\s+vpdpbsuds %xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 56 51 31\s+vpdpbsuds \(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 52 51 31\s+vpdpbsuds \(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 d2 56 28 51 f6\s+\{evex\} vpdpbsuds %ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 d2 56 08 51 f6\s+\{evex\} vpdpbsuds %xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 56 28 51 31\s+\{evex\} vpdpbsuds \(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 56 08 51 31\s+\{evex\} vpdpbsuds \(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 c2 54 50 f6\s+vpdpbuud %ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 c2 50 50 f6\s+vpdpbuud %xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 54 50 31\s+vpdpbuud \(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 50 50 31\s+vpdpbuud \(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 d2 54 28 50 f6\s+\{evex\} vpdpbuud %ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 d2 54 08 50 f6\s+\{evex\} vpdpbuud %xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 54 28 50 31\s+\{evex\} vpdpbuud \(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 54 08 50 31\s+\{evex\} vpdpbuud \(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 c2 54 51 f6\s+vpdpbuuds %ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 c2 50 51 f6\s+vpdpbuuds %xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 54 51 31\s+vpdpbuuds \(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 50 51 31\s+vpdpbuuds \(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 d2 54 28 51 f6\s+\{evex\} vpdpbuuds %ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 d2 54 08 51 f6\s+\{evex\} vpdpbuuds %xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 54 28 51 31\s+\{evex\} vpdpbuuds \(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 54 08 51 31\s+\{evex\} vpdpbuuds \(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 c2 56 d2 f6\s+vpdpwsud %ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 c2 52 d2 f6\s+vpdpwsud %xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 56 d2 31\s+vpdpwsud \(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 52 d2 31\s+vpdpwsud \(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 d2 56 28 d2 f6\s+\{evex\} vpdpwsud %ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 d2 56 08 d2 f6\s+\{evex\} vpdpwsud %xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 56 28 d2 31\s+\{evex\} vpdpwsud \(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 56 08 d2 31\s+\{evex\} vpdpwsud \(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 c2 56 d3 f6\s+vpdpwsuds %ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 c2 52 d3 f6\s+vpdpwsuds %xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 56 d3 31\s+vpdpwsuds \(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 52 d3 31\s+vpdpwsuds \(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 d2 56 28 d3 f6\s+\{evex\} vpdpwsuds %ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 d2 56 08 d3 f6\s+\{evex\} vpdpwsuds %xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 56 28 d3 31\s+\{evex\} vpdpwsuds \(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 56 08 d3 31\s+\{evex\} vpdpwsuds \(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 c2 55 d2 f6\s+vpdpwusd %ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 c2 51 d2 f6\s+vpdpwusd %xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 55 d2 31\s+vpdpwusd \(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 51 d2 31\s+vpdpwusd \(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 d2 55 28 d2 f6\s+\{evex\} vpdpwusd %ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 d2 55 08 d2 f6\s+\{evex\} vpdpwusd %xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 55 28 d2 31\s+\{evex\} vpdpwusd \(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 55 08 d2 31\s+\{evex\} vpdpwusd \(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 c2 55 d3 f6\s+vpdpwusds %ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 c2 51 d3 f6\s+vpdpwusds %xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 55 d3 31\s+vpdpwusds \(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 51 d3 31\s+vpdpwusds \(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 d2 55 28 d3 f6\s+\{evex\} vpdpwusds %ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 d2 55 08 d3 f6\s+\{evex\} vpdpwusds %xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 55 28 d3 31\s+\{evex\} vpdpwusds \(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 55 08 d3 31\s+\{evex\} vpdpwusds \(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 c2 54 d2 f6\s+vpdpwuud %ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 c2 50 d2 f6\s+vpdpwuud %xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 54 d2 31\s+vpdpwuud \(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 50 d2 31\s+vpdpwuud \(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 d2 54 28 d2 f6\s+\{evex\} vpdpwuud %ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 d2 54 08 d2 f6\s+\{evex\} vpdpwuud %xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 54 28 d2 31\s+\{evex\} vpdpwuud \(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 54 08 d2 31\s+\{evex\} vpdpwuud \(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 c2 54 d3 f6\s+vpdpwuuds %ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 c2 50 d3 f6\s+vpdpwuuds %xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 54 d3 31\s+vpdpwuuds \(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 50 d3 31\s+vpdpwuuds \(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 d2 54 28 d3 f6\s+\{evex\} vpdpwuuds %ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 d2 54 08 d3 f6\s+\{evex\} vpdpwuuds %xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 54 28 d3 31\s+\{evex\} vpdpwuuds \(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 54 08 d3 31\s+\{evex\} vpdpwuuds \(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 c3 51 42 f6 7b\s+vmpsadbw \$0x7b,%xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 c3 55 42 f6 7b\s+vmpsadbw \$0x7b,%ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e3 51 42 31 7b\s+vmpsadbw \$0x7b,\(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e3 55 42 31 7b\s+vmpsadbw \$0x7b,\(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 d3 56 08 42 f6 7b\s+\{evex\} vmpsadbw \$0x7b,%xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 d3 56 28 42 f6 7b\s+\{evex\} vmpsadbw \$0x7b,%ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f3 56 08 42 31 7b\s+\{evex\} vmpsadbw \$0x7b,\(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f3 56 28 42 31 7b\s+\{evex\} vmpsadbw \$0x7b,\(%rcx\),%ymm5,%ymm6
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-avx10_2-evex-promote.s b/gas/testsuite/gas/i386/x86-64-avx10_2-evex-promote.s
new file mode 100644
index 0000000..dfbfca8
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx10_2-evex-promote.s
@@ -0,0 +1,42 @@
+# Check AVX10.2/256 evex promoted instructions
+
+	.arch generic64
+	.arch .avx10.2/256
+	.arch .avx_vnni_int8
+	.arch .avx_vnni_int16
+	.text
+_start:
+	.irp m, ss, su, uu
+	.irp s, "", s
+	vpdpb\m\()d\s	%ymm14, %ymm5, %ymm6
+	vpdpb\m\()d\s	%xmm14, %xmm5, %xmm6
+	vpdpb\m\()d\s	(%rcx), %ymm5, %ymm6
+	vpdpb\m\()d\s	(%rcx), %xmm5, %xmm6
+	{evex} vpdpb\m\()d\s	%ymm14, %ymm5, %ymm6
+	{evex} vpdpb\m\()d\s	%xmm14, %xmm5, %xmm6
+	{evex} vpdpb\m\()d\s	(%rcx), %ymm5, %ymm6
+	{evex} vpdpb\m\()d\s	(%rcx), %xmm5, %xmm6
+	.endr
+	.endr
+
+	.irp m, su, us, uu
+	.irp s, "", s
+	vpdpw\m\()d\s	%ymm14, %ymm5, %ymm6
+	vpdpw\m\()d\s	%xmm14, %xmm5, %xmm6
+	vpdpw\m\()d\s	(%rcx), %ymm5, %ymm6
+	vpdpw\m\()d\s	(%rcx), %xmm5, %xmm6
+	{evex} vpdpw\m\()d\s	%ymm14, %ymm5, %ymm6
+	{evex} vpdpw\m\()d\s	%xmm14, %xmm5, %xmm6
+	{evex} vpdpw\m\()d\s	(%rcx), %ymm5, %ymm6
+	{evex} vpdpw\m\()d\s	(%rcx), %xmm5, %xmm6
+	.endr
+	.endr
+
+	vmpsadbw	$123, %xmm14, %xmm5, %xmm6
+	vmpsadbw	$123, %ymm14, %ymm5, %ymm6
+	vmpsadbw	$123, (%rcx), %xmm5, %xmm6
+	vmpsadbw	$123, (%rcx), %ymm5, %ymm6
+	{evex} vmpsadbw	$123, %xmm14, %xmm5, %xmm6
+	{evex} vmpsadbw	$123, %ymm14, %ymm5, %ymm6
+	{evex} vmpsadbw	$123, (%rcx), %xmm5, %xmm6
+	{evex} vmpsadbw	$123, (%rcx), %ymm5, %ymm6
diff --git a/gas/testsuite/gas/i386/x86-64.exp b/gas/testsuite/gas/i386/x86-64.exp
index 3ffeaaf..42a900d 100644
--- a/gas/testsuite/gas/i386/x86-64.exp
+++ b/gas/testsuite/gas/i386/x86-64.exp
@@ -500,6 +500,11 @@ run_dump_test "x86-64-user_msr-intel"
 run_list_test "x86-64-user_msr-inval"
 run_dump_test "x86-64-avx10_2-rounding"
 run_dump_test "x86-64-avx10_2-rounding-intel"
+run_dump_test "x86-64-avx10_2-evex-promote"
+run_dump_test "x86-64-avx10_2-512-1"
+run_dump_test "x86-64-avx10_2-512-1-intel"
+run_dump_test "x86-64-avx10_2-256-1"
+run_dump_test "x86-64-avx10_2-256-1-intel"
 run_dump_test "x86-64-clzero"
 run_dump_test "x86-64-mwaitx-bdver4"
 run_list_test "x86-64-mwaitx-reg"
diff --git a/opcodes/i386-dis-evex-prefix.h b/opcodes/i386-dis-evex-prefix.h
index 0fb6bd4..574a640 100644
--- a/opcodes/i386-dis-evex-prefix.h
+++ b/opcodes/i386-dis-evex-prefix.h
@@ -231,8 +231,8 @@
   },
   /* PREFIX_EVEX_0F3852 */
   {
-    { Bad_Opcode },
-    { "vdpbf16p%XS", { XM, Vex, EXx }, 0 },
+    { "vdpphp%XS",	{ XM, Vex, EXx }, 0 },
+    { "vdpbf16p%XS",	{ XM, Vex, EXx }, 0 },
     { VEX_W_TABLE (VEX_W_0F3852) },
     { "vp4dpws%XSd",	{ XM, Vex, Mxmm }, 0 },
   },
@@ -309,6 +309,12 @@
     { Bad_Opcode },
     { "vgetmants%XW",	{ XMScalar, VexScalar, EXdq, EXxEVexS, Ib }, 0 },
   },
+  /* PREFIX_EVEX_0F3A42_W_0 */
+  {
+    { Bad_Opcode },
+    { "%XEvmpsadbw",	{ XM, Vex, EXx, Ib }, 0 },
+    { "vdbpsadbw",	{ XM, Vex, EXx, Ib }, 0 },
+  },
   /* PREFIX_EVEX_0F3A56 */
   {
     { "vreducep%XH",      { XM, EXxh, EXxEVexS, Ib }, 0 },
diff --git a/opcodes/i386-dis-evex-w.h b/opcodes/i386-dis-evex-w.h
index 24c0c23..27053b4 100644
--- a/opcodes/i386-dis-evex-w.h
+++ b/opcodes/i386-dis-evex-w.h
@@ -425,7 +425,7 @@
   },
   /* EVEX_W_0F3A42 */
   {
-    { "vdbpsadbw",	{ XM, Vex, EXx, Ib }, 0 },
+    { PREFIX_TABLE (PREFIX_EVEX_0F3A42_W_0) },
   },
   /* EVEX_W_0F3A43_L_n */
   {
diff --git a/opcodes/i386-dis-evex.h b/opcodes/i386-dis-evex.h
index 559f0fb..b5ca4a0 100644
--- a/opcodes/i386-dis-evex.h
+++ b/opcodes/i386-dis-evex.h
@@ -529,8 +529,8 @@ static const struct dis386 evex_table[][256] = {
     /* D0 */
     { Bad_Opcode },
     { Bad_Opcode },
-    { Bad_Opcode },
-    { Bad_Opcode },
+    { VEX_W_TABLE (VEX_W_0F38D2) },
+    { VEX_W_TABLE (VEX_W_0F38D3) },
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index e2c7b1b..3a4af4d 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -1199,6 +1199,7 @@ enum
   PREFIX_EVEX_0F3A0A,
   PREFIX_EVEX_0F3A26,
   PREFIX_EVEX_0F3A27,
+  PREFIX_EVEX_0F3A42_W_0,
   PREFIX_EVEX_0F3A56,
   PREFIX_EVEX_0F3A57,
   PREFIX_EVEX_0F3A66,
@@ -3987,18 +3988,18 @@ static const struct dis386 prefix_table[][4] = {
 
   /* PREFIX_VEX_0F3850_W_0 */
   {
-    { "vpdpbuud",	{ XM, Vex, EXx }, 0 },
-    { "vpdpbsud",	{ XM, Vex, EXx }, 0 },
+    { "%XEvpdpbuud",	{ XM, Vex, EXx }, 0 },
+    { "%XEvpdpbsud",	{ XM, Vex, EXx }, 0 },
     { "%XVvpdpbusd",	{ XM, Vex, EXx }, 0 },
-    { "vpdpbssd",	{ XM, Vex, EXx }, 0 },
+    { "%XEvpdpbssd",	{ XM, Vex, EXx }, 0 },
   },
 
   /* PREFIX_VEX_0F3851_W_0 */
   {
-    { "vpdpbuuds",	{ XM, Vex, EXx }, 0 },
-    { "vpdpbsuds",	{ XM, Vex, EXx }, 0 },
+    { "%XEvpdpbuuds",	{ XM, Vex, EXx }, 0 },
+    { "%XEvpdpbsuds",	{ XM, Vex, EXx }, 0 },
     { "%XVvpdpbusds",	{ XM, Vex, EXx }, 0 },
-    { "vpdpbssds",	{ XM, Vex, EXx }, 0 },
+    { "%XEvpdpbssds",	{ XM, Vex, EXx }, 0 },
   },
   /* PREFIX_VEX_0F385C_X86_64_L_0_W_0 */
   {
@@ -4046,16 +4047,16 @@ static const struct dis386 prefix_table[][4] = {
 
   /* PREFIX_VEX_0F38D2_W_0 */
   {
-    { "vpdpwuud",	{ XM, Vex, EXx }, 0 },
-    { "vpdpwsud",	{ XM, Vex, EXx }, 0 },
-    { "vpdpwusd",	{ XM, Vex, EXx }, 0 },
+    { "%XEvpdpwuud",	{ XM, Vex, EXx }, 0 },
+    { "%XEvpdpwsud",	{ XM, Vex, EXx }, 0 },
+    { "%XEvpdpwusd",	{ XM, Vex, EXx }, 0 },
   },
 
   /* PREFIX_VEX_0F38D3_W_0 */
   {
-    { "vpdpwuuds",	{ XM, Vex, EXx }, 0 },
-    { "vpdpwsuds",	{ XM, Vex, EXx }, 0 },
-    { "vpdpwusds",	{ XM, Vex, EXx }, 0 },
+    { "%XEvpdpwuuds",	{ XM, Vex, EXx }, 0 },
+    { "%XEvpdpwsuds",	{ XM, Vex, EXx }, 0 },
+    { "%XEvpdpwusds",	{ XM, Vex, EXx }, 0 },
   },
 
   /* PREFIX_VEX_0F38CB */
diff --git a/opcodes/i386-mnem.h b/opcodes/i386-mnem.h
index 48f8c94..ec6fa8f 100644
--- a/opcodes/i386-mnem.h
+++ b/opcodes/i386-mnem.h
@@ -1852,638 +1852,639 @@ extern const char i386_mnemonics[];
 #define MN_vunpckhps 0x37e4
 #define MN_movlhps (MN_vmovlhps + 1)
 #define MN_vmovlhps 0x37ee
+#define MN_vdpphps 0x37f7
 #define MN_movhps (MN_vmovhps + 1)
-#define MN_vmovhps 0x37f7
+#define MN_vmovhps 0x37ff
 #define MN_movmskps (MN_vmovmskps + 1)
-#define MN_vmovmskps 0x37ff
+#define MN_vmovmskps 0x3807
 #define MN_movhlps (MN_vmovhlps + 1)
-#define MN_vmovhlps 0x3809
-#define MN_vpermilps 0x3812
+#define MN_vmovhlps 0x3811
+#define MN_vpermilps 0x381a
 #define MN_unpcklps (MN_vunpcklps + 1)
-#define MN_vunpcklps 0x381c
+#define MN_vunpcklps 0x3824
 #define MN_mulps (MN_vmulps + 1)
-#define MN_vmulps 0x3826
+#define MN_vmulps 0x382e
 #define MN_movlps (MN_vmovlps + 1)
-#define MN_vmovlps 0x382d
+#define MN_vmovlps 0x3835
 #define MN_cmps (MN_ccmps + 1)
-#define MN_ccmps 0x3835
-#define MN_vblendmps 0x383b
-#define MN_vfixupimmps 0x3845
-#define MN_vpermps 0x3851
+#define MN_ccmps 0x383d
+#define MN_vblendmps 0x3843
+#define MN_vfixupimmps 0x384d
+#define MN_vpermps 0x3859
 #define MN_andnps (MN_vandnps + 1)
-#define MN_vandnps 0x3859
+#define MN_vandnps 0x3861
 #define MN_minps (MN_vminps + 1)
-#define MN_vminps 0x3861
-#define MN_seamops 0x3868
+#define MN_vminps 0x3869
+#define MN_seamops 0x3870
 #define MN_rcpps (MN_vrcpps + 1)
-#define MN_vrcpps 0x3870
+#define MN_vrcpps 0x3878
 #define MN_dpps (MN_vdpps + 1)
-#define MN_vdpps 0x3877
+#define MN_vdpps 0x387f
 #define MN_cmpps (MN_vcmpps + 1)
-#define MN_vcmpps 0x387d
-#define MN_vgetexpps 0x3884
-#define MN_vgatherpf0qps 0x388e
-#define MN_vscatterpf0qps 0x389c
-#define MN_vgatherpf1qps 0x38ab
-#define MN_vscatterpf1qps 0x38b9
-#define MN_vcmpunord_qps 0x38c8
-#define MN_vcmpord_qps 0x38d6
+#define MN_vcmpps 0x3885
+#define MN_vgetexpps 0x388c
+#define MN_vgatherpf0qps 0x3896
+#define MN_vscatterpf0qps 0x38a4
+#define MN_vgatherpf1qps 0x38b3
+#define MN_vscatterpf1qps 0x38c1
+#define MN_vcmpunord_qps 0x38d0
+#define MN_vcmpord_qps 0x38de
 #define MN_cmpneqps (MN_vcmpneqps + 1)
-#define MN_vcmpneqps 0x38e2
+#define MN_vcmpneqps 0x38ea
 #define MN_cmpeqps (MN_vcmpeqps + 1)
-#define MN_vcmpeqps 0x38ec
-#define MN_vcmpge_oqps 0x38f5
-#define MN_vcmple_oqps 0x3901
-#define MN_vcmpfalse_oqps 0x390d
-#define MN_vcmpneq_oqps 0x391c
-#define MN_vcmpeq_oqps 0x3929
-#define MN_vcmpgt_oqps 0x3935
-#define MN_vcmplt_oqps 0x3941
-#define MN_vgatherqps 0x394d
-#define MN_vscatterqps 0x3958
-#define MN_vcmpnge_uqps 0x3964
-#define MN_vcmpnle_uqps 0x3971
-#define MN_vcmptrue_uqps 0x397e
-#define MN_vcmpneq_uqps 0x398c
-#define MN_vcmpeq_uqps 0x3999
-#define MN_vcmpngt_uqps 0x39a5
-#define MN_vcmpnlt_uqps 0x39b2
+#define MN_vcmpeqps 0x38f4
+#define MN_vcmpge_oqps 0x38fd
+#define MN_vcmple_oqps 0x3909
+#define MN_vcmpfalse_oqps 0x3915
+#define MN_vcmpneq_oqps 0x3924
+#define MN_vcmpeq_oqps 0x3931
+#define MN_vcmpgt_oqps 0x393d
+#define MN_vcmplt_oqps 0x3949
+#define MN_vgatherqps 0x3955
+#define MN_vscatterqps 0x3960
+#define MN_vcmpnge_uqps 0x396c
+#define MN_vcmpnle_uqps 0x3979
+#define MN_vcmptrue_uqps 0x3986
+#define MN_vcmpneq_uqps 0x3994
+#define MN_vcmpeq_uqps 0x39a1
+#define MN_vcmpngt_uqps 0x39ad
+#define MN_vcmpnlt_uqps 0x39ba
 #define MN_orps (MN_vorps + 1)
-#define MN_vorps 0x39bf
+#define MN_vorps 0x39c7
 #define MN_xorps (MN_vxorps + 1)
-#define MN_vxorps 0x39c5
-#define MN_vcmpunord_sps 0x39cc
-#define MN_vcmpord_sps 0x39da
-#define MN_vcmpge_osps 0x39e6
-#define MN_vcmple_osps 0x39f2
-#define MN_vcmpfalse_osps 0x39fe
-#define MN_vcmpneq_osps 0x3a0d
-#define MN_vcmpeq_osps 0x3a1a
-#define MN_vcmpgt_osps 0x3a26
-#define MN_vcmplt_osps 0x3a32
-#define MN_vfpclassps 0x3a3e
-#define MN_vcompressps 0x3a49
-#define MN_vcmpnge_usps 0x3a55
-#define MN_vcmpnle_usps 0x3a62
-#define MN_vcmptrue_usps 0x3a6f
-#define MN_vcmpneq_usps 0x3a7d
-#define MN_vcmpeq_usps 0x3a8a
-#define MN_vcmpngt_usps 0x3a96
-#define MN_vcmpnlt_usps 0x3aa3
+#define MN_vxorps 0x39cd
+#define MN_vcmpunord_sps 0x39d4
+#define MN_vcmpord_sps 0x39e2
+#define MN_vcmpge_osps 0x39ee
+#define MN_vcmple_osps 0x39fa
+#define MN_vcmpfalse_osps 0x3a06
+#define MN_vcmpneq_osps 0x3a15
+#define MN_vcmpeq_osps 0x3a22
+#define MN_vcmpgt_osps 0x3a2e
+#define MN_vcmplt_osps 0x3a3a
+#define MN_vfpclassps 0x3a46
+#define MN_vcompressps 0x3a51
+#define MN_vcmpnge_usps 0x3a5d
+#define MN_vcmpnle_usps 0x3a6a
+#define MN_vcmptrue_usps 0x3a77
+#define MN_vcmpneq_usps 0x3a85
+#define MN_vcmpeq_usps 0x3a92
+#define MN_vcmpngt_usps 0x3a9e
+#define MN_vcmpnlt_usps 0x3aab
 #define MN_extractps (MN_vextractps + 1)
-#define MN_vextractps 0x3ab0
-#define MN_vcmpngtps 0x3abb
-#define MN_vcmpgtps 0x3ac5
+#define MN_vextractps 0x3ab8
+#define MN_vcmpngtps 0x3ac3
+#define MN_vcmpgtps 0x3acd
 #define MN_cmpnltps (MN_vcmpnltps + 1)
-#define MN_vcmpnltps 0x3ace
+#define MN_vcmpnltps 0x3ad6
 #define MN_cmpltps (MN_vcmpltps + 1)
-#define MN_vcmpltps 0x3ad8
-#define MN_vgetmantps 0x3ae1
+#define MN_vcmpltps 0x3ae0
+#define MN_vgetmantps 0x3ae9
 #define MN_movntps (MN_vmovntps + 1)
-#define MN_vmovntps 0x3aec
+#define MN_vmovntps 0x3af4
 #define MN_insertps (MN_vinsertps + 1)
-#define MN_vinsertps 0x3af5
+#define MN_vinsertps 0x3afd
 #define MN_sqrtps (MN_rsqrtps + 1)
 #define MN_rsqrtps (MN_vrsqrtps + 1)
-#define MN_vrsqrtps 0x3aff
-#define MN_vsqrtps 0x3b08
-#define MN_vtestps 0x3b10
+#define MN_vrsqrtps 0x3b07
+#define MN_vsqrtps 0x3b10
+#define MN_vtestps 0x3b18
 #define MN_movups (MN_vmovups + 1)
-#define MN_vmovups 0x3b18
+#define MN_vmovups 0x3b20
 #define MN_blendvps (MN_vblendvps + 1)
-#define MN_vblendvps 0x3b20
+#define MN_vblendvps 0x3b28
 #define MN_divps (MN_vdivps + 1)
-#define MN_vdivps 0x3b2a
-#define MN_vmaskmovps 0x3b31
+#define MN_vdivps 0x3b32
+#define MN_vmaskmovps 0x3b39
 #define MN_maxps (MN_vmaxps + 1)
-#define MN_vmaxps 0x3b3c
-#define MN_vfrczps 0x3b43
-#define MN_xrstors 0x3b4b
+#define MN_vmaxps 0x3b44
+#define MN_vfrczps 0x3b4b
+#define MN_xrstors 0x3b53
 #define MN_ss (MN_vfmsub231ss + 9)
-#define MN_vfmsub231ss 0x3b53
-#define MN_vfnmsub231ss 0x3b5f
-#define MN_vfmadd231ss 0x3b6c
-#define MN_vfnmadd231ss 0x3b78
-#define MN_vfmsub132ss 0x3b85
-#define MN_vfnmsub132ss 0x3b91
-#define MN_vfmadd132ss 0x3b9e
-#define MN_vfnmadd132ss 0x3baa
+#define MN_vfmsub231ss 0x3b5b
+#define MN_vfnmsub231ss 0x3b67
+#define MN_vfmadd231ss 0x3b74
+#define MN_vfnmadd231ss 0x3b80
+#define MN_vfmsub132ss 0x3b8d
+#define MN_vfnmsub132ss 0x3b99
+#define MN_vfmadd132ss 0x3ba6
+#define MN_vfnmadd132ss 0x3bb2
 #define MN_cvtsd2ss (MN_vcvtsd2ss + 1)
-#define MN_vcvtsd2ss 0x3bb7
-#define MN_vcvtsh2ss 0x3bc1
+#define MN_vcvtsd2ss 0x3bbf
+#define MN_vcvtsh2ss 0x3bc9
 #define MN_cvtsi2ss (MN_vcvtsi2ss + 1)
-#define MN_vcvtsi2ss 0x3bcb
-#define MN_vcvtusi2ss 0x3bd5
-#define MN_vfmsub213ss 0x3be0
-#define MN_vfnmsub213ss 0x3bec
-#define MN_vfmadd213ss 0x3bf9
-#define MN_vfnmadd213ss 0x3c05
-#define MN_vrcp14ss 0x3c12
-#define MN_vrsqrt14ss 0x3c1b
-#define MN_vrcp28ss 0x3c26
-#define MN_vrsqrt28ss 0x3c2f
+#define MN_vcvtsi2ss 0x3bd3
+#define MN_vcvtusi2ss 0x3bdd
+#define MN_vfmsub213ss 0x3be8
+#define MN_vfnmsub213ss 0x3bf4
+#define MN_vfmadd213ss 0x3c01
+#define MN_vfnmadd213ss 0x3c0d
+#define MN_vrcp14ss 0x3c1a
+#define MN_vrsqrt14ss 0x3c23
+#define MN_vrcp28ss 0x3c2e
+#define MN_vrsqrt28ss 0x3c37
 #define MN_subss (MN_vfmsubss + 3)
-#define MN_vfmsubss 0x3c3a
-#define MN_vfnmsubss 0x3c43
-#define MN_vsubss 0x3c4d
+#define MN_vfmsubss 0x3c42
+#define MN_vfnmsubss 0x3c4b
+#define MN_vsubss 0x3c55
 #define MN_addss (MN_v4fmaddss + 4)
-#define MN_v4fmaddss 0x3c54
-#define MN_vfmaddss 0x3c5e
-#define MN_v4fnmaddss 0x3c67
-#define MN_vfnmaddss 0x3c72
-#define MN_vaddss 0x3c7c
+#define MN_v4fmaddss 0x3c5c
+#define MN_vfmaddss 0x3c66
+#define MN_v4fnmaddss 0x3c6f
+#define MN_vfnmaddss 0x3c7a
+#define MN_vaddss 0x3c84
 #define MN_roundss (MN_vroundss + 1)
-#define MN_vroundss 0x3c83
+#define MN_vroundss 0x3c8b
 #define MN_cmpunordss (MN_vcmpunordss + 1)
-#define MN_vcmpunordss 0x3c8c
+#define MN_vcmpunordss 0x3c94
 #define MN_cmpordss (MN_vcmpordss + 1)
-#define MN_vcmpordss 0x3c98
-#define MN_vreducess 0x3ca2
-#define MN_vrangess 0x3cac
-#define MN_vcmpngess 0x3cb5
-#define MN_vcmpgess 0x3cbf
-#define MN_vrndscaless 0x3cc8
+#define MN_vcmpordss 0x3ca0
+#define MN_vreducess 0x3caa
+#define MN_vrangess 0x3cb4
+#define MN_vcmpngess 0x3cbd
+#define MN_vcmpgess 0x3cc7
+#define MN_vrndscaless 0x3cd0
 #define MN_cmpnless (MN_vcmpnless + 1)
-#define MN_vcmpnless 0x3cd4
+#define MN_vcmpnless 0x3cdc
 #define MN_cmpless (MN_vcmpless + 1)
-#define MN_vcmpless 0x3cde
-#define MN_vcmpfalsess 0x3ce7
-#define MN_vcmptruess 0x3cf3
-#define MN_vscalefss 0x3cfe
+#define MN_vcmpless 0x3ce6
+#define MN_vcmpfalsess 0x3cef
+#define MN_vcmptruess 0x3cfb
+#define MN_vscalefss 0x3d06
 #define MN_comiss (MN_ucomiss + 1)
 #define MN_ucomiss (MN_vucomiss + 1)
-#define MN_vucomiss 0x3d08
-#define MN_vcomiss 0x3d11
+#define MN_vucomiss 0x3d10
+#define MN_vcomiss 0x3d19
 #define MN_lss (MN_mulss + 2)
 #define MN_mulss (MN_vmulss + 1)
-#define MN_vmulss 0x3d19
-#define MN_vfixupimmss 0x3d20
+#define MN_vmulss 0x3d21
+#define MN_vfixupimmss 0x3d28
 #define MN_minss (MN_vminss + 1)
-#define MN_vminss 0x3d2c
+#define MN_vminss 0x3d34
 #define MN_rcpss (MN_vrcpss + 1)
-#define MN_vrcpss 0x3d33
+#define MN_vrcpss 0x3d3b
 #define MN_cmpss (MN_vcmpss + 1)
-#define MN_vcmpss 0x3d3a
-#define MN_vgetexpss 0x3d41
-#define MN_vcmpunord_qss 0x3d4b
-#define MN_vcmpord_qss 0x3d59
+#define MN_vcmpss 0x3d42
+#define MN_vgetexpss 0x3d49
+#define MN_vcmpunord_qss 0x3d53
+#define MN_vcmpord_qss 0x3d61
 #define MN_cmpneqss (MN_vcmpneqss + 1)
-#define MN_vcmpneqss 0x3d65
+#define MN_vcmpneqss 0x3d6d
 #define MN_cmpeqss (MN_vcmpeqss + 1)
-#define MN_vcmpeqss 0x3d6f
-#define MN_vcmpge_oqss 0x3d78
-#define MN_vcmple_oqss 0x3d84
-#define MN_vcmpfalse_oqss 0x3d90
-#define MN_vcmpneq_oqss 0x3d9f
-#define MN_vcmpeq_oqss 0x3dac
-#define MN_vcmpgt_oqss 0x3db8
-#define MN_vcmplt_oqss 0x3dc4
-#define MN_vcmpnge_uqss 0x3dd0
-#define MN_vcmpnle_uqss 0x3ddd
-#define MN_vcmptrue_uqss 0x3dea
-#define MN_vcmpneq_uqss 0x3df8
-#define MN_vcmpeq_uqss 0x3e05
-#define MN_vcmpngt_uqss 0x3e11
-#define MN_vcmpnlt_uqss 0x3e1e
-#define MN_vcmpunord_sss 0x3e2b
-#define MN_vcmpord_sss 0x3e39
-#define MN_vcmpge_osss 0x3e45
-#define MN_vcmple_osss 0x3e51
-#define MN_vcmpfalse_osss 0x3e5d
-#define MN_vcmpneq_osss 0x3e6c
-#define MN_vcmpeq_osss 0x3e79
-#define MN_vcmpgt_osss 0x3e85
-#define MN_vcmplt_osss 0x3e91
-#define MN_vfpclassss 0x3e9d
-#define MN_vcmpnge_usss 0x3ea8
-#define MN_vcmpnle_usss 0x3eb5
-#define MN_vcmptrue_usss 0x3ec2
-#define MN_vcmpneq_usss 0x3ed0
-#define MN_vcmpeq_usss 0x3edd
-#define MN_vcmpngt_usss 0x3ee9
-#define MN_vcmpnlt_usss 0x3ef6
-#define MN_vcmpngtss 0x3f03
-#define MN_vcmpgtss 0x3f0d
+#define MN_vcmpeqss 0x3d77
+#define MN_vcmpge_oqss 0x3d80
+#define MN_vcmple_oqss 0x3d8c
+#define MN_vcmpfalse_oqss 0x3d98
+#define MN_vcmpneq_oqss 0x3da7
+#define MN_vcmpeq_oqss 0x3db4
+#define MN_vcmpgt_oqss 0x3dc0
+#define MN_vcmplt_oqss 0x3dcc
+#define MN_vcmpnge_uqss 0x3dd8
+#define MN_vcmpnle_uqss 0x3de5
+#define MN_vcmptrue_uqss 0x3df2
+#define MN_vcmpneq_uqss 0x3e00
+#define MN_vcmpeq_uqss 0x3e0d
+#define MN_vcmpngt_uqss 0x3e19
+#define MN_vcmpnlt_uqss 0x3e26
+#define MN_vcmpunord_sss 0x3e33
+#define MN_vcmpord_sss 0x3e41
+#define MN_vcmpge_osss 0x3e4d
+#define MN_vcmple_osss 0x3e59
+#define MN_vcmpfalse_osss 0x3e65
+#define MN_vcmpneq_osss 0x3e74
+#define MN_vcmpeq_osss 0x3e81
+#define MN_vcmpgt_osss 0x3e8d
+#define MN_vcmplt_osss 0x3e99
+#define MN_vfpclassss 0x3ea5
+#define MN_vcmpnge_usss 0x3eb0
+#define MN_vcmpnle_usss 0x3ebd
+#define MN_vcmptrue_usss 0x3eca
+#define MN_vcmpneq_usss 0x3ed8
+#define MN_vcmpeq_usss 0x3ee5
+#define MN_vcmpngt_usss 0x3ef1
+#define MN_vcmpnlt_usss 0x3efe
+#define MN_vcmpngtss 0x3f0b
+#define MN_vcmpgtss 0x3f15
 #define MN_cmpnltss (MN_vcmpnltss + 1)
-#define MN_vcmpnltss 0x3f16
+#define MN_vcmpnltss 0x3f1e
 #define MN_cmpltss (MN_vcmpltss + 1)
-#define MN_vcmpltss 0x3f20
-#define MN_vgetmantss 0x3f29
-#define MN_movntss 0x3f34
+#define MN_vcmpltss 0x3f28
+#define MN_vgetmantss 0x3f31
+#define MN_movntss 0x3f3c
 #define MN_sqrtss (MN_rsqrtss + 1)
 #define MN_rsqrtss (MN_vrsqrtss + 1)
-#define MN_vrsqrtss 0x3f3c
-#define MN_vsqrtss 0x3f45
-#define MN_vbroadcastss 0x3f4d
+#define MN_vrsqrtss 0x3f44
+#define MN_vsqrtss 0x3f4d
+#define MN_vbroadcastss 0x3f55
 #define MN_divss (MN_vdivss + 1)
-#define MN_vdivss 0x3f5a
+#define MN_vdivss 0x3f62
 #define MN_movss (MN_vmovss + 1)
-#define MN_vmovss 0x3f61
+#define MN_vmovss 0x3f69
 #define MN_maxss (MN_vmaxss + 1)
-#define MN_vmaxss 0x3f68
-#define MN_vfrczss 0x3f6f
-#define MN_bts 0x3f77
-#define MN_erets 0x3f7b
-#define MN_sets 0x3f81
-#define MN_clts 0x3f86
-#define MN_ctests 0x3f8b
-#define MN_outs 0x3f92
-#define MN_setzus 0x3f97
+#define MN_vmaxss 0x3f70
+#define MN_vfrczss 0x3f77
+#define MN_bts 0x3f7f
+#define MN_erets 0x3f83
+#define MN_sets 0x3f89
+#define MN_clts 0x3f8e
+#define MN_ctests 0x3f93
+#define MN_outs 0x3f9a
+#define MN_setzus 0x3f9f
 #define MN_movs (MN_cmovs + 1)
 #define MN_cmovs (MN_cfcmovs + 2)
-#define MN_cfcmovs 0x3f9e
-#define MN_fldl2t 0x3fa6
-#define MN_xlat 0x3fad
-#define MN_bt 0x3fb2
-#define MN_fxtract 0x3fb5
-#define MN_lgdt 0x3fbd
-#define MN_sgdt 0x3fc2
-#define MN_lidt 0x3fc7
-#define MN_sidt 0x3fcc
-#define MN_fldt 0x3fd1
-#define MN_lldt 0x3fd6
-#define MN_sldt 0x3fdb
+#define MN_cfcmovs 0x3fa6
+#define MN_fldl2t 0x3fae
+#define MN_xlat 0x3fb5
+#define MN_bt 0x3fba
+#define MN_fxtract 0x3fbd
+#define MN_lgdt 0x3fc5
+#define MN_sgdt 0x3fca
+#define MN_lidt 0x3fcf
+#define MN_sidt 0x3fd4
+#define MN_fldt 0x3fd9
+#define MN_lldt 0x3fde
+#define MN_sldt 0x3fe3
 #define MN_ret (MN_iret + 1)
 #define MN_iret (MN_uiret + 1)
-#define MN_uiret 0x3fe0
-#define MN_lret 0x3fe6
-#define MN_seamret 0x3feb
-#define MN_sysret 0x3ff3
-#define MN_hreset 0x3ffa
-#define MN_pfcmpgt 0x4001
-#define MN_ht 0x4009
+#define MN_uiret 0x3fe8
+#define MN_lret 0x3fee
+#define MN_seamret 0x3ff3
+#define MN_sysret 0x3ffb
+#define MN_hreset 0x4002
+#define MN_pfcmpgt 0x4009
+#define MN_ht 0x4011
 #define MN_wait (MN_fwait + 1)
-#define MN_fwait 0x400c
+#define MN_fwait 0x4014
 #define MN_mwait (MN_umwait + 1)
-#define MN_umwait 0x4012
-#define MN_mcommit 0x4019
-#define MN_finit 0x4021
-#define MN_skinit 0x4027
-#define MN_fninit 0x402e
-#define MN_vmgexit 0x4035
-#define MN_sysexit 0x403d
-#define MN_hlt 0x4045
-#define MN_popcnt 0x4049
-#define MN_lzcnt 0x4050
-#define MN_tzcnt 0x4056
-#define MN_hnt 0x405c
+#define MN_umwait 0x401a
+#define MN_mcommit 0x4021
+#define MN_finit 0x4029
+#define MN_skinit 0x402f
+#define MN_fninit 0x4036
+#define MN_vmgexit 0x403d
+#define MN_sysexit 0x4045
+#define MN_hlt 0x404d
+#define MN_popcnt 0x4051
+#define MN_lzcnt 0x4058
+#define MN_tzcnt 0x405e
+#define MN_hnt 0x4064
 #define MN_int (MN_frndint + 4)
-#define MN_frndint 0x4060
-#define MN_not 0x4068
-#define MN_invept 0x406c
-#define MN_ccmpt 0x4073
-#define MN_xsaveopt 0x4079
-#define MN_clflushopt 0x4082
-#define MN_fstpt 0x408d
-#define MN_xabort 0x4093
-#define MN_fsqrt 0x409a
-#define MN_pfrsqrt 0x40a0
+#define MN_frndint 0x4068
+#define MN_not 0x4070
+#define MN_invept 0x4074
+#define MN_ccmpt 0x407b
+#define MN_xsaveopt 0x4081
+#define MN_clflushopt 0x408a
+#define MN_fstpt 0x4095
+#define MN_xabort 0x409b
+#define MN_fsqrt 0x40a2
+#define MN_pfrsqrt 0x40a8
 #define MN_aesdeclast (MN_vaesdeclast + 1)
-#define MN_vaesdeclast 0x40a8
+#define MN_vaesdeclast 0x40b0
 #define MN_aesenclast (MN_vaesenclast + 1)
-#define MN_vaesenclast 0x40b4
+#define MN_vaesenclast 0x40bc
 #define MN_test (MN_ptest + 1)
 #define MN_ptest (MN_vptest + 1)
-#define MN_vptest 0x40c0
-#define MN_xtest 0x40c7
-#define MN_fst 0x40cd
-#define MN_fist 0x40d1
-#define MN_rdmsrlist 0x40d6
-#define MN_wrmsrlist 0x40e0
+#define MN_vptest 0x40c8
+#define MN_xtest 0x40cf
+#define MN_fst 0x40d5
+#define MN_fist 0x40d9
+#define MN_rdmsrlist 0x40de
+#define MN_wrmsrlist 0x40e8
 #define MN_aeskeygenassist (MN_vaeskeygenassist + 1)
-#define MN_vaeskeygenassist 0x40ea
-#define MN_vmptrst 0x40fb
-#define MN_ftst 0x4103
-#define MN_rmpadjust 0x4108
-#define MN_ctestt 0x4112
-#define MN_out 0x4119
-#define MN_pext 0x411d
-#define MN_bndcu 0x4122
-#define MN_enclu 0x4128
-#define MN_fcmovnu 0x412e
+#define MN_vaeskeygenassist 0x40f2
+#define MN_vmptrst 0x4103
+#define MN_ftst 0x410b
+#define MN_rmpadjust 0x4110
+#define MN_ctestt 0x411a
+#define MN_out 0x4121
+#define MN_pext 0x4125
+#define MN_bndcu 0x412a
+#define MN_enclu 0x4130
+#define MN_fcmovnu 0x4136
 #define MN_lddqu (MN_vlddqu + 1)
-#define MN_vlddqu 0x4136
+#define MN_vlddqu 0x413e
 #define MN_movdqu (MN_maskmovdqu + 4)
 #define MN_maskmovdqu (MN_vmaskmovdqu + 1)
-#define MN_vmaskmovdqu 0x413d
-#define MN_vmovdqu 0x4149
-#define MN_rdpkru 0x4151
-#define MN_wrpkru 0x4158
-#define MN_rdpru 0x415f
-#define MN_eretu 0x4165
-#define MN_fcmovu 0x416b
-#define MN_imulzu 0x4172
-#define MN_xgetbv 0x4179
-#define MN_xsetbv 0x4180
+#define MN_vmaskmovdqu 0x4145
+#define MN_vmovdqu 0x4151
+#define MN_rdpkru 0x4159
+#define MN_wrpkru 0x4160
+#define MN_rdpru 0x4167
+#define MN_eretu 0x416d
+#define MN_fcmovu 0x4173
+#define MN_imulzu 0x417a
+#define MN_xgetbv 0x4181
+#define MN_xsetbv 0x4188
 #define MN_div (MN_fdiv + 1)
-#define MN_fdiv 0x4187
+#define MN_fdiv 0x418f
 #define MN_idiv (MN_fidiv + 1)
-#define MN_fidiv 0x418c
-#define MN_enclv 0x4192
-#define MN_fldenv 0x4198
-#define MN_fstenv 0x419f
-#define MN_fnstenv 0x41a6
+#define MN_fidiv 0x4194
+#define MN_enclv 0x419a
+#define MN_fldenv 0x41a0
+#define MN_fstenv 0x41a7
+#define MN_fnstenv 0x41ae
 #define MN_mov (MN_vpcmov + 3)
-#define MN_vpcmov 0x41ae
-#define MN_bndmov 0x41b5
-#define MN_smov 0x41bc
-#define MN_rex_w 0x41c1
-#define MN_vcvttph2w 0x41c7
-#define MN_vcvtph2w 0x41d1
-#define MN_vpermi2w 0x41da
-#define MN_vpmovm2w 0x41e3
-#define MN_vpermt2w 0x41ec
-#define MN_vpshaw 0x41f5
+#define MN_vpcmov 0x41b6
+#define MN_bndmov 0x41bd
+#define MN_smov 0x41c4
+#define MN_rex_w 0x41c9
+#define MN_vcvttph2w 0x41cf
+#define MN_vcvtph2w 0x41d9
+#define MN_vpermi2w 0x41e2
+#define MN_vpmovm2w 0x41eb
+#define MN_vpermt2w 0x41f4
+#define MN_vpshaw 0x41fd
 #define MN_psraw (MN_vpsraw + 1)
-#define MN_vpsraw 0x41fc
-#define MN_vphsubbw 0x4203
-#define MN_cbw 0x420c
+#define MN_vpsraw 0x4204
+#define MN_vphsubbw 0x420b
+#define MN_cbw 0x4214
 #define MN_psadbw (MN_vdbpsadbw + 3)
-#define MN_vdbpsadbw 0x4210
+#define MN_vdbpsadbw 0x4218
 #define MN_mpsadbw (MN_vmpsadbw + 1)
-#define MN_vmpsadbw 0x421a
-#define MN_vpsadbw 0x4223
-#define MN_vphaddbw 0x422b
+#define MN_vmpsadbw 0x4222
+#define MN_vpsadbw 0x422b
+#define MN_vphaddbw 0x4233
 #define MN_punpckhbw (MN_vpunpckhbw + 1)
-#define MN_vpunpckhbw 0x4234
-#define MN_kunpckbw 0x423f
+#define MN_vpunpckhbw 0x423c
+#define MN_kunpckbw 0x4247
 #define MN_punpcklbw (MN_vpunpcklbw + 1)
-#define MN_vpunpcklbw 0x4248
-#define MN_vphaddubw 0x4253
+#define MN_vpunpcklbw 0x4250
+#define MN_vphaddubw 0x425b
 #define MN_phsubw (MN_vphsubw + 1)
-#define MN_vphsubw 0x425d
+#define MN_vphsubw 0x4265
 #define MN_psubw (MN_vpsubw + 1)
-#define MN_vpsubw 0x4265
+#define MN_vpsubw 0x426d
 #define MN_pmovsxbw (MN_vpmovsxbw + 1)
-#define MN_vpmovsxbw 0x426c
+#define MN_vpmovsxbw 0x4274
 #define MN_pmovzxbw (MN_vpmovzxbw + 1)
-#define MN_vpmovzxbw 0x4276
-#define MN_fldcw 0x4280
-#define MN_fstcw 0x4286
-#define MN_fnstcw 0x428c
+#define MN_vpmovzxbw 0x427e
+#define MN_fldcw 0x4288
+#define MN_fstcw 0x428e
+#define MN_fnstcw 0x4294
 #define MN_phaddw (MN_vphaddw + 1)
-#define MN_vphaddw 0x4293
-#define MN_kaddw 0x429b
+#define MN_vphaddw 0x429b
+#define MN_kaddw 0x42a3
 #define MN_paddw (MN_vpaddw + 1)
-#define MN_vpaddw 0x42a1
-#define MN_vpshldw 0x42a8
-#define MN_kandw 0x42b0
-#define MN_vpexpandw 0x42b6
+#define MN_vpaddw 0x42a9
+#define MN_vpshldw 0x42b0
+#define MN_kandw 0x42b8
+#define MN_vpexpandw 0x42be
 #define MN_pblendw (MN_vpblendw + 1)
-#define MN_vpblendw 0x42c0
-#define MN_vpshrdw 0x42c9
+#define MN_vpblendw 0x42c8
+#define MN_vpshrdw 0x42d1
 #define MN_packssdw (MN_vpackssdw + 1)
-#define MN_vpackssdw 0x42d1
+#define MN_vpackssdw 0x42d9
 #define MN_packusdw (MN_vpackusdw + 1)
-#define MN_vpackusdw 0x42db
-#define MN_vpmovusdw 0x42e5
-#define MN_vpmovsdw 0x42ef
-#define MN_vpmovdw 0x42f8
-#define MN_vpcomgew 0x4300
-#define MN_vpcomlew 0x4309
-#define MN_vpcmpnlew 0x4312
-#define MN_vpcmplew 0x431c
-#define MN_vpcomfalsew 0x4325
-#define MN_vpcomtruew 0x4331
-#define MN_pi2fw 0x433c
-#define MN_pshufw 0x4342
+#define MN_vpackusdw 0x42e3
+#define MN_vpmovusdw 0x42ed
+#define MN_vpmovsdw 0x42f7
+#define MN_vpmovdw 0x4300
+#define MN_vpcomgew 0x4308
+#define MN_vpcomlew 0x4311
+#define MN_vpcmpnlew 0x431a
+#define MN_vpcmplew 0x4324
+#define MN_vpcomfalsew 0x432d
+#define MN_vpcomtruew 0x4339
+#define MN_pi2fw 0x4344
+#define MN_pshufw 0x434a
 #define MN_pavgw (MN_vpavgw + 1)
-#define MN_vpavgw 0x4349
-#define MN_prefetchw 0x4350
+#define MN_vpavgw 0x4351
+#define MN_prefetchw 0x4358
 #define MN_pshufhw (MN_vpshufhw + 1)
-#define MN_vpshufhw 0x435a
+#define MN_vpshufhw 0x4362
 #define MN_pmulhw (MN_vpmulhw + 1)
-#define MN_vpmulhw 0x4363
-#define MN_pf2iw 0x436b
+#define MN_vpmulhw 0x436b
+#define MN_pf2iw 0x4373
 #define MN_pshuflw (MN_vpshuflw + 1)
-#define MN_vpshuflw 0x4371
-#define MN_vpshlw 0x437a
+#define MN_vpshuflw 0x4379
+#define MN_vpshlw 0x4382
 #define MN_psllw (MN_vpsllw + 1)
-#define MN_vpsllw 0x4381
+#define MN_vpsllw 0x4389
 #define MN_pmullw (MN_vpmullw + 1)
-#define MN_vpmullw 0x4388
+#define MN_vpmullw 0x4390
 #define MN_psrlw (MN_vpsrlw + 1)
-#define MN_vpsrlw 0x4390
-#define MN_kshiftlw 0x4397
-#define MN_vpblendmw 0x43a0
-#define MN_vptestnmw 0x43aa
-#define MN_vpcomw 0x43b4
-#define MN_vpermw 0x43bb
-#define MN_vptestmw 0x43c2
-#define MN_kandnw 0x43cb
+#define MN_vpsrlw 0x4398
+#define MN_kshiftlw 0x439f
+#define MN_vpblendmw 0x43a8
+#define MN_vptestnmw 0x43b2
+#define MN_vpcomw 0x43bc
+#define MN_vpermw 0x43c3
+#define MN_vptestmw 0x43ca
+#define MN_kandnw 0x43d3
 #define MN_psignw (MN_vpsignw + 1)
-#define MN_vpsignw 0x43d2
-#define MN_vpcmpw 0x43da
-#define MN_vpcomeqw 0x43e1
-#define MN_vpcomneqw 0x43ea
-#define MN_vpcmpneqw 0x43f4
+#define MN_vpsignw 0x43da
+#define MN_vpcmpw 0x43e2
+#define MN_vpcomeqw 0x43e9
+#define MN_vpcomneqw 0x43f2
+#define MN_vpcmpneqw 0x43fc
 #define MN_pcmpeqw (MN_vpcmpeqw + 1)
-#define MN_vpcmpeqw 0x43fe
-#define MN_vpmovusqw 0x4407
-#define MN_vpmovsqw 0x4411
-#define MN_vpmovqw 0x441a
-#define MN_verw 0x4422
-#define MN_pmulhrw 0x4427
-#define MN_korw 0x442f
-#define MN_kxnorw 0x4434
-#define MN_kxorw 0x443b
+#define MN_vpcmpeqw 0x4406
+#define MN_vpmovusqw 0x440f
+#define MN_vpmovsqw 0x4419
+#define MN_vpmovqw 0x4422
+#define MN_verw 0x442a
+#define MN_pmulhrw 0x442f
+#define MN_korw 0x4437
+#define MN_kxnorw 0x443c
+#define MN_kxorw 0x4443
 #define MN_pinsrw (MN_vpinsrw + 1)
-#define MN_vpinsrw 0x4441
-#define MN_kshiftrw 0x4449
+#define MN_vpinsrw 0x4449
+#define MN_kshiftrw 0x4451
 #define MN_pextrw (MN_vpextrw + 1)
-#define MN_vpextrw 0x4452
+#define MN_vpextrw 0x445a
 #define MN_pabsw (MN_vpabsw + 1)
-#define MN_vpabsw 0x445a
+#define MN_vpabsw 0x4462
 #define MN_pmaddubsw (MN_vpmaddubsw + 1)
-#define MN_vpmaddubsw 0x4461
+#define MN_vpmaddubsw 0x4469
 #define MN_phsubsw (MN_vphsubsw + 1)
-#define MN_vphsubsw 0x446c
+#define MN_vphsubsw 0x4474
 #define MN_psubsw (MN_vpsubsw + 1)
-#define MN_vpsubsw 0x4475
+#define MN_vpsubsw 0x447d
 #define MN_phaddsw (MN_vphaddsw + 1)
-#define MN_vphaddsw 0x447d
+#define MN_vphaddsw 0x4485
 #define MN_paddsw (MN_vpaddsw + 1)
-#define MN_vpaddsw 0x4486
-#define MN_lmsw 0x448e
-#define MN_smsw 0x4493
+#define MN_vpaddsw 0x448e
+#define MN_lmsw 0x4496
+#define MN_smsw 0x449b
 #define MN_pminsw (MN_vpminsw + 1)
-#define MN_vpminsw 0x4498
+#define MN_vpminsw 0x44a0
 #define MN_pmulhrsw (MN_vpmulhrsw + 1)
-#define MN_vpmulhrsw 0x44a0
-#define MN_vpcompressw 0x44aa
-#define MN_fstsw 0x44b6
-#define MN_fnstsw 0x44bc
+#define MN_vpmulhrsw 0x44a8
+#define MN_vpcompressw 0x44b2
+#define MN_fstsw 0x44be
+#define MN_fnstsw 0x44c4
 #define MN_psubusw (MN_vpsubusw + 1)
-#define MN_vpsubusw 0x44c3
+#define MN_vpsubusw 0x44cb
 #define MN_paddusw (MN_vpaddusw + 1)
-#define MN_vpaddusw 0x44cc
-#define MN_movsw 0x44d5
+#define MN_vpaddusw 0x44d4
+#define MN_movsw 0x44dd
 #define MN_pmaxsw (MN_vpmaxsw + 1)
-#define MN_vpmaxsw 0x44db
-#define MN_cbtw 0x44e3
-#define MN_vpcomgtw 0x44e8
+#define MN_vpmaxsw 0x44e3
+#define MN_cbtw 0x44eb
+#define MN_vpcomgtw 0x44f0
 #define MN_pcmpgtw (MN_vpcmpgtw + 1)
-#define MN_vpcmpgtw 0x44f1
-#define MN_vpcomltw 0x44fa
-#define MN_vpcmpnltw 0x4503
-#define MN_vpcmpltw 0x450d
-#define MN_vpopcntw 0x4516
-#define MN_knotw 0x451f
-#define MN_vprotw 0x4525
-#define MN_vpbroadcastw 0x452c
-#define MN_ktestw 0x4539
-#define MN_kortestw 0x4540
-#define MN_vcvttph2uw 0x4549
-#define MN_vcvtph2uw 0x4554
-#define MN_vpcomgeuw 0x455e
-#define MN_vpcomleuw 0x4568
-#define MN_vpcmpnleuw 0x4572
-#define MN_vpcmpleuw 0x457d
-#define MN_vpcomfalseuw 0x4587
-#define MN_vpcomtrueuw 0x4594
+#define MN_vpcmpgtw 0x44f9
+#define MN_vpcomltw 0x4502
+#define MN_vpcmpnltw 0x450b
+#define MN_vpcmpltw 0x4515
+#define MN_vpopcntw 0x451e
+#define MN_knotw 0x4527
+#define MN_vprotw 0x452d
+#define MN_vpbroadcastw 0x4534
+#define MN_ktestw 0x4541
+#define MN_kortestw 0x4548
+#define MN_vcvttph2uw 0x4551
+#define MN_vcvtph2uw 0x455c
+#define MN_vpcomgeuw 0x4566
+#define MN_vpcomleuw 0x4570
+#define MN_vpcmpnleuw 0x457a
+#define MN_vpcmpleuw 0x4585
+#define MN_vpcomfalseuw 0x458f
+#define MN_vpcomtrueuw 0x459c
 #define MN_pmulhuw (MN_vpmulhuw + 1)
-#define MN_vpmulhuw 0x45a0
-#define MN_vpcomuw 0x45a9
+#define MN_vpmulhuw 0x45a8
+#define MN_vpcomuw 0x45b1
 #define MN_pminuw (MN_vpminuw + 1)
-#define MN_vpminuw 0x45b1
-#define MN_vpcmpuw 0x45b9
-#define MN_vpcomequw 0x45c1
-#define MN_vpcomnequw 0x45cb
-#define MN_vpcmpnequw 0x45d6
-#define MN_vpcmpequw 0x45e1
+#define MN_vpminuw 0x45b9
+#define MN_vpcmpuw 0x45c1
+#define MN_vpcomequw 0x45c9
+#define MN_vpcomnequw 0x45d3
+#define MN_vpcmpnequw 0x45de
+#define MN_vpcmpequw 0x45e9
 #define MN_phminposuw (MN_vphminposuw + 1)
-#define MN_vphminposuw 0x45eb
-#define MN_vpcomgtuw 0x45f7
-#define MN_vpcomltuw 0x4601
-#define MN_vpcmpnltuw 0x460b
-#define MN_vpcmpltuw 0x4616
+#define MN_vphminposuw 0x45f3
+#define MN_vpcomgtuw 0x45ff
+#define MN_vpcomltuw 0x4609
+#define MN_vpcmpnltuw 0x4613
+#define MN_vpcmpltuw 0x461e
 #define MN_pmaxuw (MN_vpmaxuw + 1)
-#define MN_vpmaxuw 0x4620
-#define MN_vpsravw 0x4628
-#define MN_vpshldvw 0x4630
-#define MN_vpshrdvw 0x4639
-#define MN_vpsllvw 0x4642
-#define MN_vpsrlvw 0x464a
-#define MN_kmovw 0x4652
-#define MN_vmovw 0x4658
-#define MN_vpmacsww 0x465e
-#define MN_vpmacssww 0x4667
-#define MN_movzw 0x4671
-#define MN_rex_x 0x4677
-#define MN_fyl2x 0x467d
-#define MN_rex64x 0x4683
-#define MN_vcvtneps2bf16x 0x468a
-#define MN_pfmax 0x4699
-#define MN_adcx 0x469f
-#define MN_bndldx 0x46a4
-#define MN_vfpclasspdx 0x46ab
-#define MN_fclex 0x46b7
-#define MN_fnclex 0x46bd
-#define MN_rex 0x46c4
-#define MN_vcvtpd2phx 0x46c8
-#define MN_vcvtdq2phx 0x46d3
-#define MN_vcvtudq2phx 0x46de
-#define MN_vcvtqq2phx 0x46ea
-#define MN_vcvtuqq2phx 0x46f5
-#define MN_vcvtps2phx 0x4701
-#define MN_vfpclassphx 0x470c
-#define MN_shlx 0x4718
-#define MN_mulx 0x471d
-#define MN_adox 0x4722
-#define MN_vcvttpd2dqx 0x4727
-#define MN_vcvtpd2dqx 0x4733
-#define MN_vcvttpd2udqx 0x473e
-#define MN_vcvtpd2udqx 0x474b
-#define MN_rex_rx 0x4757
-#define MN_sarx 0x475e
-#define MN_shrx 0x4763
-#define MN_rorx 0x4768
-#define MN_monitorx 0x476d
-#define MN_rex_wrx 0x4776
-#define MN_vcvtpd2psx 0x477e
-#define MN_vcvtph2psx 0x4789
-#define MN_vcvtqq2psx 0x4794
-#define MN_vcvtuqq2psx 0x479f
-#define MN_vfpclasspsx 0x47ab
-#define MN_movsx 0x47b7
-#define MN_mwaitx 0x47bd
-#define MN_bndstx 0x47c4
-#define MN_rex_wx 0x47cb
-#define MN_rexx 0x47d2
-#define MN_vcvtps2phxx 0x47d7
-#define MN_movzx 0x47e3
-#define MN_rex64y 0x47e9
-#define MN_vcvtneps2bf16y 0x47f0
-#define MN_vfpclasspdy 0x47ff
-#define MN_loadiwkey 0x480b
-#define MN_vcvtpd2phy 0x4815
-#define MN_vcvtdq2phy 0x4820
-#define MN_vcvtudq2phy 0x482b
-#define MN_vcvtqq2phy 0x4837
-#define MN_vcvtuqq2phy 0x4842
-#define MN_vfpclassphy 0x484e
-#define MN_vcvttpd2dqy 0x485a
-#define MN_vcvtpd2dqy 0x4866
-#define MN_vcvttpd2udqy 0x4871
-#define MN_vcvtpd2udqy 0x487e
-#define MN_rmpquery 0x488a
-#define MN_clrssbsy 0x4893
-#define MN_setssbsy 0x489c
-#define MN_vcvtpd2psy 0x48a5
-#define MN_vcvtqq2psy 0x48b0
-#define MN_vcvtuqq2psy 0x48bb
-#define MN_vfpclasspsy 0x48c7
-#define MN_rex64xy 0x48d3
-#define MN_rexy 0x48db
-#define MN_vcvtps2phxy 0x48e0
-#define MN_rexxy 0x48ec
-#define MN_rex64z 0x48f2
-#define MN_fldz 0x48f9
-#define MN_vfpclasspdz 0x48fe
-#define MN_vcvtpd2phz 0x490a
-#define MN_vcvtqq2phz 0x4915
-#define MN_vcvtuqq2phz 0x4920
-#define MN_vfpclassphz 0x492c
-#define MN_jz 0x4938
-#define MN_jnz 0x493b
-#define MN_repnz 0x493f
-#define MN_ccmpnz 0x4945
-#define MN_loopnz 0x494c
-#define MN_setnz 0x4953
-#define MN_ctestnz 0x4959
-#define MN_setzunz 0x4961
+#define MN_vpmaxuw 0x4628
+#define MN_vpsravw 0x4630
+#define MN_vpshldvw 0x4638
+#define MN_vpshrdvw 0x4641
+#define MN_vpsllvw 0x464a
+#define MN_vpsrlvw 0x4652
+#define MN_kmovw 0x465a
+#define MN_vmovw 0x4660
+#define MN_vpmacsww 0x4666
+#define MN_vpmacssww 0x466f
+#define MN_movzw 0x4679
+#define MN_rex_x 0x467f
+#define MN_fyl2x 0x4685
+#define MN_rex64x 0x468b
+#define MN_vcvtneps2bf16x 0x4692
+#define MN_pfmax 0x46a1
+#define MN_adcx 0x46a7
+#define MN_bndldx 0x46ac
+#define MN_vfpclasspdx 0x46b3
+#define MN_fclex 0x46bf
+#define MN_fnclex 0x46c5
+#define MN_rex 0x46cc
+#define MN_vcvtpd2phx 0x46d0
+#define MN_vcvtdq2phx 0x46db
+#define MN_vcvtudq2phx 0x46e6
+#define MN_vcvtqq2phx 0x46f2
+#define MN_vcvtuqq2phx 0x46fd
+#define MN_vcvtps2phx 0x4709
+#define MN_vfpclassphx 0x4714
+#define MN_shlx 0x4720
+#define MN_mulx 0x4725
+#define MN_adox 0x472a
+#define MN_vcvttpd2dqx 0x472f
+#define MN_vcvtpd2dqx 0x473b
+#define MN_vcvttpd2udqx 0x4746
+#define MN_vcvtpd2udqx 0x4753
+#define MN_rex_rx 0x475f
+#define MN_sarx 0x4766
+#define MN_shrx 0x476b
+#define MN_rorx 0x4770
+#define MN_monitorx 0x4775
+#define MN_rex_wrx 0x477e
+#define MN_vcvtpd2psx 0x4786
+#define MN_vcvtph2psx 0x4791
+#define MN_vcvtqq2psx 0x479c
+#define MN_vcvtuqq2psx 0x47a7
+#define MN_vfpclasspsx 0x47b3
+#define MN_movsx 0x47bf
+#define MN_mwaitx 0x47c5
+#define MN_bndstx 0x47cc
+#define MN_rex_wx 0x47d3
+#define MN_rexx 0x47da
+#define MN_vcvtps2phxx 0x47df
+#define MN_movzx 0x47eb
+#define MN_rex64y 0x47f1
+#define MN_vcvtneps2bf16y 0x47f8
+#define MN_vfpclasspdy 0x4807
+#define MN_loadiwkey 0x4813
+#define MN_vcvtpd2phy 0x481d
+#define MN_vcvtdq2phy 0x4828
+#define MN_vcvtudq2phy 0x4833
+#define MN_vcvtqq2phy 0x483f
+#define MN_vcvtuqq2phy 0x484a
+#define MN_vfpclassphy 0x4856
+#define MN_vcvttpd2dqy 0x4862
+#define MN_vcvtpd2dqy 0x486e
+#define MN_vcvttpd2udqy 0x4879
+#define MN_vcvtpd2udqy 0x4886
+#define MN_rmpquery 0x4892
+#define MN_clrssbsy 0x489b
+#define MN_setssbsy 0x48a4
+#define MN_vcvtpd2psy 0x48ad
+#define MN_vcvtqq2psy 0x48b8
+#define MN_vcvtuqq2psy 0x48c3
+#define MN_vfpclasspsy 0x48cf
+#define MN_rex64xy 0x48db
+#define MN_rexy 0x48e3
+#define MN_vcvtps2phxy 0x48e8
+#define MN_rexxy 0x48f4
+#define MN_rex64z 0x48fa
+#define MN_fldz 0x4901
+#define MN_vfpclasspdz 0x4906
+#define MN_vcvtpd2phz 0x4912
+#define MN_vcvtqq2phz 0x491d
+#define MN_vcvtuqq2phz 0x4928
+#define MN_vfpclassphz 0x4934
+#define MN_jz 0x4940
+#define MN_jnz 0x4943
+#define MN_repnz 0x4947
+#define MN_ccmpnz 0x494d
+#define MN_loopnz 0x4954
+#define MN_setnz 0x495b
+#define MN_ctestnz 0x4961
+#define MN_setzunz 0x4969
 #define MN_cmovnz (MN_cfcmovnz + 2)
-#define MN_cfcmovnz 0x4969
-#define MN_repz 0x4972
-#define MN_ccmpz 0x4977
-#define MN_loopz 0x497d
-#define MN_vfpclasspsz 0x4983
-#define MN_setz 0x498f
-#define MN_ctestz 0x4994
-#define MN_setzuz 0x499b
+#define MN_cfcmovnz 0x4971
+#define MN_repz 0x497a
+#define MN_ccmpz 0x497f
+#define MN_loopz 0x4985
+#define MN_vfpclasspsz 0x498b
+#define MN_setz 0x4997
+#define MN_ctestz 0x499c
+#define MN_setzuz 0x49a3
 #define MN_cmovz (MN_cfcmovz + 2)
-#define MN_cfcmovz 0x49a2
-#define MN_rex64xz 0x49aa
-#define MN_jecxz 0x49b2
-#define MN_jcxz 0x49b8
-#define MN_jrcxz 0x49bd
-#define MN_rexz 0x49c3
-#define MN_rexxz 0x49c8
-#define MN_rex64yz 0x49ce
-#define MN_rex64xyz 0x49d6
-#define MN_rexyz 0x49df
-#define MN_rexxyz 0x49e5
-#define MN__disp32_ 0x49ec
-#define MN__rex2_ 0x49f5
-#define MN__vex2_ 0x49fc
-#define MN__vex3_ 0x4a03
-#define MN__disp16_ 0x4a0a
-#define MN__disp8_ 0x4a13
-#define MN__load_ 0x4a1b
-#define MN__store_ 0x4a22
-#define MN__nooptimize_ 0x4a2a
-#define MN__nf_ 0x4a37
-#define MN__rex_ 0x4a3c
-#define MN__evex_ 0x4a42
-#define MN__vex_ 0x4a49
-#define MN__insn 0x4a4f
+#define MN_cfcmovz 0x49aa
+#define MN_rex64xz 0x49b2
+#define MN_jecxz 0x49ba
+#define MN_jcxz 0x49c0
+#define MN_jrcxz 0x49c5
+#define MN_rexz 0x49cb
+#define MN_rexxz 0x49d0
+#define MN_rex64yz 0x49d6
+#define MN_rex64xyz 0x49de
+#define MN_rexyz 0x49e7
+#define MN_rexxyz 0x49ed
+#define MN__disp32_ 0x49f4
+#define MN__rex2_ 0x49fd
+#define MN__vex2_ 0x4a04
+#define MN__vex3_ 0x4a0b
+#define MN__disp16_ 0x4a12
+#define MN__disp8_ 0x4a1b
+#define MN__load_ 0x4a23
+#define MN__store_ 0x4a2a
+#define MN__nooptimize_ 0x4a32
+#define MN__nf_ 0x4a3f
+#define MN__rex_ 0x4a44
+#define MN__evex_ 0x4a4a
+#define MN__vex_ 0x4a51
+#define MN__insn 0x4a57
diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
index 0cd8538..9a14a4d 100644
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -2930,11 +2930,15 @@ vpdpwssd<vnni><sat>, 0x6652|<sat:opc>, <vnni:avx>_VNNI, Modrm|Space0F38|Src1VVVV
 
 // {AVX512,AVX}_VNNI instructions end
 
+<vnni:int8:int16:attr:reg:mem, +
+  $y:_VNNI_INT8:_VNNI_INT16:Vex::, +
+  $z:10_2:10_2:Masking|Broadcast|Disp8ShiftVL:RegZMM:Dword>
+
 // AVX-VNNI-INT8 instructions.
 
 <dpb:pfx, uu:, ss:f2, su:f3>
 
-vpdpb<dpb>d<sat>, 0x<dpb:pfx>50|<sat:opc>, AVX_VNNI_INT8, Modrm|Vex|Space0F38|Src1VVVV|VexW0|CheckOperandSize|NoSuf, { RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM }
+vpdpb<dpb>d<vnni><sat>, 0x<dpb:pfx>50|<sat:opc>, AVX<vnni:int8>, Modrm|Space0F38|Src1VVVV|VexW0|<vnni:attr>|CheckOperandSize|NoSuf, { RegXMM|RegYMM|<vnni:reg>|<vnni:mem>|Unspecified|BaseIndex, RegXMM|RegYMM|<vnni:reg>, RegXMM|RegYMM|<vnni:reg> }
 
 // AVX-VNNI-INT8 instructions end.
 
@@ -2942,12 +2946,13 @@ vpdpb<dpb>d<sat>, 0x<dpb:pfx>50|<sat:opc>, AVX_VNNI_INT8, Modrm|Vex|Space0F38|Sr
 
 <dpw:pfx, uu:, us:66, su:f3>
 
-vpdpw<dpw>d<sat>, 0x<dpw:pfx>d2|<sat:opc>, AVX_VNNI_INT16, Modrm|Vex|Space0F38|Src1VVVV|VexW0|CheckOperandSize|NoSuf, { RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM }
+vpdpw<dpw>d<vnni><sat>, 0x<dpw:pfx>d2|<sat:opc>, AVX<vnni:int16>, Modrm|Space0F38|Src1VVVV|VexW0|<vnni:attr>|CheckOperandSize|NoSuf, { RegXMM|RegYMM|<vnni:reg>|<vnni:mem>|Unspecified|BaseIndex, RegXMM|RegYMM|<vnni:reg>, RegXMM|RegYMM|<vnni:reg> }
 
 // AVX-VNNI-INT16 instructions end.
 
 <dpw>
 <dpb>
+<vnni>
 <sat>
 
 // AVX512_BITALG instructions
@@ -3422,3 +3427,10 @@ pop2, 0x8f/0, APX_F, Modrm|VexW0|EVexMap4|DstVVVV|ImplicitStackOp|No_bSuf|No_wSu
 pop2p, 0x8f/0, APX_F, Modrm|VexW1|EVexMap4|DstVVVV|ImplicitStackOp|No_bSuf|No_wSuf|No_lSuf|No_sSuf, { Reg64, Reg64 }
 
 // APX Push2/Pop2 instructions end.
+
+// AVX10.2 instructions.
+
+vdpphps, 0x52, AVX10_2, Modrm|Space0F38|Src1VVVV|VexW0|Masking|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM|Dword|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
+vmpsadbw, 0xf342, AVX10_2, Modrm|Space0F3A|Src1VVVV|VexW0|Masking|Disp8ShiftVL|CheckOperandSize|NoSuf, { Imm8, RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
+
+// AVX10.2 instructions end.
diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h
index 4de9578..085e8cd 100644
--- a/opcodes/i386-tbl.h
+++ b/opcodes/i386-tbl.h
@@ -26828,6 +26828,20 @@ static const insn_template i386_optab[] =
 	  1, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 0, 0, 0, 0 } } } },
+  { MN_vmpsadbw, 0x42, 4, SPACE_0F3A, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 2, 0, 0, 5, 1, 0, 0, 0, 7, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 99, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  0, 0, 0, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
   { MN_vpabsb, 0x1c | 0, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 0, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
@@ -41702,6 +41716,18 @@ static const insn_template i386_optab[] =
 	  1, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 0, 0, 0, 0 } } } },
+  { MN_vpdpbuud, 0x50|0, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 0, 0, 0, 5, 1, 3, 0, 0, 7, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 99, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 1, 1, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
   { MN_vpdpbuuds, 0x50|1, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
@@ -41714,6 +41740,18 @@ static const insn_template i386_optab[] =
 	  1, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 0, 0, 0, 0 } } } },
+  { MN_vpdpbuuds, 0x50|1, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 0, 0, 0, 5, 1, 3, 0, 0, 7, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 99, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 1, 1, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
   { MN_vpdpbssd, 0x50|0, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
@@ -41726,6 +41764,18 @@ static const insn_template i386_optab[] =
 	  1, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 0, 0, 0, 0 } } } },
+  { MN_vpdpbssd, 0x50|0, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 3, 0, 0, 5, 1, 3, 0, 0, 7, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 99, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 1, 1, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
   { MN_vpdpbssds, 0x50|1, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
@@ -41738,6 +41788,18 @@ static const insn_template i386_optab[] =
 	  1, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 0, 0, 0, 0 } } } },
+  { MN_vpdpbssds, 0x50|1, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 3, 0, 0, 5, 1, 3, 0, 0, 7, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 99, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 1, 1, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
   { MN_vpdpbsud, 0x50|0, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
@@ -41750,6 +41812,18 @@ static const insn_template i386_optab[] =
 	  1, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 0, 0, 0, 0 } } } },
+  { MN_vpdpbsud, 0x50|0, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 2, 0, 0, 5, 1, 3, 0, 0, 7, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 99, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 1, 1, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
   { MN_vpdpbsuds, 0x50|1, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
@@ -41762,6 +41836,18 @@ static const insn_template i386_optab[] =
 	  1, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 0, 0, 0, 0 } } } },
+  { MN_vpdpbsuds, 0x50|1, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 2, 0, 0, 5, 1, 3, 0, 0, 7, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 99, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 1, 1, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
   { MN_vpdpwuud, 0xd2|0, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
@@ -41774,6 +41860,18 @@ static const insn_template i386_optab[] =
 	  1, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 0, 0, 0, 0 } } } },
+  { MN_vpdpwuud, 0xd2|0, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 0, 0, 0, 5, 1, 3, 0, 0, 7, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 99, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 1, 1, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
   { MN_vpdpwuuds, 0xd2|1, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
@@ -41786,6 +41884,18 @@ static const insn_template i386_optab[] =
 	  1, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 0, 0, 0, 0 } } } },
+  { MN_vpdpwuuds, 0xd2|1, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 0, 0, 0, 5, 1, 3, 0, 0, 7, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 99, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 1, 1, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
   { MN_vpdpwusd, 0xd2|0, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
@@ -41798,6 +41908,18 @@ static const insn_template i386_optab[] =
 	  1, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 0, 0, 0, 0 } } } },
+  { MN_vpdpwusd, 0xd2|0, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 1, 0, 0, 5, 1, 3, 0, 0, 7, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 99, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 1, 1, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
   { MN_vpdpwusds, 0xd2|1, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
@@ -41810,6 +41932,18 @@ static const insn_template i386_optab[] =
 	  1, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 0, 0, 0, 0 } } } },
+  { MN_vpdpwusds, 0xd2|1, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 1, 0, 0, 5, 1, 3, 0, 0, 7, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 99, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 1, 1, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
   { MN_vpdpwsud, 0xd2|0, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
@@ -41822,6 +41956,18 @@ static const insn_template i386_optab[] =
 	  1, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 0, 0, 0, 0 } } } },
+  { MN_vpdpwsud, 0xd2|0, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 2, 0, 0, 5, 1, 3, 0, 0, 7, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 99, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 1, 1, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
   { MN_vpdpwsuds, 0xd2|1, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
@@ -41834,6 +41980,18 @@ static const insn_template i386_optab[] =
 	  1, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 0, 0, 0, 0 } } } },
+  { MN_vpdpwsuds, 0xd2|1, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 2, 0, 0, 5, 1, 3, 0, 0, 7, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 99, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 1, 1, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
   { MN_vpopcntb, 0x54, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 1, 1, 0, 0, 5, 1, 0, 0, 0, 7, 0, 0, 0, 0, 0,
@@ -45774,6 +45932,18 @@ static const insn_template i386_optab[] =
 	  0, 0, 0, 0, 0, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
+  { MN_vdpphps, 0x52, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 0, 0, 0, 5, 1, 3, 0, 0, 7, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 99, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 1, 1, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
 };
 
 /* i386 opcode sets table.  */
@@ -45928,168 +46098,168 @@ static const i386_op_off_t i386_op_sets[] =
   2583, 2585, 2587, 2589, 2591, 2593, 2597, 2598,
   2599, 2601, 2605, 2609, 2611, 2615, 2619, 2620,
   2621, 2623, 2625, 2627, 2629, 2634, 2638, 2642,
-  2644, 2646, 2648, 2650, 2651, 2653, 2655, 2657,
-  2659, 2661, 2663, 2665, 2667, 2669, 2671, 2673,
-  2675, 2677, 2679, 2681, 2683, 2684, 2685, 2687,
-  2689, 2690, 2691, 2694, 2697, 2700, 2703, 2705,
-  2707, 2709, 2711, 2713, 2715, 2716, 2717, 2718,
-  2720, 2724, 2726, 2728, 2734, 2738, 2739, 2740,
-  2741, 2742, 2743, 2744, 2745, 2749, 2751, 2753,
-  2757, 2759, 2761, 2763, 2765, 2767, 2769, 2771,
-  2773, 2775, 2777, 2779, 2781, 2783, 2785, 2786,
-  2789, 2792, 2795, 2798, 2803, 2808, 2813, 2818,
-  2821, 2824, 2827, 2830, 2832, 2834, 2836, 2838,
-  2840, 2842, 2844, 2845, 2847, 2849, 2851, 2853,
-  2855, 2856, 2857, 2858, 2862, 2866, 2868, 2872,
-  2876, 2880, 2884, 2888, 2890, 2894, 2896, 2898,
-  2900, 2902, 2904, 2906, 2908, 2910, 2911, 2913,
-  2915, 2917, 2919, 2921, 2923, 2925, 2927, 2928,
-  2929, 2930, 2931, 2932, 2933, 2934, 2935, 2936,
-  2938, 2940, 2942, 2944, 2946, 2948, 2949, 2950,
-  2951, 2953, 2955, 2957, 2959, 2961, 2963, 2964,
-  2965, 2966, 2967, 2970, 2973, 2975, 2978, 2979,
-  2980, 2982, 2983, 2985, 2986, 2987, 2989, 2991,
-  2992, 2993, 2994, 2995, 2996, 2999, 3004, 3009,
-  3014, 3019, 3022, 3027, 3032, 3034, 3036, 3038,
-  3040, 3041, 3042, 3044, 3046, 3048, 3050, 3052,
-  3054, 3056, 3057, 3058, 3059, 3060, 3061, 3062,
-  3067, 3072, 3073, 3074, 3075, 3076, 3077, 3078,
-  3079, 3080, 3081, 3082, 3083, 3084, 3085, 3086,
-  3087, 3088, 3089, 3090, 3091, 3092, 3093, 3094,
-  3095, 3096, 3097, 3098, 3099, 3100, 3101, 3102,
-  3103, 3104, 3105, 3106, 3107, 3108, 3109, 3110,
-  3111, 3112, 3113, 3114, 3115, 3116, 3117, 3118,
-  3119, 3120, 3121, 3122, 3123, 3124, 3125, 3126,
-  3127, 3128, 3129, 3130, 3131, 3132, 3133, 3134,
-  3135, 3136, 3137, 3138, 3139, 3140, 3141, 3142,
-  3143, 3144, 3145, 3146, 3147, 3148, 3149, 3150,
-  3151, 3152, 3153, 3154, 3155, 3156, 3157, 3158,
-  3159, 3160, 3161, 3162, 3163, 3164, 3165, 3166,
-  3167, 3168, 3169, 3170, 3171, 3172, 3173, 3174,
-  3175, 3176, 3177, 3178, 3179, 3180, 3181, 3182,
-  3183, 3184, 3185, 3186, 3187, 3188, 3189, 3190,
-  3191, 3192, 3193, 3194, 3195, 3196, 3197, 3198,
-  3199, 3200, 3201, 3202, 3203, 3204, 3205, 3206,
-  3207, 3208, 3209, 3210, 3211, 3212, 3213, 3214,
-  3215, 3216, 3217, 3218, 3219, 3220, 3221, 3222,
-  3223, 3224, 3225, 3226, 3227, 3228, 3229, 3230,
-  3231, 3232, 3233, 3234, 3235, 3236, 3237, 3238,
-  3239, 3240, 3241, 3242, 3243, 3244, 3245, 3246,
-  3247, 3248, 3249, 3250, 3251, 3252, 3253, 3254,
-  3255, 3256, 3257, 3258, 3259, 3260, 3261, 3262,
-  3263, 3264, 3265, 3266, 3267, 3268, 3269, 3270,
-  3271, 3272, 3273, 3275, 3277, 3278, 3279, 3280,
-  3281, 3282, 3283, 3284, 3285, 3286, 3287, 3288,
-  3289, 3290, 3291, 3292, 3293, 3294, 3295, 3296,
-  3297, 3298, 3299, 3300, 3301, 3302, 3303, 3304,
-  3305, 3307, 3309, 3311, 3313, 3314, 3315, 3316,
-  3317, 3318, 3319, 3320, 3321, 3322, 3323, 3324,
-  3325, 3326, 3328, 3329, 3330, 3331, 3333, 3334,
-  3335, 3336, 3337, 3338, 3339, 3340, 3341, 3342,
-  3343, 3344, 3345, 3346, 3347, 3348, 3349, 3350,
-  3351, 3352, 3353, 3354, 3355, 3356, 3357, 3358,
-  3359, 3360, 3361, 3362, 3363, 3364, 3365, 3366,
-  3367, 3368, 3369, 3370, 3371, 3372, 3373, 3374,
-  3376, 3378, 3379, 3380, 3382, 3383, 3385, 3387,
-  3388, 3389, 3391, 3393, 3395, 3397, 3398, 3399,
-  3400, 3401, 3402, 3403, 3404, 3405, 3406, 3407,
-  3408, 3409, 3410, 3411, 3412, 3413, 3416, 3419,
-  3420, 3421, 3422, 3423, 3424, 3425, 3427, 3429,
-  3431, 3432, 3433, 3434, 3435, 3436, 3437, 3439,
-  3440, 3441, 3442, 3443, 3444, 3445, 3446, 3447,
-  3448, 3449, 3450, 3451, 3452, 3453, 3454, 3455,
-  3456, 3457, 3458, 3459, 3462, 3465, 3466, 3467,
-  3468, 3469, 3470, 3471, 3472, 3473, 3474, 3475,
-  3476, 3477, 3478, 3479, 3480, 3481, 3482, 3483,
-  3484, 3485, 3486, 3487, 3488, 3489, 3490, 3491,
-  3492, 3493, 3494, 3495, 3496, 3497, 3498, 3499,
-  3500, 3501, 3502, 3503, 3504, 3505, 3506, 3507,
-  3508, 3509, 3510, 3511, 3512, 3513, 3514, 3515,
-  3516, 3517, 3518, 3519, 3520, 3521, 3522, 3523,
-  3526, 3528, 3531, 3534, 3536, 3539, 3542, 3545,
-  3548, 3549, 3552, 3553, 3554, 3555, 3556, 3557,
-  3561, 3563, 3566, 3567, 3568, 3569, 3570, 3571,
-  3572, 3573, 3574, 3575, 3576, 3577, 3578, 3579,
-  3580, 3581, 3582, 3583, 3584, 3585, 3586, 3587,
-  3588, 3589, 3590, 3591, 3592, 3593, 3594, 3595,
-  3596, 3597, 3598, 3599, 3600, 3601, 3602, 3603,
-  3604, 3605, 3606, 3607, 3608, 3609, 3610, 3611,
-  3612, 3613, 3614, 3615, 3616, 3617, 3619, 3620,
-  3621, 3622, 3623, 3624, 3625, 3626, 3627, 3628,
-  3629, 3630, 3631, 3632, 3633, 3634, 3635, 3636,
-  3637, 3638, 3639, 3640, 3641, 3642, 3643, 3644,
-  3645, 3646, 3647, 3648, 3649, 3650, 3651, 3652,
-  3653, 3654, 3655, 3656, 3657, 3658, 3661, 3664,
-  3667, 3670, 3673, 3676, 3679, 3682, 3685, 3688,
-  3691, 3694, 3697, 3700, 3703, 3704, 3705, 3706,
-  3707, 3709, 3710, 3711, 3712, 3713, 3714, 3715,
-  3716, 3717, 3718, 3719, 3720, 3721, 3722, 3723,
-  3724, 3725, 3726, 3727, 3728, 3729, 3730, 3731,
-  3732, 3733, 3734, 3735, 3736, 3737, 3738, 3739,
-  3740, 3741, 3742, 3743, 3744, 3745, 3746, 3747,
-  3748, 3749, 3750, 3751, 3752, 3753, 3754, 3755,
-  3756, 3757, 3758, 3759, 3760, 3761, 3762, 3763,
-  3764, 3765, 3766, 3767, 3768, 3769, 3770, 3773,
-  3776, 3777, 3778, 3779, 3780, 3781, 3782, 3783,
-  3784, 3785, 3786, 3787, 3788, 3789, 3790, 3791,
-  3792, 3793, 3794, 3795, 3796, 3797, 3798, 3799,
-  3800, 3801, 3802, 3803, 3804, 3805, 3806, 3807,
-  3808, 3809, 3810, 3811, 3812, 3813, 3814, 3815,
-  3816, 3817, 3818, 3819, 3820, 3821, 3822, 3823,
-  3824, 3825, 3826, 3827, 3828, 3829, 3830, 3831,
-  3832, 3833, 3834, 3835, 3836, 3837, 3838, 3841,
-  3844, 3847, 3848, 3849, 3850, 3851, 3852, 3853,
-  3854, 3855, 3856, 3857, 3858, 3859, 3860, 3861,
-  3862, 3863, 3866, 3869, 3870, 3871, 3874, 3875,
-  3876, 3877, 3878, 3881, 3884, 3887, 3888, 3889,
-  3890, 3891, 3892, 3893, 3894, 3895, 3896, 3897,
-  3899, 3901, 3902, 3903, 3904, 3905, 3906, 3907,
-  3908, 3909, 3910, 3911, 3912, 3913, 3914, 3915,
-  3916, 3917, 3918, 3919, 3920, 3921, 3922, 3923,
-  3924, 3925, 3926, 3928, 3930, 3931, 3932, 3933,
-  3934, 3935, 3936, 3937, 3938, 3939, 3940, 3941,
-  3942, 3943, 3944, 3945, 3946, 3947, 3948, 3949,
-  3950, 3951, 3952, 3953, 3954, 3955, 3957, 3959,
-  3961, 3963, 3964, 3965, 3966, 3967, 3968, 3969,
-  3970, 3971, 3972, 3973, 3974, 3975, 3976, 3977,
-  3978, 3980, 3981, 3983, 3986, 3988, 3989, 3990,
-  3992, 3994, 3995, 3996, 3997, 3998, 3999, 4000,
-  4002, 4004, 4006, 4008, 4009, 4010, 4011, 4012,
-  4013, 4014, 4015, 4016, 4017, 4019, 4021, 4022,
-  4024, 4026, 4027, 4032, 4034, 4036, 4037, 4038,
-  4039, 4040, 4041, 4042, 4043, 4045, 4047, 4048,
-  4049, 4050, 4052, 4055, 4058, 4061, 4063, 4064,
-  4065, 4066, 4067, 4068, 4069, 4070, 4071, 4072,
-  4073, 4074, 4075, 4076, 4077, 4078, 4079, 4080,
-  4081, 4082, 4083, 4084, 4085, 4086, 4087, 4088,
-  4089, 4090, 4091, 4092, 4093, 4094, 4095, 4096,
-  4097, 4098, 4099, 4100, 4101, 4102, 4103, 4104,
-  4105, 4106, 4107, 4108, 4109, 4110, 4111, 4112,
-  4113, 4114, 4115, 4116, 4117, 4118, 4119, 4120,
-  4121, 4122, 4123, 4124, 4125, 4126, 4127, 4128,
-  4129, 4130, 4131, 4132, 4133, 4134, 4135, 4136,
-  4137, 4138, 4139, 4140, 4141, 4142, 4143, 4144,
-  4145, 4146, 4147, 4148, 4149, 4150, 4151, 4152,
-  4153, 4154, 4155, 4156, 4157, 4158, 4159, 4160,
-  4161, 4162, 4163, 4164, 4165, 4166, 4167, 4168,
-  4169, 4170, 4171, 4172, 4173, 4174, 4175, 4176,
-  4177, 4178, 4179, 4180, 4181, 4182, 4183, 4184,
-  4185, 4186, 4187, 4188, 4189, 4190, 4191, 4192,
-  4193, 4194, 4195, 4196, 4197, 4198, 4199, 4200,
-  4201, 4202, 4203, 4204, 4205, 4208, 4209, 4210,
-  4213, 4214, 4215, 4217, 4218, 4219, 4220, 4222,
-  4223, 4224, 4225, 4227, 4228, 4229, 4230, 4233,
-  4234, 4235, 4236, 4237, 4240, 4243, 4246, 4249,
-  4252, 4253, 4254, 4255, 4256, 4258, 4260, 4261,
-  4262, 4263, 4266, 4269, 4272, 4275, 4278, 4279,
-  4280, 4281, 4283, 4284, 4285, 4286, 4288, 4289,
-  4290, 4291, 4292, 4293, 4294, 4295, 4296, 4297,
-  4298, 4299, 4300, 4301, 4302, 4303, 4304, 4305,
-  4306, 4307, 4308, 4309, 4310, 4311, 4312, 4313,
-  4314, 4315, 4316, 4317, 4318, 4319, 4320, 4321,
-  4322, 4323, 4324, 4325, 4326, 4327, 4329, 4331,
-  4333, 4335, 4337, 4338, 4339, 4342, 4345, 4346,
-  4347, 4348, 4349
+  2644, 2646, 2648, 2650, 2652, 2654, 2656, 2658,
+  2660, 2662, 2664, 2666, 2668, 2670, 2672, 2674,
+  2676, 2678, 2680, 2682, 2684, 2685, 2686, 2688,
+  2690, 2691, 2692, 2695, 2698, 2701, 2704, 2706,
+  2708, 2710, 2712, 2714, 2716, 2717, 2718, 2719,
+  2721, 2725, 2727, 2729, 2735, 2739, 2740, 2741,
+  2742, 2743, 2744, 2745, 2746, 2750, 2752, 2754,
+  2758, 2760, 2762, 2764, 2766, 2768, 2770, 2772,
+  2774, 2776, 2778, 2780, 2782, 2784, 2786, 2787,
+  2790, 2793, 2796, 2799, 2804, 2809, 2814, 2819,
+  2822, 2825, 2828, 2831, 2833, 2835, 2837, 2839,
+  2841, 2843, 2845, 2846, 2848, 2850, 2852, 2854,
+  2856, 2857, 2858, 2859, 2863, 2867, 2869, 2873,
+  2877, 2881, 2885, 2889, 2891, 2895, 2897, 2899,
+  2901, 2903, 2905, 2907, 2909, 2911, 2912, 2914,
+  2916, 2918, 2920, 2922, 2924, 2926, 2928, 2929,
+  2930, 2931, 2932, 2933, 2934, 2935, 2936, 2937,
+  2939, 2941, 2943, 2945, 2947, 2949, 2950, 2951,
+  2952, 2954, 2956, 2958, 2960, 2962, 2964, 2965,
+  2966, 2967, 2968, 2971, 2974, 2976, 2979, 2980,
+  2981, 2983, 2984, 2986, 2987, 2988, 2990, 2992,
+  2993, 2994, 2995, 2996, 2997, 3000, 3005, 3010,
+  3015, 3020, 3023, 3028, 3033, 3035, 3037, 3039,
+  3041, 3042, 3043, 3045, 3047, 3049, 3051, 3053,
+  3055, 3057, 3058, 3059, 3060, 3061, 3062, 3063,
+  3068, 3073, 3074, 3075, 3076, 3077, 3078, 3079,
+  3080, 3081, 3082, 3083, 3084, 3085, 3086, 3087,
+  3088, 3089, 3090, 3091, 3092, 3093, 3094, 3095,
+  3096, 3097, 3098, 3099, 3100, 3101, 3102, 3103,
+  3104, 3105, 3106, 3107, 3108, 3109, 3110, 3111,
+  3112, 3113, 3114, 3115, 3116, 3117, 3118, 3119,
+  3120, 3121, 3122, 3123, 3124, 3125, 3126, 3127,
+  3128, 3129, 3130, 3131, 3132, 3133, 3134, 3135,
+  3136, 3137, 3138, 3139, 3140, 3141, 3142, 3143,
+  3144, 3145, 3146, 3147, 3148, 3149, 3150, 3151,
+  3152, 3153, 3154, 3155, 3156, 3157, 3158, 3159,
+  3160, 3161, 3162, 3163, 3164, 3165, 3166, 3167,
+  3168, 3169, 3170, 3171, 3172, 3173, 3174, 3175,
+  3176, 3177, 3178, 3179, 3180, 3181, 3182, 3183,
+  3184, 3185, 3186, 3187, 3188, 3189, 3190, 3191,
+  3192, 3193, 3194, 3195, 3196, 3197, 3198, 3199,
+  3200, 3201, 3202, 3203, 3204, 3205, 3206, 3207,
+  3208, 3209, 3210, 3211, 3212, 3213, 3214, 3215,
+  3216, 3217, 3218, 3219, 3220, 3221, 3222, 3223,
+  3224, 3225, 3226, 3227, 3228, 3229, 3230, 3231,
+  3232, 3233, 3234, 3235, 3236, 3237, 3238, 3239,
+  3240, 3241, 3242, 3243, 3244, 3245, 3246, 3247,
+  3248, 3249, 3250, 3251, 3252, 3253, 3254, 3255,
+  3256, 3257, 3258, 3259, 3260, 3261, 3262, 3263,
+  3264, 3265, 3266, 3267, 3268, 3269, 3270, 3271,
+  3272, 3273, 3274, 3276, 3278, 3279, 3280, 3281,
+  3282, 3283, 3284, 3285, 3286, 3287, 3288, 3289,
+  3290, 3291, 3292, 3293, 3294, 3295, 3296, 3297,
+  3298, 3299, 3300, 3301, 3302, 3303, 3304, 3305,
+  3306, 3308, 3310, 3312, 3314, 3315, 3316, 3317,
+  3318, 3319, 3320, 3321, 3322, 3323, 3324, 3325,
+  3326, 3327, 3329, 3330, 3331, 3332, 3334, 3335,
+  3336, 3337, 3338, 3339, 3340, 3341, 3342, 3343,
+  3344, 3345, 3346, 3347, 3348, 3349, 3350, 3351,
+  3352, 3353, 3354, 3355, 3356, 3357, 3358, 3359,
+  3360, 3361, 3362, 3363, 3364, 3365, 3366, 3367,
+  3368, 3369, 3370, 3371, 3372, 3373, 3374, 3375,
+  3377, 3379, 3380, 3381, 3383, 3384, 3386, 3388,
+  3389, 3390, 3392, 3394, 3396, 3398, 3399, 3400,
+  3401, 3402, 3403, 3404, 3405, 3406, 3407, 3408,
+  3409, 3410, 3411, 3412, 3413, 3414, 3417, 3420,
+  3421, 3422, 3423, 3424, 3425, 3426, 3428, 3430,
+  3432, 3433, 3434, 3435, 3436, 3437, 3438, 3440,
+  3441, 3442, 3443, 3444, 3445, 3446, 3447, 3448,
+  3449, 3450, 3451, 3452, 3453, 3454, 3455, 3456,
+  3457, 3458, 3459, 3460, 3463, 3466, 3467, 3468,
+  3469, 3470, 3471, 3472, 3473, 3474, 3475, 3476,
+  3477, 3478, 3479, 3480, 3481, 3482, 3483, 3484,
+  3485, 3486, 3487, 3488, 3489, 3490, 3491, 3492,
+  3493, 3494, 3495, 3496, 3497, 3498, 3499, 3500,
+  3501, 3502, 3503, 3504, 3505, 3506, 3507, 3508,
+  3509, 3510, 3511, 3512, 3513, 3514, 3515, 3516,
+  3517, 3518, 3519, 3520, 3521, 3522, 3523, 3524,
+  3527, 3529, 3532, 3535, 3537, 3540, 3543, 3546,
+  3549, 3550, 3553, 3554, 3555, 3556, 3557, 3558,
+  3562, 3564, 3567, 3568, 3569, 3570, 3571, 3572,
+  3573, 3574, 3575, 3576, 3577, 3578, 3579, 3580,
+  3581, 3582, 3583, 3584, 3585, 3586, 3587, 3588,
+  3589, 3590, 3591, 3592, 3593, 3594, 3595, 3596,
+  3597, 3598, 3599, 3600, 3601, 3602, 3603, 3604,
+  3605, 3606, 3607, 3608, 3609, 3610, 3611, 3612,
+  3613, 3614, 3615, 3616, 3617, 3618, 3620, 3621,
+  3622, 3623, 3624, 3625, 3626, 3627, 3628, 3629,
+  3630, 3631, 3632, 3633, 3634, 3635, 3636, 3637,
+  3638, 3639, 3640, 3641, 3642, 3643, 3644, 3645,
+  3646, 3647, 3648, 3649, 3650, 3651, 3652, 3653,
+  3654, 3655, 3656, 3657, 3658, 3659, 3662, 3665,
+  3668, 3671, 3674, 3677, 3680, 3683, 3686, 3689,
+  3692, 3695, 3698, 3701, 3704, 3705, 3706, 3707,
+  3708, 3710, 3711, 3712, 3713, 3714, 3715, 3716,
+  3717, 3718, 3719, 3720, 3721, 3722, 3723, 3724,
+  3725, 3726, 3727, 3728, 3729, 3730, 3731, 3732,
+  3733, 3734, 3735, 3736, 3737, 3738, 3739, 3740,
+  3741, 3742, 3743, 3744, 3745, 3746, 3747, 3748,
+  3749, 3750, 3751, 3752, 3753, 3754, 3755, 3756,
+  3757, 3758, 3759, 3760, 3761, 3762, 3763, 3764,
+  3765, 3766, 3767, 3768, 3769, 3770, 3771, 3774,
+  3777, 3778, 3779, 3780, 3781, 3782, 3783, 3784,
+  3785, 3786, 3787, 3788, 3789, 3790, 3791, 3792,
+  3793, 3794, 3795, 3796, 3797, 3798, 3799, 3800,
+  3801, 3802, 3803, 3804, 3805, 3806, 3807, 3808,
+  3809, 3810, 3811, 3812, 3813, 3814, 3815, 3816,
+  3817, 3818, 3819, 3820, 3821, 3822, 3823, 3824,
+  3825, 3826, 3827, 3828, 3829, 3830, 3831, 3832,
+  3833, 3834, 3835, 3836, 3837, 3838, 3839, 3842,
+  3845, 3848, 3849, 3850, 3851, 3852, 3853, 3854,
+  3855, 3856, 3857, 3858, 3859, 3860, 3861, 3862,
+  3863, 3864, 3867, 3870, 3871, 3872, 3875, 3876,
+  3877, 3878, 3879, 3882, 3885, 3888, 3889, 3890,
+  3891, 3892, 3893, 3894, 3895, 3896, 3897, 3898,
+  3900, 3902, 3903, 3904, 3905, 3906, 3907, 3908,
+  3909, 3910, 3911, 3912, 3913, 3914, 3915, 3916,
+  3917, 3918, 3919, 3920, 3921, 3922, 3923, 3924,
+  3925, 3926, 3927, 3929, 3931, 3932, 3933, 3934,
+  3935, 3936, 3937, 3938, 3939, 3940, 3941, 3942,
+  3943, 3944, 3945, 3946, 3947, 3948, 3949, 3950,
+  3951, 3952, 3953, 3954, 3955, 3956, 3958, 3960,
+  3962, 3964, 3966, 3968, 3970, 3972, 3974, 3976,
+  3978, 3980, 3982, 3984, 3986, 3988, 3989, 3990,
+  3991, 3993, 3994, 3996, 3999, 4001, 4002, 4003,
+  4005, 4007, 4008, 4009, 4010, 4011, 4012, 4013,
+  4015, 4017, 4019, 4021, 4022, 4023, 4024, 4025,
+  4026, 4027, 4028, 4029, 4030, 4032, 4034, 4035,
+  4037, 4039, 4040, 4045, 4047, 4049, 4050, 4051,
+  4052, 4053, 4054, 4055, 4056, 4058, 4060, 4061,
+  4062, 4063, 4065, 4068, 4071, 4074, 4076, 4077,
+  4078, 4079, 4080, 4081, 4082, 4083, 4084, 4085,
+  4086, 4087, 4088, 4089, 4090, 4091, 4092, 4093,
+  4094, 4095, 4096, 4097, 4098, 4099, 4100, 4101,
+  4102, 4103, 4104, 4105, 4106, 4107, 4108, 4109,
+  4110, 4111, 4112, 4113, 4114, 4115, 4116, 4117,
+  4118, 4119, 4120, 4121, 4122, 4123, 4124, 4125,
+  4126, 4127, 4128, 4129, 4130, 4131, 4132, 4133,
+  4134, 4135, 4136, 4137, 4138, 4139, 4140, 4141,
+  4142, 4143, 4144, 4145, 4146, 4147, 4148, 4149,
+  4150, 4151, 4152, 4153, 4154, 4155, 4156, 4157,
+  4158, 4159, 4160, 4161, 4162, 4163, 4164, 4165,
+  4166, 4167, 4168, 4169, 4170, 4171, 4172, 4173,
+  4174, 4175, 4176, 4177, 4178, 4179, 4180, 4181,
+  4182, 4183, 4184, 4185, 4186, 4187, 4188, 4189,
+  4190, 4191, 4192, 4193, 4194, 4195, 4196, 4197,
+  4198, 4199, 4200, 4201, 4202, 4203, 4204, 4205,
+  4206, 4207, 4208, 4209, 4210, 4211, 4212, 4213,
+  4214, 4215, 4216, 4217, 4218, 4221, 4222, 4223,
+  4226, 4227, 4228, 4230, 4231, 4232, 4233, 4235,
+  4236, 4237, 4238, 4240, 4241, 4242, 4243, 4246,
+  4247, 4248, 4249, 4250, 4253, 4256, 4259, 4262,
+  4265, 4266, 4267, 4268, 4269, 4271, 4273, 4274,
+  4275, 4276, 4279, 4282, 4285, 4288, 4291, 4292,
+  4293, 4294, 4296, 4297, 4298, 4299, 4301, 4302,
+  4303, 4304, 4305, 4306, 4307, 4308, 4309, 4310,
+  4311, 4312, 4313, 4314, 4315, 4316, 4317, 4318,
+  4319, 4320, 4321, 4322, 4323, 4324, 4325, 4326,
+  4327, 4328, 4329, 4330, 4331, 4332, 4333, 4334,
+  4335, 4336, 4337, 4338, 4339, 4340, 4342, 4344,
+  4346, 4348, 4350, 4351, 4352, 4355, 4358, 4359,
+  4360, 4361, 4362, 4363
 };
 
 /* i386 mnemonics table.  */
@@ -47656,6 +47826,7 @@ const char i386_mnemonics[] =
   "\0""vshufps"
   "\0""vunpckhps"
   "\0""vmovlhps"
+  "\0""vdpphps"
   "\0""vmovhps"
   "\0""vmovmskps"
   "\0""vmovhlps"